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[AArch64] SelectionDag codegen for gpr CTZ instruction
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Authored by stuij on Nov 28 2022, 6:32 AM.

Details

Summary

When feature CSSC is available we should use instruction CTZ in SelectionDag
where applicable:

  • CTTZ intrinsics are lowered to using the gpr CTZ instruction
  • BITREVERSE -> CTLZ instruction pattern gets replaced by CTZ

spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/CTZ--Count-Trailing-Zeros-

Diff Detail

Event Timeline

stuij created this revision.Nov 28 2022, 6:32 AM
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stuij requested review of this revision.Nov 28 2022, 6:32 AM
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stuij updated this revision to Diff 478237.Nov 28 2022, 7:13 AM

removing comments

stuij added a comment.EditedNov 28 2022, 7:18 AM

removed comment as it duplicates the inline comment

llvm/lib/Target/AArch64/AArch64InstrInfo.td
8561

There's a question here if we should move these into dagcombiner and implement likewise for GlobalIsel, or if we should leave this here and have them be picked up by SelDag and GlobalIsel:

lenary added inline comments.
llvm/lib/Target/AArch64/AArch64InstrInfo.td
8561

We've talked already and my position is that these should be in dagcombiner/globalisel combines, but I'm interested in the views of e.g. @paquette @RKSimon. I realise combines like this might have to be behind hooks given that on some targets, cttz/ctlz of zero is undefined.

llvm/test/CodeGen/AArch64/gpr_cttz.ll
147

how does this testcase have no CHECK lines?

RKSimon added inline comments.Nov 28 2022, 8:25 AM
llvm/lib/Target/AArch64/AArch64InstrInfo.td
8561

That's why we have support for cttz_zero_undef/G_CTTZ_ZERO_UNDEF etc - legalization should use the standard 'zero -> bw' case if the target supports it, but there's also the 'zero -> undef' opcode for targets that only support that.

Matt added a subscriber: Matt.Nov 28 2022, 1:12 PM
stuij updated this revision to Diff 480055.Dec 5 2022, 4:57 AM

removed instrInfo pattern match of (cttz (bitreverse -> cttz with equivalent target dagcombine

stuij updated this revision to Diff 480068.Dec 5 2022, 5:27 AM
stuij marked 2 inline comments as done.

added missing testcase

stuij marked an inline comment as done.Dec 5 2022, 5:28 AM
stuij added inline comments.
llvm/test/CodeGen/AArch64/gpr_cttz.ll
147

I... don't know.
Added, thanks!

lenary accepted this revision.Dec 5 2022, 6:09 AM

Cool, this works for me, and we can move the target dagcombine into target-independent dagcombiner later :)

This revision is now accepted and ready to land.Dec 5 2022, 6:09 AM
This revision was landed with ongoing or failed builds.Dec 6 2022, 2:43 AM
This revision was automatically updated to reflect the committed changes.
stuij marked an inline comment as done.