[mlir] Do not print default-valued attributes in generic format.

[vzakhari]

Summary

Do not print default-valued attributes that have default values
in generic operation printer. This is a follow-up on D135993.

This change is needed to avoid printing default fastmathFlags
for LLVM dialect intrinsics operations, when they start supporting
the flags.

[rriddle]

I'm not 100% convinced this is a good idea. We generally don't elide information from generic formats, and I don't think we should start. This makes it much harder to actually see the structure of the op, and I'd rather leave elision up to the custom formats.

[vzakhari]

In D136219#3867116, @rriddle wrote:

I'm not 100% convinced this is a good idea. We generally don't elide information from generic formats, and I don't think we should start. This makes it much harder to actually see the structure of the op, and I'd rather leave elision up to the custom formats.

Sounds reasonable. I will deal with LLVM intrinsics printout in a different way. Thank you for the prompt reply!

[rriddle]

In D136219#3867199, @vzakhari wrote:

In D136219#3867116, @rriddle wrote:

I'm not 100% convinced this is a good idea. We generally don't elide information from generic formats, and I don't think we should start. This makes it much harder to actually see the structure of the op, and I'd rather leave elision up to the custom formats.

Sounds reasonable. I will deal with LLVM intrinsics printout in a different way. Thank you for the prompt reply!

Have we considered just adding custom formats for those? There is also a way to add custom format fallbacks via the dialect: https://github.com/llvm/llvm-project/blob/28d70d3f1e2ad2497c90ce024548f7f211feb72f/mlir/include/mlir/IR/Dialect.h#L118

[vzakhari]

In D136219#3867204, @rriddle wrote:

Have we considered just adding custom formats for those?

Yes, this is what I am going to do.

There is also a way to add custom format fallbacks via the dialect: https://github.com/llvm/llvm-project/blob/28d70d3f1e2ad2497c90ce024548f7f211feb72f/mlir/include/mlir/IR/Dialect.h#L118

Thanks! This is an option.

mlir/lib/IR/AsmPrinter.cpp

if (op->getNumRegions() != 0) {
     os << " (";
     interleaveComma(op->getRegions(), [&](Region &region) {
       printRegion(region, /*printEntryBlockArgs=*/true,
                   /*printBlockTerminators=*/true, /*printEmptyBlock=*/true);
     });
     os << ')';
   }
 
+  // Do not print attributes that have their default values.
+  SmallVector<StringRef, 2> elidedAttrs;
+  NamedAttrList defaultAttrs;
+  if (Optional<RegisteredOperationName> info = op->getRegisteredInfo())
+    info->populateDefaultAttrs(defaultAttrs);
+
   auto attrs = op->getAttrs();
-  printOptionalAttrDict(attrs);
+  for (const NamedAttribute &opAttr : attrs) {
+    StringAttr opAttrName = opAttr.getName();
+    if (Optional<NamedAttribute> attr = defaultAttrs.getNamed(opAttrName))
+      if (attr.value() == opAttr)
+        elidedAttrs.push_back(opAttrName);
+  }
+
+  printOptionalAttrDict(attrs, elidedAttrs);
 
   // Print the type signature of the operation.
   os << " : ";
   printFunctionalType(op);
 }
 
 void OperationPrinter::printBlockName(Block *block) {
   os << state.getSSANameState().getBlockInfo(block).name;

mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir

 // RUN: mlir-opt %s -convert-vector-to-llvm | FileCheck %s
 // RUN: mlir-opt %s -convert-vector-to-llvm='reassociate-fp-reductions' | FileCheck %s --check-prefix=REASSOC
 
 //
 // CHECK-LABEL: @reduce_add_f32(
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<16xf32>) -> f32
+// CHECK-SAME: : (f32, vector<16xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 //
 // REASSOC-LABEL: @reduce_add_f32(
 // REASSOC-SAME: %[[A:.*]]: vector<16xf32>)
 //      REASSOC: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      REASSOC: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
 // REASSOC-SAME: {reassoc = true} : (f32, vector<16xf32>) -> f32
 //      REASSOC: return %[[V]] : f32
 //
 func.func @reduce_add_f32(%arg0: vector<16xf32>) -> f32 {
   %0 = vector.reduction <add>, %arg0 : vector<16xf32> into f32
   return %0 : f32
 }
 
 //
 // CHECK-LABEL: @reduce_mul_f32(
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fmul"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<16xf32>) -> f32
+// CHECK-SAME: : (f32, vector<16xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 //
 // REASSOC-LABEL: @reduce_mul_f32(
 // REASSOC-SAME: %[[A:.*]]: vector<16xf32>)
 //      REASSOC: %[[C:.*]] = llvm.mlir.constant(1.000000e+00 : f32) : f32
 //      REASSOC: %[[V:.*]] = "llvm.intr.vector.reduce.fmul"(%[[C]], %[[A]])
 // REASSOC-SAME: {reassoc = true} : (f32, vector<16xf32>) -> f32
 //      REASSOC: return %[[V]] : f32
 //
 func.func @reduce_mul_f32(%arg0: vector<16xf32>) -> f32 {
   %0 = vector.reduction <mul>, %arg0 : vector<16xf32> into f32
   return %0 : f32
 }

mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir

func.func @reduce_0d_f32(%arg0: vector<f32>) -> f32 {
   %0 = vector.reduction <add>, %arg0 : vector<f32> into f32
   return %0 : f32
 }
 // CHECK-LABEL: @reduce_0d_f32(
 // CHECK-SAME: %[[A:.*]]: vector<f32>)
 //      CHECK: %[[CA:.*]] = builtin.unrealized_conversion_cast %[[A]] : vector<f32> to vector<1xf32>
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[CA]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<1xf32>) -> f32
+// CHECK-SAME: : (f32, vector<1xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 
 // -----
 
 func.func @reduce_f16(%arg0: vector<16xf16>) -> f16 {
   %0 = vector.reduction <add>, %arg0 : vector<16xf16> into f16
   return %0 : f16
 }
 // CHECK-LABEL: @reduce_f16(
 // CHECK-SAME: %[[A:.*]]: vector<16xf16>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f16) : f16
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f16, vector<16xf16>) -> f16
+// CHECK-SAME: : (f16, vector<16xf16>) -> f16
 //      CHECK: return %[[V]] : f16
 
 // -----
 
 func.func @reduce_f32(%arg0: vector<16xf32>) -> f32 {
   %0 = vector.reduction <add>, %arg0 : vector<16xf32> into f32
   return %0 : f32
 }
 // CHECK-LABEL: @reduce_f32(
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f32) : f32
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f32, vector<16xf32>) -> f32
+// CHECK-SAME: : (f32, vector<16xf32>) -> f32
 //      CHECK: return %[[V]] : f32
 
 // -----
 
 func.func @reduce_f64(%arg0: vector<16xf64>) -> f64 {
   %0 = vector.reduction <add>, %arg0 : vector<16xf64> into f64
   return %0 : f64
 }
 // CHECK-LABEL: @reduce_f64(
 // CHECK-SAME: %[[A:.*]]: vector<16xf64>)
 //      CHECK: %[[C:.*]] = llvm.mlir.constant(0.000000e+00 : f64) : f64
 //      CHECK: %[[V:.*]] = "llvm.intr.vector.reduce.fadd"(%[[C]], %[[A]])
-// CHECK-SAME: {reassoc = false} : (f64, vector<16xf64>) -> f64
+// CHECK-SAME: : (f64, vector<16xf64>) -> f64
 //      CHECK: return %[[V]] : f64
 
 // -----
 
 func.func @reduce_i8(%arg0: vector<16xi8>) -> i8 {
   %0 = vector.reduction <add>, %arg0 : vector<16xi8> into i8
   return %0 : i8
 }

mlir/test/Dialect/LLVMIR/func.mlir

module {
   }
 
   // CHECK: llvm.func weak
   llvm.func weak @weak_linkage() {
     llvm.return
   }
 
   // Omit the `external` linkage, which is the default, in the custom format.
-  // Check that it is present in the generic format using its numeric value.
+  // Check that it is not present in the generic format as well, because
+  // it is the default.
   //
   // CHECK: llvm.func @external_func
-  // GENERIC: linkage = #llvm.linkage<external>
+  // GENERIC: {function_type = !llvm.func<void ()>, sym_name = "external_func"}
   llvm.func external @external_func()
 
   // CHECK-LABEL: llvm.func @arg_struct_attr(
   // CHECK-SAME: %{{.*}}: !llvm.struct<(i32)> {llvm.struct_attrs = [{llvm.noalias}]}) {
   llvm.func @arg_struct_attr(
       %arg0 : !llvm.struct<(i32)> {llvm.struct_attrs = [{llvm.noalias}]}) {
     llvm.return
   }

mlir/test/Target/LLVMIR/Import/intrinsic.ll

define void @vector_reductions(float %0, <8 x float> %1, <8 x i32> %2) {
   ; CHECK: "llvm.intr.vector.reduce.smax"(%{{.*}}) : (vector<8xi32>) -> i32
   %10 = call i32 @llvm.vector.reduce.smax.v8i32(<8 x i32> %2)
   ; CHECK: "llvm.intr.vector.reduce.smin"(%{{.*}}) : (vector<8xi32>) -> i32
   %11 = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> %2)
   ; CHECK: "llvm.intr.vector.reduce.umax"(%{{.*}}) : (vector<8xi32>) -> i32
   %12 = call i32 @llvm.vector.reduce.umax.v8i32(<8 x i32> %2)
   ; CHECK: "llvm.intr.vector.reduce.umin"(%{{.*}}) : (vector<8xi32>) -> i32
   %13 = call i32 @llvm.vector.reduce.umin.v8i32(<8 x i32> %2)
-  ; CHECK: "llvm.intr.vector.reduce.fadd"(%{{.*}}, %{{.*}}) {reassoc = false} : (f32, vector<8xf32>) -> f32
+  ; CHECK: "llvm.intr.vector.reduce.fadd"(%{{.*}}, %{{.*}}) : (f32, vector<8xf32>) -> f32
   %14 = call float @llvm.vector.reduce.fadd.v8f32(float %0, <8 x float> %1)
-  ; CHECK: "llvm.intr.vector.reduce.fmul"(%{{.*}}, %{{.*}}) {reassoc = false} : (f32, vector<8xf32>) -> f32
+  ; CHECK: "llvm.intr.vector.reduce.fmul"(%{{.*}}, %{{.*}}) : (f32, vector<8xf32>) -> f32
   %15 = call float @llvm.vector.reduce.fmul.v8f32(float %0, <8 x float> %1)
   ; CHECK: "llvm.intr.vector.reduce.fadd"(%{{.*}}, %{{.*}}) {reassoc = true} : (f32, vector<8xf32>) -> f32
   %16 = call reassoc float @llvm.vector.reduce.fadd.v8f32(float %0, <8 x float> %1)
   ; CHECK: "llvm.intr.vector.reduce.fmul"(%{{.*}}, %{{.*}}) {reassoc = true} : (f32, vector<8xf32>) -> f32
   %17 = call reassoc float @llvm.vector.reduce.fmul.v8f32(float %0, <8 x float> %1)
   ; CHECK:  "llvm.intr.vector.reduce.xor"(%{{.*}}) : (vector<8xi32>) -> i32
   %18 = call i32 @llvm.vector.reduce.xor.v8i32(<8 x i32> %2)
   ret void

mlir/test/mlir-tblgen/pattern.mlir

 func.func @succeedMatchMissingOptionalAttr() -> i32 {
   // CHECK: "test.match_op_attribute2"() {default_valued_attr = 3 : i32, more_attr = 4 : i32, required_attr = 1 : i32}
   %0 = "test.match_op_attribute1"() {required_attr = 1: i32, default_valued_attr = 3: i32, more_attr = 4: i32} : () -> (i32)
   return %0: i32
 }
 
 // CHECK-LABEL: succeedMatchMissingDefaultValuedAttr
 func.func @succeedMatchMissingDefaultValuedAttr() -> i32 {
-  // CHECK: "test.match_op_attribute2"() {default_valued_attr = 42 : i32, more_attr = 4 : i32, optional_attr = 2 : i32, required_attr = 1 : i32}
+  // default_valued_attr must not be printed out, if it has default value:
+  // CHECK: "test.match_op_attribute2"() {more_attr = 4 : i32, optional_attr = 2 : i32, required_attr = 1 : i32}
   %0 = "test.match_op_attribute1"() {required_attr = 1: i32, optional_attr = 2: i32, more_attr = 4: i32} : () -> (i32)
   return %0: i32
 }
 
 // CHECK-LABEL: failedMatchAdditionalConstraintNotSatisfied
 func.func @failedMatchAdditionalConstraintNotSatisfied() -> i32 {
   // CHECK: "test.match_op_attribute1"()
   %0 = "test.match_op_attribute1"() {required_attr = 1: i32, optional_attr = 2: i32, more_attr = 5: i32} : () -> (i32)