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llvm/test/CodeGen/RISCV/double-arith-strict.ll | ||
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4 | I think CHECK only fits if it's common to all RUN lines in the test. Here I'd prefer CHECKIFD, for instance, as it's a combined check for the IFD cases. |
llvm/test/CodeGen/RISCV/double-fcmp-strict.ll | ||
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3 | CHECKIFD here I think since we still have RV32I and RV64I separate | |
llvm/test/CodeGen/RISCV/double-fcmp.ll | ||
3 | CHECKIFD here too | |
llvm/test/CodeGen/RISCV/float-arith-strict.ll | ||
4 | CHECKIF - there's no D in this test. | |
llvm/test/CodeGen/RISCV/float-arith.ll | ||
3 | CHECKIF here because RV32I/RV64I are still used | |
llvm/test/CodeGen/RISCV/float-convert-strict.ll | ||
4 | CHECKIF - no D | |
llvm/test/CodeGen/RISCV/float-convert.ll | ||
3 | CHECKIF | |
llvm/test/CodeGen/RISCV/float-fcmp-strict.ll | ||
3 | CHECKIF | |
llvm/test/CodeGen/RISCV/float-fcmp.ll | ||
3 | CHECKIF | |
llvm/test/CodeGen/RISCV/float-imm.ll | ||
7 | I think this comment should be left where it is - it refers to the architecture, not the check prefix. | |
llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll | ||
4 | CHECKIF - no D | |
llvm/test/CodeGen/RISCV/float-mem.ll | ||
3 | CHECKIF | |
llvm/test/CodeGen/RISCV/float-round-conv-sat.ll | ||
3 | CHECKIF | |
llvm/test/CodeGen/RISCV/half-arith.ll | ||
3 | CHECKIFZFH so that CHECK doesn't look like it should cover RV32I and RV64I too | |
llvm/test/CodeGen/RISCV/half-convert-strict.ll | ||
4 | CHECKIZFH | |
llvm/test/CodeGen/RISCV/half-convert.ll | ||
3 | No F or D here - CHECKIZFH | |
llvm/test/CodeGen/RISCV/half-fcmp.ll | ||
3 | CHECKIZFH | |
llvm/test/CodeGen/RISCV/half-intrinsics.ll | ||
4 | CHECKIZFH | |
llvm/test/CodeGen/RISCV/half-mem.ll | ||
3 | CHECKIZFH or CHECK | |
llvm/test/CodeGen/RISCV/half-round-conv-sat.ll | ||
3 | CHECKIZFH or CHECK | |
llvm/test/CodeGen/RISCV/half-round-conv.ll | ||
3 | CHECKIZFH or CHECK |
I think CHECK only fits if it's common to all RUN lines in the test. Here I'd prefer CHECKIFD, for instance, as it's a combined check for the IFD cases.