[RISCV] emit .option directive when generate assembly file

[StephenFan]

Summary

This patch add .option norvc, .option nopic and .option norelax directive when generate assembly file

[StephenFan]

add test file

[jrtc27]

We already rejected this in the past. They’re unnecessary if you don’t bogusly drop flags when assembling.

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
     return LowerRISCVMachineOperandToMCOperand(MO, MCOp, *this);
   }
 
   void emitStartOfAsmFile(Module &M) override;
   void emitEndOfAsmFile(Module &M) override;
 
 private:
   void emitAttributes();
+  void emitDirectiveOption();
 };
 }
 
 #define GEN_COMPRESS_INSTR
 #include "RISCVGenCompressInstEmitter.inc"
 void RISCVAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
   MCInst CInst;
   bool Res = compressInst(CInst, Inst, *STI, OutStreamer->getContext());
bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   STI = &NewSTI;
 
   SetupMachineFunction(MF);
   emitFunctionBody();
   return false;
 }
 
 void RISCVAsmPrinter::emitStartOfAsmFile(Module &M) {
-  if (TM.getTargetTriple().isOSBinFormatELF())
-    emitAttributes();
+  if (!TM.getTargetTriple().isOSBinFormatELF())
+    return;
+  emitDirectiveOption();
 }
 
 void RISCVAsmPrinter::emitEndOfAsmFile(Module &M) {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
 
   if (TM.getTargetTriple().isOSBinFormatELF())
     RTS.finishAttributeSection();
 }
 
 void RISCVAsmPrinter::emitAttributes() {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
   RTS.emitTargetAttributes(*STI);
 }
 
+void RISCVAsmPrinter::emitDirectiveOption() {
+  RISCVTargetStreamer &RTS =
+      static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
+
+  if (!isPositionIndependent())
+    RTS.emitDirectiveOptionNoPIC();
+
+  if (!STI->hasFeature(RISCV::FeatureRelax))
+    RTS.emitDirectiveOptionNoRelax();
+
+  if (!STI->hasFeature(RISCV::FeatureStdExtC))
+    RTS.emitDirectiveOptionNoRVC();
+}
+
 // Force static initialization.
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmPrinter() {
   RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());
   RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target());
 }

llvm/test/CodeGen/RISCV/option-directive.ll

+; RUN: llc -mtriple=riscv32 -mattr=-relax %s -o - | FileCheck --check-prefix=RV32-NO-RELAX %s
+; RUN: llc -mtriple=riscv32 -mattr=-c %s -o - | FileCheck --check-prefix=RV32-NO-C-EXTENSION %s
+; RUN: llc -mtriple=riscv32 %s -o - | FileCheck --check-prefix=RV32-NON-POSITION-INDEPENDENT %s
+; RUN: llc -mtriple=riscv64 -mattr=-relax %s -o - | FileCheck --check-prefix=RV64-NO-RELAX %s
+; RUN: llc -mtriple=riscv64 -mattr=-c %s -o - | FileCheck --check-prefix=RV64-NO-C-EXTENSION %s
+; RUN: llc -mtriple=riscv64 %s -o - | FileCheck --check-prefix=RV64-NON-POSITION-INDEPENDENT %s
+
+; RV32-NO-RELAX: .option norelax
+; RV32-NO-C-EXTENSION: .option norvc
+; RV32-NON-POSITION-INDEPENDENT: .option nopic
+; RV64-NO-RELAX: .option norelax
+; RV64-NO-C-EXTENSION: .option norvc
+; RV64-NON-POSITION-INDEPENDENT: .option nopic
+
+define i32 @addi(i32 %a) {
+  %1 = add i32 %a, 1
+  ret i32 %1
+}