[NVPTX] Prefix "$L__" for branch label names

[slydiman]

Summary

A global variable may have the same name as a label, and ptxas does not accept it.
Prefix labels with $L__ to fix this.

[MaskRay]

I know nearly nothing about NVPTX.
GNU assembler calls this property "local label prefix" (https://sourceware.org/binutils/docs/as/Symbol-Names.html#Symbol-Names), which is typically .L on ELF.
This is usually specified by the assembler manual or psABI for the target. For example. AArch64 psABI has a note (can be seen as nonnormative) that ARMCC uses L.

Does NVPTX has such a specification? Also, if you grep PrivateGlobalPrefix = , having such a long PrivateGlobalPrefix is an outlier.

[tra]

LGTM.

In D119669#3319853, @MaskRay wrote:

Does NVPTX has such a specification?

Official spec is here: https://docs.nvidia.com/cuda/parallel-thread-execution/index.html
Unfortunately, it does not say much about labels and whether they have a concept of a local labal.

Also, if you grep PrivateGlobalPrefix = , having such a long PrivateGlobalPrefix is an outlier.

PTX is a rather quirky assembly, so being an outlier is business as usual. :-/

For what it's worth, $L__ is what NVCC uses since CUDA-11.3 : https://godbolt.org/z/3q4be9PrG.
I guess $ alone or $L may be sufficient to avoid name conflicts, but $L__ is fine, too, IMO.

llvm/test/CodeGen/NVPTX/label-var-prefix.ll

17 ↗

(On Diff #408274)

You should also match the trailing : otherwise the check could match one of the the label uses.

[MaskRay]

In D119669#3320132, @tra wrote:

LGTM.

In D119669#3319853, @MaskRay wrote:

Does NVPTX has such a specification?

Official spec is here: https://docs.nvidia.com/cuda/parallel-thread-execution/index.html
Unfortunately, it does not say much about labels and whether they have a concept of a local labal.

Thanks. If there is any channel communicating with them, it'd be nice to have this documented somewhere.

Also, if you grep PrivateGlobalPrefix = , having such a long PrivateGlobalPrefix is an outlier.

PTX is a rather quirky assembly, so being an outlier is business as usual. :-/

For what it's worth, $L__ is what NVCC uses since CUDA-11.3 : https://godbolt.org/z/3q4be9PrG.
I guess $ alone or $L may be sufficient to avoid name conflicts, but $L__ is fine, too, IMO.

Cool. If NVCC uses $L__, this is definitely safe.
@slydiman please update the message to mention that the choice of $L__ matches NVCC (not LLVM local invention).

[MaskRay]

llvm/test/CodeGen/NVPTX/label-var-prefix.ll

6 ↗

(On Diff #408274)

6 ↗

(On Diff #408274)

In case there is an error, make sure $LBB0_2 does not match the pattern.

[tra]

Looks like it broke CUDA:
https://lab.llvm.org/buildbot/#/builders/46/builds/23372/steps/3/logs/stdio

ptxas /tmp/complex-78abf1/complex-sm_75.s, line 250; fatal   : Parsing error near '$L__BB6_2': syntax error

[MaskRay]

The commit message does not mention NVCC uses $L__.

[tra]

In D119669#3320719, @MaskRay wrote:

The commit message does not mention NVCC uses $L__.

Thank you for reverting the patch.

@slydiman please verify that clang-generated PTX with the patch does get accepted by ptxas. I'm not quite sure what went wrong here and we can't test it in clang/llvm in-tree tests as they don't have access to CUDA SDK.

[slydiman]

In D119669#3320786, @tra wrote:

@slydiman please verify that clang-generated PTX with the patch does get accepted by ptxas. I'm not quite sure what went wrong here and we can't test it in clang/llvm in-tree tests as they don't have access to CUDA SDK.

It seems this patch requires CUDA 11.3 and PTX ISA v7.3 at least.

[tra]

In D119669#3322138, @slydiman wrote:

It seems this patch requires CUDA 11.3 and PTX ISA v7.3 at least.

Can you elaborate on what exactly is failing with older versions? AFAICT, $... is accepted by ptxas going back as far as CUDA-9.0: https://godbolt.org/z/G5n7E9xYz

On a side note, it's apparently possible to have a global or function to start with $: https://godbolt.org/z/zW41xPnPd, https://godbolt.org/z/srjdh3a46
So, prefixing with $ does not solve the problem completely.
We may be better off using % or just __ as the prefix. While it's possible to have a conflict with the latter one, at least the end users are not supposed to use it.

In D119669#3322138, @slydiman wrote:

In D119669#3320786, @tra wrote:

@slydiman please verify that clang-generated PTX with the patch does get accepted by ptxas. I'm not quite sure what went wrong here and we can't test it in clang/llvm in-tree tests as they don't have access to CUDA SDK.

It seems this patch requires CUDA 11.3 and PTX ISA v7.3 at least.

[slydiman]

I believe the problem is solved here https://reviews.llvm.org/D123702
I will check everything and resubmit this patch.

[tra]

In D119669#3481191, @tra wrote:

So, prefixing with $ does not solve the problem completely.

Indeed it's still possible to break compilation for both clang and nvcc: https://godbolt.org/z/9h649eMMn

[asavonic]

In D119669#3486842, @tra wrote:

In D119669#3481191, @tra wrote:

So, prefixing with $ does not solve the problem completely.

Indeed it's still possible to break compilation for both clang and nvcc: https://godbolt.org/z/9h649eMMn

I guess that $__ prefix was chosen because it matches nvcc.

We may be better off using % or just __ as the prefix. While it's possible to have a conflict with the latter one, at least the end users are not supposed to use it.

Using % instead of $ sounds like a good idea - it is not a valid identifier in C, and it seems to be supported by ptxas.

[slydiman]

You are right. I’ll look into this more.

llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp

NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple,
   Data64bitsDirective = ".b64 ";
   ZeroDirective = ".b8";
   AsciiDirective = nullptr; // not supported
   AscizDirective = nullptr; // not supported
   SupportsQuotedNames = false;
   SupportsExtendedDwarfLocDirective = false;
   SupportsSignedData = false;
 
+  PrivateGlobalPrefix = "$L__";
+  PrivateLabelPrefix = PrivateGlobalPrefix;
+
   // @TODO: Can we just disable this?
   WeakDirective = "\t// .weak\t";
   GlobalDirective = "\t// .globl\t";
 
   UseIntegratedAssembler = false;
 
   // Avoid using parens for identifiers starting with $ - ptxas does
   // not expect them.
   UseParensForDollarSignNames = false;
 
   // ptxas does not support DWARF `.file fileno directory filename'
   // syntax as of v11.X.
   EnableDwarfFileDirectoryDefault = false;
 }

llvm/test/CodeGen/NVPTX/f16-instructions.ll

 ; CHECK-DAG:  ld.param.b16    [[B:%h[0-9]+]], [test_br_cc_param_1];
 ; CHECK-DAG:  ld.param.u64    %[[C:rd[0-9]+]], [test_br_cc_param_2];
 ; CHECK-DAG:  ld.param.u64    %[[D:rd[0-9]+]], [test_br_cc_param_3];
 ; CHECK-F16-NOFTZ:  setp.lt.f16     [[PRED:%p[0-9]+]], [[A]], [[B]]
 ; CHECK-F16-FTZ:  setp.lt.ftz.f16     [[PRED:%p[0-9]+]], [[A]], [[B]]
 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];
 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];
 ; CHECK-NOF16: setp.lt.f32    [[PRED:%p[0-9]+]], [[AF]], [[BF]]
-; CHECK-NEXT: @[[PRED]] bra   [[LABEL:LBB.*]];
+; CHECK-NEXT: @[[PRED]] bra   [[LABEL:\$L__BB.*]];
 ; CHECK:      st.u32  [%[[C]]],
 ; CHECK:      [[LABEL]]:
 ; CHECK:      st.u32  [%[[D]]],
 ; CHECK:      ret;
 define void @test_br_cc(half %a, half %b, i32* %p1, i32* %p2) #0 {
   %c = fcmp uge half %a, %b
   br i1 %c, label %then, label %else
 then:
   store i32 0, i32* %p1
   ret void
 else:
   store i32 0, i32* %p2
   ret void
 }
 
 ; CHECK-LABEL: test_phi(
 ; CHECK:      ld.param.u64    %[[P1:rd[0-9]+]], [test_phi_param_0];
 ; CHECK:      ld.b16  {{%h[0-9]+}}, [%[[P1]]];
-; CHECK: [[LOOP:LBB[0-9_]+]]:
+; CHECK: [[LOOP:\$L__BB[0-9_]+]]:
 ; CHECK:      mov.b16 [[R:%h[0-9]+]], [[AB:%h[0-9]+]];
 ; CHECK:      ld.b16  [[AB:%h[0-9]+]], [%[[P1]]];
 ; CHECK:      {
 ; CHECK:      st.param.b64    [param0+0], %[[P1]];
 ; CHECK:      call.uni (retval0),
 ; CHECK-NEXT: test_dummy
 ; CHECK:      }
 ; CHECK:      setp.eq.b32     [[PRED:%p[0-9]+]], %r{{[0-9]+}}, 1;

llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll

 ; IR:         [[IndexInc]] = add i64 %loop-index, 1
 ; IR:         [[Cond2:%[0-9]+]] = icmp ult i64 [[IndexInc]], %n
 ; IR:         br i1 [[Cond2]], label %loop-memcpy-expansion, label %post-loop-memcpy-expansion
 
 ; IR-LABEL:   post-loop-memcpy-expansion:
 ; IR:         ret i8* %dst
 
 ; PTX-LABEL:  .visible .func (.param .b64 func_retval0) memcpy_caller
-; PTX:        LBB[[LABEL:[_0-9]+]]:
+; PTX:        $L__BB[[LABEL:[_0-9]+]]:
 ; PTX:        ld.u8 %rs[[REG:[0-9]+]]
 ; PTX:        st.u8 [%rd{{[0-9]+}}], %rs[[REG]]
 ; PTX:        add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
 ; PTX:        setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
-; PTX:        @%p[[PRED]] bra LBB[[LABEL]]
+; PTX:        @%p[[PRED]] bra $L__BB[[LABEL]]
 
 }
 
 define i8* @memcpy_volatile_caller(i8* %dst, i8* %src, i64 %n) #0 {
 entry:
   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %src, i64 %n, i1 true)
   ret i8* %dst
 

 ; IR:         [[Cond2:%[0-9]+]] = icmp ult i64 [[IndexInc]], %n
 ; IR:         br i1 [[Cond2]], label %loop-memcpy-expansion, label %post-loop-memcpy-expansion
 
 ; IR-LABEL:   post-loop-memcpy-expansion:
 ; IR:         ret i8* %dst
 
 
 ; PTX-LABEL:  .visible .func (.param .b64 func_retval0) memcpy_volatile_caller
-; PTX:        LBB[[LABEL:[_0-9]+]]:
+; PTX:        $L__BB[[LABEL:[_0-9]+]]:
 ; PTX:        ld.volatile.u8 %rs[[REG:[0-9]+]]
 ; PTX:        st.volatile.u8 [%rd{{[0-9]+}}], %rs[[REG]]
 ; PTX:        add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
 ; PTX:        setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
-; PTX:        @%p[[PRED]] bra LBB[[LABEL]]
+; PTX:        @%p[[PRED]] bra $L__BB[[LABEL]]
 }
 
 define i8* @memcpy_casting_caller(i32* %dst, i32* %src, i64 %n) #0 {
 entry:
   %0 = bitcast i32* %dst to i8*
   %1 = bitcast i32* %src to i8*
   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 %n, i1 false)
   ret i8* %0

 ; IR:         br i1 [[CMPREG]], label %split, label %loadstoreloop
 ; IR:         loadstoreloop:
 ; IR:         [[STOREPTR:%[0-9]+]] = getelementptr inbounds i8, i8* %dst, i64
 ; IR-NEXT:    store i8 [[VAL]], i8* [[STOREPTR]]
 
 ; PTX-LABEL:  .visible .func (.param .b64 func_retval0) memset_caller(
 ; PTX:        ld.param.u32 %r[[C:[0-9]+]]
 ; PTX:        cvt.u16.u32  %rs[[REG:[0-9]+]], %r[[C]];
-; PTX:        LBB[[LABEL:[_0-9]+]]:
+; PTX:        $L__BB[[LABEL:[_0-9]+]]:
 ; PTX:        st.u8 [%rd{{[0-9]+}}], %rs[[REG]]
 ; PTX:        add.s64 %rd[[COUNTER:[0-9]+]], %rd{{[0-9]+}}, 1
 ; PTX:        setp.lt.u64 %p[[PRED:[0-9]+]], %rd[[COUNTER]], %rd
-; PTX:        @%p[[PRED]] bra LBB[[LABEL]]
+; PTX:        @%p[[PRED]] bra $L__BB[[LABEL]]
 }
 
 define i8* @volatile_memset_caller(i8* %dst, i32 %c, i64 %n) #0 {
 entry:
   %0 = trunc i32 %c to i8
   tail call void @llvm.memset.p0i8.i64(i8* %dst, i8 %0, i64 %n, i1 true)
   ret i8* %dst
 

 ; IR-NEXT:    %index_ptr = sub i64 [[PHIVAL]], 1
 ; IR:         [[FWDPHIVAL:%[0-9a-zA-Z_]+]] = phi i64
 ; IR:         {{%[0-9a-zA-Z_]+}} = add i64 [[FWDPHIVAL]], 1
 
 ; PTX-LABEL:  .visible .func (.param .b64 func_retval0) memmove_caller(
 ; PTX:        ld.param.u64 %rd[[N:[0-9]+]]
 ; PTX-DAG:    setp.eq.s64 %p[[NEQ0:[0-9]+]], %rd[[N]], 0
 ; PTX-DAG:    setp.ge.u64 %p[[SRC_GT_THAN_DST:[0-9]+]], %rd{{[0-9]+}}, %rd{{[0-9]+}}
-; PTX-NEXT:   @%p[[SRC_GT_THAN_DST]] bra LBB[[FORWARD_BB:[0-9_]+]]
+; PTX-NEXT:   @%p[[SRC_GT_THAN_DST]] bra $L__BB[[FORWARD_BB:[0-9_]+]]
 ; -- this is the backwards copying BB
-; PTX:        @%p[[NEQ0]] bra LBB[[EXIT:[0-9_]+]]
+; PTX:        @%p[[NEQ0]] bra $L__BB[[EXIT:[0-9_]+]]
 ; PTX:        add.s64 %rd{{[0-9]}}, %rd{{[0-9]}}, -1
 ; PTX:        ld.u8 %rs[[ELEMENT:[0-9]+]]
 ; PTX:        st.u8 [%rd{{[0-9]+}}], %rs[[ELEMENT]]
 ; -- this is the forwards copying BB
-; PTX:        LBB[[FORWARD_BB]]:
-; PTX:        @%p[[NEQ0]] bra LBB[[EXIT]]
+; PTX:        $L__BB[[FORWARD_BB]]:
+; PTX:        @%p[[NEQ0]] bra $L__BB[[EXIT]]
 ; PTX:        ld.u8 %rs[[ELEMENT2:[0-9]+]]
 ; PTX:        st.u8 [%rd{{[0-9]+}}], %rs[[ELEMENT2]]
 ; PTX:        add.s64 %rd{{[0-9]+}}, %rd{{[0-9]+}}, 1
 ; -- exit block
-; PTX:        LBB[[EXIT]]:
+; PTX:        $L__BB[[EXIT]]:
 ; PTX-NEXT:   st.param.b64 [func_retval0
 ; PTX-NEXT:   ret
 }

llvm/test/DebugInfo/NVPTX/cu-range-hole.ll

 ; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda | FileCheck %s
 ; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-cuda | %ptxas-verify %}
 
 ; CHECK: .target sm_{{[0-9]+}}, debug
 
 ; CHECK: .visible .func  (.param .b32 func_retval0) b(
 ; CHECK: .param .b32 b_param_0
 ; CHECK: )
 ; CHECK: {
 ; CHECK: .loc 1 1 0
-; CHECK: Lfunc_begin0:
+; CHECK: $L__func_begin0:
 ; CHECK: .loc 1 1 0
 ; CHECK: .loc 1 1 0
 ; CHECK: ret;
-; CHECK: Lfunc_end0:
+; CHECK: $L__func_end0:
 ; CHECK: }
 
 ; CHECK: .visible .func  (.param .b32 func_retval0) a(
 ; CHECK: .param .b32 a_param_0
 ; CHECK: )
 ; CHECK: {
-; CHECK: Lfunc_begin1:
+; CHECK: $L__func_begin1:
 ; CHECK-NOT: .loc
 ; CHECK: ret;
-; CHECK: Lfunc_end1:
+; CHECK: $L__func_end1:
 ; CHECK: }
 
 ; CHECK: .visible .func  (.param .b32 func_retval0) d(
 ; CHECK: .param .b32 d_param_0
 ; CHECK: )
 ; CHECK: {
 ; CHECK: .loc 1 3 0
-; CHECK: Lfunc_begin2:
+; CHECK: $L__func_begin2:
 ; CHECK: .loc 1 3 0
 ; CHECK: ret;
-; CHECK: Lfunc_end2:
+; CHECK: $L__func_end2:
 ; CHECK: }
 
 ; CHECK: .file 1 "{{.*}}b.c"
 
 ; Function Attrs: nounwind uwtable
 define i32 @b(i32 %c) #0 !dbg !5 {
 entry:
   %c.addr = alloca i32, align 4

 ; CHECK-NEXT: .b8 47                               // DW_AT_comp_dir
 ; CHECK-NEXT: .b8 115
 ; CHECK-NEXT: .b8 111
 ; CHECK-NEXT: .b8 117
 ; CHECK-NEXT: .b8 114
 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 101
 ; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end2                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end2                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 2                                // Abbrev [2] 0x65:0x27 DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end0                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 1                                // DW_AT_frame_base
 ; CHECK-NEXT: .b8 156
 ; CHECK-NEXT: .b8 98                               // DW_AT_name
 ; CHECK-NEXT: .b8 0
 ; CHECK-NEXT: .b8 1                                // DW_AT_decl_file
 ; CHECK-NEXT: .b8 1                                // DW_AT_decl_line
 ; CHECK-NEXT: .b8 1                                // DW_AT_prototyped
 ; CHECK-NEXT: .b32 179                             // DW_AT_type
 ; CHECK-NEXT: .b8 1                                // DW_AT_external
 ; CHECK-NEXT: .b8 3                                // Abbrev [3] 0x82:0x9 DW_TAG_formal_parameter
 ; CHECK-NEXT: .b8 99                               // DW_AT_name
 ; CHECK-NEXT: .b8 0
 ; CHECK-NEXT: .b8 1                                // DW_AT_decl_file
 ; CHECK-NEXT: .b8 1                                // DW_AT_decl_line
 ; CHECK-NEXT: .b32 179                             // DW_AT_type
 ; CHECK-NEXT: .b8 0                                // End Of Children Mark
 ; CHECK-NEXT: .b8 2                                // Abbrev [2] 0x8c:0x27 DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin2                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end2                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin2                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end2                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 1                                // DW_AT_frame_base
 ; CHECK-NEXT: .b8 156
 ; CHECK-NEXT: .b8 100                              // DW_AT_name
 ; CHECK-NEXT: .b8 0
 ; CHECK-NEXT: .b8 1                                // DW_AT_decl_file
 ; CHECK-NEXT: .b8 3                                // DW_AT_decl_line
 ; CHECK-NEXT: .b8 1                                // DW_AT_prototyped
 ; CHECK-NEXT: .b32 179                             // DW_AT_type

llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll

 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 0
 ; CHECK-NEXT: .b32 .debug_line                     // DW_AT_stmt_list
 ; CHECK-NEXT: .b8 116                              // DW_AT_comp_dir
 ; CHECK-NEXT: .b8 101
 ; CHECK-NEXT: .b8 115
 ; CHECK-NEXT: .b8 116
 ; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end0                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 2                                // Abbrev [2] 0x31:0x3c DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end0                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 1                                // DW_AT_frame_base
 ; CHECK-NEXT: .b8 156
 ; CHECK-NEXT: .b8 117                              // DW_AT_name
 ; CHECK-NEXT: .b8 115
 ; CHECK-NEXT: .b8 101
 ; CHECK-NEXT: .b8 95
 ; CHECK-NEXT: .b8 100
 ; CHECK-NEXT: .b8 98

llvm/test/DebugInfo/NVPTX/debug-addr-class.ll

 ; CHECK-NEXT:.b8 99
 ; CHECK-NEXT:.b8 0
 ; CHECK-NEXT:.b32 .debug_line                        // DW_AT_stmt_list
 ; CHECK-NEXT:.b8 47                                  // DW_AT_comp_dir
 ; CHECK-NEXT:.b8 116
 ; CHECK-NEXT:.b8 109
 ; CHECK-NEXT:.b8 112
 ; CHECK-NEXT:.b8 0
-; CHECK-NEXT:.b64 Lfunc_begin0                       // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0                         // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__func_begin0                    // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__func_end0                      // DW_AT_high_pc
 ; CHECK-NEXT:.b8 2                                   // Abbrev [2] 0x65:0x1a DW_TAG_variable
 ; CHECK-NEXT:.b8 71                                  // DW_AT_name
 ; CHECK-NEXT:.b8 76
 ; CHECK-NEXT:.b8 79
 ; CHECK-NEXT:.b8 66
 ; CHECK-NEXT:.b8 65
 ; CHECK-NEXT:.b8 76
 ; CHECK-NEXT:.b8 0

 ; CHECK-NEXT:.b8 1                                   // DW_AT_external
 ; CHECK-NEXT:.b8 1                                   // DW_AT_decl_file
 ; CHECK-NEXT:.b8 4                                   // DW_AT_decl_line
 ; CHECK-NEXT:.b8 8                                   // DW_AT_address_class
 ; CHECK-NEXT:.b8 9                                   // DW_AT_location
 ; CHECK-NEXT:.b8 3
 ; CHECK-NEXT:.b64 SHARED
 ; CHECK-NEXT:.b8 4                                   // Abbrev [4] 0xa0:0x45 DW_TAG_subprogram
-; CHECK-NEXT:.b64 Lfunc_begin0                       // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0                         // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__func_begin0                    // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__func_end0                      // DW_AT_high_pc
 ; CHECK-NEXT:.b8 1                                   // DW_AT_frame_base
 ; CHECK-NEXT:.b8 156
 ; CHECK-NEXT:.b8 116                                 // DW_AT_MIPS_linkage_name
 ; CHECK-NEXT:.b8 101
 ; CHECK-NEXT:.b8 115
 ; CHECK-NEXT:.b8 116
 ; CHECK-NEXT:.b8 0
 ; CHECK-NEXT:.b8 116                                 // DW_AT_name

llvm/test/DebugInfo/NVPTX/debug-file-loc.ll

 ; CHECK-NEXT: .b8 114
 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 101
 ; CHECK-NEXT: .b8 47
 ; CHECK-NEXT: .b8 100
 ; CHECK-NEXT: .b8 105
 ; CHECK-NEXT: .b8 114
 ; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end1                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end1                   // DW_AT_high_pc
 ; CHECK-NEXT: }
 ; CHECK-NEXT: .section .debug_loc { }
 ; CHECK-NOT: debug_
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!8, !9}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "", isOptimized: false, runtimeVersion: 0, emissionKind: LineTablesOnly, enums: !2)

llvm/test/DebugInfo/NVPTX/debug-info.ll

 ; CHECK: mov.u32         %r{{.+}}, %ntid.x;
 ; CHECK: .loc [[BUILTUIN_VARS_H]] 67 180
 ; CHECK: mov.u32         %r{{.+}}, %tid.x;
 ; CHECK: .loc [[DEBUG_INFO_CU]] 6 35
 ; CHECK: mad.lo.s32      %r{{.+}}, %r{{.+}}, %r{{.+}}, %r{{.+}};
 ; CHECK: .loc [[DEBUG_INFO_CU]] 7 9
 ; CHECK: setp.ge.s32     %p{{.+}}, %r{{.+}}, %r{{.+}};
 ; CHECK: .loc [[DEBUG_INFO_CU]] 7 7
-; CHECK: @%p{{.+}} bra   [[BB:.+]];
+; CHECK: @%p{{.+}} bra   [[BB:\$L__.+]];
 ; CHECK: ld.param.f32    %f{{.+}}, [{{.+}}];
 ; CHECK: ld.param.u64    %rd{{.+}}, [{{.+}}];
 ; CHECK: cvta.to.global.u64      %rd{{.+}}, %rd{{.+}};
 ; CHECK: ld.param.u64    %rd{{.+}}, [{{.+}}];
 ; CHECK: cvta.to.global.u64      %rd{{.+}}, %rd{{.+}};
 ; CHECK: mul.wide.u32    %rd{{.+}}, %r{{.+}}, 4;
 ; CHECK: add.s64         %rd{{.+}}, %rd{{.+}}, %rd{{.+}};
 ; CHECK: .loc [[DEBUG_INFO_CU]] 8 13

 ; CHECK-NEXT:.b8 114
 ; CHECK-NEXT:.b8 101
 ; CHECK-NEXT:.b8 99
 ; CHECK-NEXT:.b8 116
 ; CHECK-NEXT:.b8 111
 ; CHECK-NEXT:.b8 114
 ; CHECK-NEXT:.b8 121
 ; CHECK-NEXT:.b8 0
-; CHECK-NEXT:.b64 Lfunc_begin0                       // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0                         // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__func_begin0                    // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__func_end0                      // DW_AT_high_pc
 ; CHECK-NEXT:.b8 2                                   // Abbrev [2] 0x41:0x588 DW_TAG_namespace
 ; CHECK-NEXT:.b8 115                                 // DW_AT_name
 ; CHECK-NEXT:.b8 116
 ; CHECK-NEXT:.b8 100
 ; CHECK-NEXT:.b8 0
 ; CHECK-NEXT:.b8 3                                   // Abbrev [3] 0x46:0x7 DW_TAG_imported_declaration
 ; CHECK-NEXT:.b8 1                                   // DW_AT_decl_file
 ; CHECK-NEXT:.b8 202                                 // DW_AT_decl_line

 ; CHECK-NEXT:.b8 101
 ; CHECK-NEXT:.b8 115
 ; CHECK-NEXT:.b8 0
 ; CHECK-NEXT:.b8 12                                  // DW_AT_decl_file
 ; CHECK-NEXT:.b8 3                                   // DW_AT_decl_line
 ; CHECK-NEXT:.b32 3345                               // DW_AT_type
 ; CHECK-NEXT:.b8 0                                   // End Of Children Mark
 ; CHECK-NEXT:.b8 40                                  // Abbrev [40] 0x2671:0xbf DW_TAG_subprogram
-; CHECK-NEXT:.b64 Lfunc_begin0                       // DW_AT_low_pc
-; CHECK-NEXT:.b64 Lfunc_end0                         // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__func_begin0                    // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__func_end0                      // DW_AT_high_pc
 ; CHECK-NEXT:.b8 1                                   // DW_AT_frame_base
 ; CHECK-NEXT:.b8 156
 ; CHECK-NEXT:.b8 95                                  // DW_AT_MIPS_linkage_name
 ; CHECK-NEXT:.b8 90
 ; CHECK-NEXT:.b8 53
 ; CHECK-NEXT:.b8 115
 ; CHECK-NEXT:.b8 97
 ; CHECK-NEXT:.b8 120

 ; CHECK-NEXT:.b8 41                                  // Abbrev [41] 0x26c0:0x9 DW_TAG_variable
 ; CHECK-NEXT:.b8 105                                 // DW_AT_name
 ; CHECK-NEXT:.b8 0
 ; CHECK-NEXT:.b8 12                                  // DW_AT_decl_file
 ; CHECK-NEXT:.b8 6                                   // DW_AT_decl_line
 ; CHECK-NEXT:.b32 2332                               // DW_AT_type
 ; CHECK-NEXT:.b8 42                                  // Abbrev [42] 0x26c9:0x18 DW_TAG_inlined_subroutine
 ; CHECK-NEXT:.b32 8432                               // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp0                              // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp1                              // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__tmp0                           // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__tmp1                           // DW_AT_high_pc
 ; CHECK-NEXT:.b8 12                                  // DW_AT_call_file
 ; CHECK-NEXT:.b8 6                                   // DW_AT_call_line
 ; CHECK-NEXT:.b8 11                                  // DW_AT_call_column
 ; CHECK-NEXT:.b8 42                                  // Abbrev [42] 0x26e1:0x18 DW_TAG_inlined_subroutine
 ; CHECK-NEXT:.b32 9191                               // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp1                              // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp2                              // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__tmp1                           // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__tmp2                           // DW_AT_high_pc
 ; CHECK-NEXT:.b8 12                                  // DW_AT_call_file
 ; CHECK-NEXT:.b8 6                                   // DW_AT_call_line
 ; CHECK-NEXT:.b8 24                                  // DW_AT_call_column
 ; CHECK-NEXT:.b8 42                                  // Abbrev [42] 0x26f9:0x18 DW_TAG_inlined_subroutine
 ; CHECK-NEXT:.b32 9785                               // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp2                              // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp3                              // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__tmp2                           // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__tmp3                           // DW_AT_high_pc
 ; CHECK-NEXT:.b8 12                                  // DW_AT_call_file
 ; CHECK-NEXT:.b8 6                                   // DW_AT_call_line
 ; CHECK-NEXT:.b8 37                                  // DW_AT_call_column
 ; CHECK-NEXT:.b8 43                                  // Abbrev [43] 0x2711:0x1e DW_TAG_inlined_subroutine
 ; CHECK-NEXT:.b32 9791                               // DW_AT_abstract_origin
-; CHECK-NEXT:.b64 Ltmp9                              // DW_AT_low_pc
-; CHECK-NEXT:.b64 Ltmp10                             // DW_AT_high_pc
+; CHECK-NEXT:.b64 $L__tmp9                           // DW_AT_low_pc
+; CHECK-NEXT:.b64 $L__tmp10                          // DW_AT_high_pc
 ; CHECK-NEXT:.b8 12                                  // DW_AT_call_file
 ; CHECK-NEXT:.b8 8                                   // DW_AT_call_line
 ; CHECK-NEXT:.b8 5                                   // DW_AT_call_column
 ; CHECK-NEXT:.b8 44                                  // Abbrev [44] 0x2729:0x5 DW_TAG_formal_parameter
 ; CHECK-NEXT:.b32 9820                               // DW_AT_abstract_origin
 ; CHECK-NEXT:.b8 0                                   // End Of Children Mark
 ; CHECK-NEXT:.b8 0                                   // End Of Children Mark
 ; CHECK-NEXT:.b8 0                                   // End Of Children Mark

llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll

 ; RUN: llc -mtriple=nvptx64-nvidia-cuda < %s | FileCheck %s
 ; RUN: %if ptxas %{ llc -mtriple=nvptx64-nvidia-cuda < %s | %ptxas-verify %}
 
 ; CHECK: .target sm_{{[0-9]+}}, debug
 
 ; CHECK: .extern .func  (.param .b32 func_retval0) _ZN1A3fooEv
 ; CHECK: (
 ; CHECK: .param .b64 _ZN1A3fooEv_param_0
 ; CHECK: )
 
 %struct.A = type { i32 (...)**, i32 }
 
 ; CHECK: .visible .func  (.param .b32 func_retval0) _Z3bari(
 ; CHECK: {
 ; CHECK: .loc [[CU1:[0-9]+]] 1 0
-; CHECK: Lfunc_begin0:
+; CHECK: $L__func_begin0:
 ; CHECK: .loc [[CU1]] 1 0
 
 ; CHECK: //DEBUG_VALUE: bar:b <- {{[0-9]+}}
 ; CHECK: //DEBUG_VALUE: bar:b <- {{[0-9]+}}
 ; CHECK: .loc [[CU1]] 2 0
 ; CHECK: ret;
 ; CHECK: }
 

 ; Function Attrs: nounwind readnone
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
 
 ; CHECK: .visible .func _Z3baz1A(
 ; CHECK: {
 ; CHECK: .loc [[CU2:[0-9]+]] 6 0
-; CHECK: Lfunc_begin1:
+; CHECK: $L__func_begin1:
 ; CHECK: .loc [[CU2]] 6 0
 ; CHECK-NOT: //DEBUG_VALUE: baz:z
 ; CHECK: //DEBUG_VALUE: baz:z <- undef
 ; CHECK: .loc [[CU2]] 10 0
 ; CHECK: ret;
 ; CHECK: }
 
 define void @_Z3baz1A(%struct.A* %a) #2 !dbg !14 {

 ; CHECK-NEXT: .b8 97
 ; CHECK-NEXT: .b8 107
 ; CHECK-NEXT: .b8 101
 ; CHECK-NEXT: .b8 95
 ; CHECK-NEXT: .b8 103
 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin1                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end1                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin1                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end1                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 2                                // Abbrev [2] 0x64:0x4 DW_TAG_structure_type
 ; CHECK-NEXT: .b8 65                               // DW_AT_name
 ; CHECK-NEXT: .b8 0
 ; CHECK-NEXT: .b8 1                                // DW_AT_declaration
 ; CHECK-NEXT: .b8 3                                // Abbrev [3] 0x68:0x3a DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin1                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end1                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin1                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end1                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 1                                // DW_AT_frame_base
 ; CHECK-NEXT: .b8 156
 ; CHECK-NEXT: .b8 95                               // DW_AT_MIPS_linkage_name
 ; CHECK-NEXT: .b8 90
 ; CHECK-NEXT: .b8 51
 ; CHECK-NEXT: .b8 98
 ; CHECK-NEXT: .b8 97
 ; CHECK-NEXT: .b8 122

 ; CHECK-NEXT: .b8 97
 ; CHECK-NEXT: .b8 107
 ; CHECK-NEXT: .b8 101
 ; CHECK-NEXT: .b8 95
 ; CHECK-NEXT: .b8 103
 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 99
 ; CHECK-NEXT: .b8 0
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end0                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 6                                // Abbrev [6] 0x64:0x30 DW_TAG_subprogram
-; CHECK-NEXT: .b64 Lfunc_begin0                    // DW_AT_low_pc
-; CHECK-NEXT: .b64 Lfunc_end0                      // DW_AT_high_pc
+; CHECK-NEXT: .b64 $L__func_begin0                 // DW_AT_low_pc
+; CHECK-NEXT: .b64 $L__func_end0                   // DW_AT_high_pc
 ; CHECK-NEXT: .b8 1                                // DW_AT_frame_base
 ; CHECK-NEXT: .b8 156
 ; CHECK-NEXT: .b8 95                               // DW_AT_MIPS_linkage_name
 ; CHECK-NEXT: .b8 90
 ; CHECK-NEXT: .b8 51
 ; CHECK-NEXT: .b8 98
 ; CHECK-NEXT: .b8 97
 ; CHECK-NEXT: .b8 114

llvm/test/DebugInfo/NVPTX/debug-name-table.ll

 ; RUN: llc -mtriple=nvptx64-nvidia-cuda -mattr=+ptx75 < %s | FileCheck %s
 ; RUN: %if ptxas-11.5 %{ llc -mtriple=nvptx64-nvidia-cuda -mattr=+ptx75 < %s | %ptxas-verify %}
 
 ; DICompileUnit without 'nameTableKind: None' results in
 ; debug_pubnames and debug_pubtypes sections in DWARF. These sections
 ; use labels and label expressions, and ptxas requires PTX v7.5 to
 ; support them.
 
 ; CHECK-LABEL: .section .debug_pubnames
 ; CHECK-NEXT: {
-; CHECK-NEXT: .b32 LpubNames_end0-LpubNames_start0
-; CHECK-NEXT: LpubNames_start0:
-; CHECK:      LpubNames_end0:
+; CHECK-NEXT: .b32 $L__pubNames_end0-$L__pubNames_start0
+; CHECK-NEXT: $L__pubNames_start0:
+; CHECK:      $L__pubNames_end0:
 ; CHECK-NEXT: }
 
 ; CHECK-LABEL: .section .debug_pubtypes
 ; CHECK-NEXT: {
-; CHECK-NEXT: .b32 LpubTypes_end0-LpubTypes_start0
-; CHECK-NEXT: LpubTypes_start0:
-; CHECK:      LpubTypes_end0:
+; CHECK-NEXT: .b32 $L__pubTypes_end0-$L__pubTypes_start0
+; CHECK-NEXT: $L__pubTypes_start0:
+; CHECK:      $L__pubTypes_end0:
 ; CHECK-NEXT: }
 
 ; Function Attrs: nounwind ssp uwtable
 define i32 @foo() #0 !dbg !4 {
 entry:
   ret i32 0
 }