- User Since
- Jun 2 2016, 11:01 PM (263 w, 3 d)
Wed, Jun 16
@erichkeane, can you please check if this patch is OK for Clang?
Wed, Jun 9
Mon, Jun 7
Sun, Jun 6
- Used llvm::TrackingVH to track Init changes.
Thu, Jun 3
Fri, May 28
Thu, May 27
- Disabled double or float return for x86 targets
- Refactored checks into a separate function.
Wed, May 26
Tue, May 25
Mon, May 24
Added LIT run lines for i686 and windows targets.
I went ahead and implemented a fix for EmitGlobalVarDefinition. Please let me know what approach is preferable: Diff 339986 or Diff 347341.
May 21 2021
May 20 2021
May 19 2021
- Applied CR comments.
May 18 2021
@SjoerdMeijer, can you please check if the new revision of the patch is OK?
- Used TLI.SimplifyDemandedBits for performShiftCombine.
- Extended SimplifyDemandedBits to cover AArch64 VLSHR + VSHL.
May 14 2021
Thanks a lot Dave! I'll follow your first suggestion, and if does not work, we can get back to the original patch.
May 12 2021
May 5 2021
May 4 2021
Apr 29 2021
Apr 26 2021
The option was added in D19658 and D13979, but I'm not sure how it is supposed to work for SystemV ABI.
GCC emits an error if long double type is used with -mno-x87: "test.c:37:1: error: x87 register return with x87 disabled".
Keep rounding of return values for big-endian targets.
Apr 23 2021
John, can you please review this patch?
I originally wanted to add a diagnostic to prevent the crash in CG (PR49198), but the case seems easy enough to support.
Apr 22 2021
Please let me know if the patch is acceptable for AArch64, or something else should be done to avoid overhead from rounding of return values.
Apr 15 2021
Apr 12 2021
There were two issues with the patch, so I reverted it:
Apr 11 2021
So we can just remove this rounding from classifyReturnType?
Thanks a lot John! I will upload this change as a separate review.
Apr 9 2021
Added test cases for fp16 to the MIR test.
- Removed extra assert
- Removed arguments that can be queried from Root
- Removed assignments to RC and Opc
- Changed tests to ensure that basic blocks are not merged
- Added fp16 cases to arm64-fma-combines.ll
Apr 8 2021
Apr 7 2021
Enabled auto-generated checks for all tests except the XFAIL'ed ones.
I've uploaded a separate patch for the FIXME issue: https://reviews.llvm.org/D100047
Let me know if anything should be fixed or improved for this one.
Mar 31 2021
Mar 26 2021
- Adjusted SDIV operands to match the average latency specified in the model.
- Added FP tests.
- Added a test for instructions with OOO write and retire.
Mar 25 2021
Thanks for the review Andrea!
- Refactored code, added updateCarriedOver function
- Used a different prefix for non-event debugging messages
Mar 24 2021
Mar 23 2021
- Enabled negative readadvance tracking.
- Reverted unnecessary changes in RetireStage.
Mar 22 2021
Mar 19 2021
Removed RetireStage from the in-order pipeline.
Retire and execute events are emitted in the same cycle.
Mar 18 2021
I'm not sure that this is the right approach, but I wanted to get feedback on
how the issue should be fixed. Currently, the compiler crashes on almost any
code with long double and -mno-x87 (excluding cases where CG does not properly disable x87):
RCU is now optional for RetireStage
RCU statistic is disabled for in-order processors.
Mar 16 2021
Store LastWriteBackCycle instead of recomputing it.