Demo fix for performance-unnecessary-value-param (WIP)

[Mogball]

mlir/lib/Dialect/StandardOps/IR/Ops.cpp

1166

TypeRangeRange is too large to be passed by value?

[mehdi_amini]

mlir/lib/Dialect/StandardOps/IR/Ops.cpp

1166

From the doc:

The check is only applied to parameters of types that are expensive to copy which means they are not trivially copyable or have a non-trivial copy constructor or destructor.

Maybe there is something to fix in the TypeRangeRange class?

[mehdi_amini]

Full repo run

[Mogball]

mlir/lib/Dialect/StandardOps/IR/Ops.cpp

1166

The class has two std::functions inside of it

[arjunp]

mlir/unittests/Analysis/Presburger/SimplexTest.cpp

97 ↗

(On Diff #396476)

Not sure if this should be done in this patch but I guess ArrayRef should be used instead of const SmallVector &.

[mehdi_amini]

Apply a few manual fixes, for example const std::function<> & -> llvm::function_ref<>

mlir/include/mlir/Dialect/Async/Transforms.h

 /// Must return an index type.
 using AsyncMinTaskSizeComputationFunction =
     std::function<Value(ImplicitLocOpBuilder, scf::ParallelOp)>;
 
 /// Add a pattern to the given pattern list to lower scf.parallel to async
 /// operations.
 void populateAsyncParallelForPatterns(
     RewritePatternSet &patterns, bool asyncDispatch, int32_t numWorkerThreads,
-    AsyncMinTaskSizeComputationFunction computeMinTaskSize);
+    const AsyncMinTaskSizeComputationFunction &computeMinTaskSize);
 
 } // namespace async
 } // namespace mlir
 
 #endif // MLIR_DIALECT_ASYNC_TRANSFORMS_H_

mlir/include/mlir/TableGen/GenInfo.h

 /// GenRegistration provides a global initializer that registers a generator
 /// function.
 ///
 /// Usage:
 ///
 ///   // At namespace scope.
 ///   static GenRegistration Print("print", "Print records", [](...){...});
 struct GenRegistration {
-  GenRegistration(StringRef arg, StringRef description, GenFunction function);
+  GenRegistration(StringRef arg, StringRef description,
+                  const GenFunction &function);
 };
 
 } // namespace mlir
 
 #endif // MLIR_TABLEGEN_GENINFO_H_

mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp

 //===- AsyncParallelFor.cpp - Implementation of Async Parallel For --------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements scf.parallel to scf.for + async.execute conversion pass.
 //
 //===----------------------------------------------------------------------===//
 
+#include <utility>
+
 #include "PassDetail.h"
 #include "mlir/Dialect/Arithmetic/IR/Arithmetic.h"
 #include "mlir/Dialect/Async/IR/Async.h"
 #include "mlir/Dialect/Async/Passes.h"
 #include "mlir/Dialect/Async/Transforms.h"
 #include "mlir/Dialect/SCF/SCF.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
 #include "mlir/IR/BlockAndValueMapping.h"

 
 struct AsyncParallelForRewrite : public OpRewritePattern<scf::ParallelOp> {
 public:
   AsyncParallelForRewrite(
       MLIRContext *ctx, bool asyncDispatch, int32_t numWorkerThreads,
       AsyncMinTaskSizeComputationFunction computeMinTaskSize)
       : OpRewritePattern(ctx), asyncDispatch(asyncDispatch),
         numWorkerThreads(numWorkerThreads),
-        computeMinTaskSize(computeMinTaskSize) {}
+        computeMinTaskSize(std::move(computeMinTaskSize)) {}
 
   LogicalResult matchAndRewrite(scf::ParallelOp op,
                                 PatternRewriter &rewriter) const override;
 
 private:
   bool asyncDispatch;
   int32_t numWorkerThreads;
   AsyncMinTaskSizeComputationFunction computeMinTaskSize;
getParallelComputeFunctionType(scf::ParallelOp op, PatternRewriter &rewriter) {
 
   // Convert captures to vector for later convenience.
   SmallVector<Value> capturesVector(captures.begin(), captures.end());
   return {rewriter.getFunctionType(inputs, TypeRange()), capturesVector};
 }
 
 // Create a parallel compute fuction from the parallel operation.
 static ParallelComputeFunction createParallelComputeFunction(
-    scf::ParallelOp op, ParallelComputeFunctionBounds bounds,
+    scf::ParallelOp op, const ParallelComputeFunctionBounds &bounds,
     unsigned numBlockAlignedInnerLoops, PatternRewriter &rewriter) {
   OpBuilder::InsertionGuard guard(rewriter);
   ImplicitLocOpBuilder b(op.getLoc(), rewriter);
 
   ModuleOp module = op->getParentOfType<ModuleOp>();
 
   ParallelComputeFunctionType computeFuncType =
       getParallelComputeFunctionType(op, rewriter);
std::unique_ptr<Pass> mlir::createAsyncParallelForPass(bool asyncDispatch,
                                                        int32_t numWorkerThreads,
                                                        int32_t minTaskSize) {
   return std::make_unique<AsyncParallelForPass>(asyncDispatch, numWorkerThreads,
                                                 minTaskSize);
 }
 
 void mlir::async::populateAsyncParallelForPatterns(
     RewritePatternSet &patterns, bool asyncDispatch, int32_t numWorkerThreads,
-    AsyncMinTaskSizeComputationFunction computeMinTaskSize) {
+    const AsyncMinTaskSizeComputationFunction &computeMinTaskSize) {
   MLIRContext *ctx = patterns.getContext();
   patterns.add<AsyncParallelForRewrite>(ctx, asyncDispatch, numWorkerThreads,
                                         computeMinTaskSize);
 }

mlir/lib/Dialect/StandardOps/IR/Ops.cpp

static ParseResult parseSwitchOpCases(
   }
   return success();
 }
 
 static void printSwitchOpCases(
     OpAsmPrinter &p, SwitchOp op, Type flagType, Block *defaultDestination,
     OperandRange defaultOperands, TypeRange defaultOperandTypes,
     DenseIntElementsAttr caseValues, SuccessorRange caseDestinations,
-    OperandRangeRange caseOperands, TypeRangeRange caseOperandTypes) {
+    OperandRangeRange caseOperands, const TypeRangeRange &caseOperandTypes) {
   p << "  default: ";
   p.printSuccessorAndUseList(defaultDestination, defaultOperands);
 
   if (!caseValues)
     return;
 
   for (const auto &it : llvm::enumerate(caseValues.getValues<APInt>())) {
     p << ',';

 /// Helper for folding a switch with a constant value.
 /// switch %c_42 : i32, [
 ///   default: ^bb1 ,
 ///   42: ^bb2,
 ///   43: ^bb3
 /// ]
 /// -> br ^bb2
 static void foldSwitch(SwitchOp op, PatternRewriter &rewriter,
-                       APInt caseValue) {
+                       const APInt &caseValue) {
   auto caseValues = op.getCaseValues();
   for (const auto &it : llvm::enumerate(caseValues->getValues<APInt>())) {
     if (it.value() == caseValue) {
       rewriter.replaceOpWithNewOp<BranchOp>(
           op, op.getCaseDestinations()[it.index()],
           op.getCaseOperands(it.index()));
       return;
     }

mlir/lib/Dialect/Utils/ReshapeOpsUtils.cpp

unsigned getMaxPosOfType(ArrayRef<ReassociationExprs> exprArrays) {
   }
   return pos;
 }
 
 ArrayAttr mlir::getReassociationIndicesAttribute(
     OpBuilder &b, ArrayRef<ReassociationIndices> reassociation) {
   SmallVector<Attribute, 4> reassociationAttr =
       llvm::to_vector<4>(llvm::map_range(
-          reassociation, [&](ReassociationIndices indices) -> Attribute {
+          reassociation, [&](const ReassociationIndices &indices) -> Attribute {
             return b.getI64ArrayAttr(indices).cast<Attribute>();
           }));
   return b.getArrayAttr(reassociationAttr);
 }
 
 SmallVector<ReassociationIndices, 2> mlir::convertReassociationMapsToIndices(
     OpBuilder & /*b*/, ArrayRef<ReassociationExprs> reassociationExprs) {
   SmallVector<ReassociationIndices, 2> reassociationIndices;

mlir/test/lib/Dialect/Linalg/TestLinalgCodegenStrategy.cpp

 //===- TestLinalgCodegenStrategy.cpp - Test Linalg codegen strategy -------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements logic for testing the Linalg codegen strategy.
 //
 //===----------------------------------------------------------------------===//
 
+#include <utility>
+
 #include "mlir/Dialect/Affine/IR/AffineOps.h"
 #include "mlir/Dialect/GPU/GPUDialect.h"
 #include "mlir/Dialect/Linalg/IR/Linalg.h"
 #include "mlir/Dialect/Linalg/Transforms/CodegenStrategy.h"
 #include "mlir/Dialect/Linalg/Utils/Utils.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
 #include "mlir/Dialect/Vector/VectorOps.h"
 #include "mlir/IR/PatternMatch.h"
void TestLinalgCodegenStrategy::runStrategy(
     LinalgTilingOptions tilingOptions,
     LinalgTilingOptions registerTilingOptions,
     LinalgPaddingOptions paddingOptions,
     vector::VectorContractLowering vectorContractLowering,
     vector::VectorTransferSplit vectorTransferSplit) {
   CodegenStrategy strategy;
   strategy
       .tileAndFuseIf(fuse && !tileSizes.empty(), anchorOpName,
-                     tilingAndFusionOptions)
-      .tileIf(!fuse && !tileSizes.empty(), anchorOpName, tilingOptions)
+                     std::move(tilingAndFusionOptions))
+      .tileIf(!fuse && !tileSizes.empty(), anchorOpName,
+              std::move(tilingOptions))
       .promoteIf(!fuse && promote, anchorOpName,
                  LinalgPromotionOptions()
                      .setAlignment(16)
                      .setUseFullTileBuffersByDefault(promoteFullTile))
       .tileIf(!fuse && !registerTileSizes.empty(), anchorOpName,
-              registerTilingOptions)
+              std::move(registerTilingOptions))
       .promoteIf(!fuse && registerPromote, anchorOpName,
                  LinalgPromotionOptions()
                      .setAlignment(16)
                      .setUseFullTileBuffersByDefault(registerPromoteFullTile))
-      .padIf(pad, "", paddingOptions)
+      .padIf(pad, "", std::move(paddingOptions))
       .decomposeIf(decompose)
       .generalizeIf(generalize, "")
       .interchangeIf(!iteratorInterchange.empty(), iteratorInterchange)
       .vectorizeIf(vectorize, "", nullptr, vectorizePadding)
       .vectorLowering(
           LinalgVectorLoweringOptions()
               .setVectorTransformsOptions(
                   vector::VectorTransformsOptions()

mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp

 }
 
 static void applyExtractSliceOfPadTensorSwapPattern(FuncOp funcOp) {
   RewritePatternSet patterns(funcOp.getContext());
   patterns.add<ExtractSliceOfPadTensorSwapPattern>(funcOp.getContext());
   (void)applyPatternsAndFoldGreedily(funcOp, std::move(patterns));
 }
 
-static void applyTilePattern(FuncOp funcOp, std::string loopType,
+static void applyTilePattern(FuncOp funcOp, const std::string &loopType,
                              ArrayRef<int64_t> tileSizes,
                              ArrayRef<int64_t> peeledLoops,
                              bool scalarizeDynamicDims) {
   MLIRContext *context = funcOp.getContext();
   RewritePatternSet tilingPattern(context);
   LinalgTilingLoopType type =
       llvm::StringSwitch<LinalgTilingLoopType>(loopType)
           .Case("for", LinalgTilingLoopType::Loops)

mlir/tools/mlir-tblgen/DialectGen.cpp

 /// The code block for the op interface fallback hook.
 static const char *const operationInterfaceFallbackDecl = R"(
     /// Provides a hook for op interface.
     void *getRegisteredInterfaceForOp(mlir::TypeID interfaceID,
                                       mlir::OperationName opName) override;
 )";
 
 /// Generate the declaration for the given dialect class.
-static void emitDialectDecl(Dialect &dialect,
-                            iterator_range<DialectFilterIterator> dialectAttrs,
-                            iterator_range<DialectFilterIterator> dialectTypes,
-                            raw_ostream &os) {
+static void
+emitDialectDecl(Dialect &dialect,
+                const iterator_range<DialectFilterIterator> &dialectAttrs,
+                const iterator_range<DialectFilterIterator> &dialectTypes,
   /// Build the list of dependent dialects
   std::string dependentDialectRegistrations;
   {
     llvm::raw_string_ostream dialectsOs(dependentDialectRegistrations);
     for (StringRef dependentDialect : dialect.getDependentDialects())
       dialectsOs << llvm::formatv(dialectRegistrationTemplate,
                                   dependentDialect);
   }

mlir/tools/mlir-tblgen/OpDocGen.cpp

do {
     split = split.second.split('\n');
     StringRef formatChunk = split.first.trim();
     if (!formatChunk.empty())
       os.indent(indent) << formatChunk << "\n";
   } while (!split.second.empty());
   os << "```\n\n";
 }
 
-static void emitOpTraitsDoc(Operator op, raw_ostream &os) {
+static void emitOpTraitsDoc(const Operator &op, raw_ostream &os) {
   // TODO: We should link to the trait/documentation of it. That also means we
   // should add descriptions to traits that can be queried.
   // Collect using set to sort effects, interfaces & traits.
   std::set<std::string> effects, interfaces, traits;
   for (auto &trait : op.getTraits()) {
     if (isa<PredTrait>(&trait))
       continue;
 

mlir/tools/mlir-tblgen/OpFormatGen.cpp

private:
   /// same type as all of the operands.
   void handleSameTypesConstraint(
       llvm::StringMap<TypeResolutionInstance> &variableTyResolver,
       bool includeResults);
   /// Check for inferable type resolution based on another operand, result, or
   /// attribute.
   void handleTypesMatchConstraint(
       llvm::StringMap<TypeResolutionInstance> &variableTyResolver,
-      llvm::Record def);
+      const llvm::Record &def);
 
   /// Returns an argument or attribute with the given name that has been seen
   /// within the format.
   ConstArgument findSeenArg(StringRef name);
 
   /// Parse a specific element.
   LogicalResult parseElement(std::unique_ptr<Element> &element,
                              ParserContext context);
if (includeResults) {
     for (unsigned i = 0, e = op.getNumResults(); i != e; ++i)
       if (!seenResultTypes.test(i) && !op.getResultName(i).empty())
         variableTyResolver[op.getResultName(i)] = {resolver, llvm::None};
   }
 }
 
 void FormatParser::handleTypesMatchConstraint(
     llvm::StringMap<TypeResolutionInstance> &variableTyResolver,
-    llvm::Record def) {
+    const llvm::Record &def) {
   StringRef lhsName = def.getValueAsString("lhs");
   StringRef rhsName = def.getValueAsString("rhs");
   StringRef transformer = def.getValueAsString("transformer");
   if (ConstArgument arg = findSeenArg(lhsName))
     variableTyResolver[rhsName] = {arg, transformer};
 }
 
 ConstArgument FormatParser::findSeenArg(StringRef name) {

mlir/tools/mlir-tblgen/OpInterfacesGen.cpp

struct TypeInterfaceGenerator : public InterfaceGenerator {
   }
 };
 } // namespace
 
 //===----------------------------------------------------------------------===//
 // GEN: Interface definitions
 //===----------------------------------------------------------------------===//
 
-static void emitInterfaceDef(Interface interface, StringRef valueType,
+static void emitInterfaceDef(const Interface &interface, StringRef valueType,
                              raw_ostream &os) {
   StringRef interfaceName = interface.getName();
   StringRef cppNamespace = interface.getCppNamespace();
   cppNamespace.consume_front("::");
 
   // Insert the method definitions.
   bool isOpInterface = isa<OpInterface>(interface);
   for (auto &method : interface.getMethods()) {

mlir/tools/mlir-tblgen/mlir-tblgen.cpp

 #include "llvm/TableGen/TableGenBackend.h"
 
 using namespace llvm;
 using namespace mlir;
 
 static llvm::ManagedStatic<std::vector<GenInfo>> generatorRegistry;
 
 mlir::GenRegistration::GenRegistration(StringRef arg, StringRef description,
-                                       GenFunction function) {
+                                       const GenFunction &function) {
   generatorRegistry->emplace_back(arg, description, function);
 }
 
 GenNameParser::GenNameParser(llvm::cl::Option &opt)
     : llvm::cl::parser<const GenInfo *>(opt) {
   for (const auto &kv : *generatorRegistry) {
     addLiteralOption(kv.getGenArgument(), &kv, kv.getGenDescription());
   }