Upcoming changes require attaching debug locations to VPInstructions,
e.g. adding induction increment recipes in D113223.
Details
- Reviewers
Ayal gilr rengolin - Commits
- rG5b362e4c7fa4: [VPlan] Add Debugloc to VPInstruction.
Diff Detail
- Repository
- rG LLVM Github Monorepo
Unit Tests
Time | Test | |
---|---|---|
50 ms | x64 debian > LLVM.Bindings/Go::go.test |
Event Timeline
Could actual DLs be conveyed, to exercise it, e.g., by associating the DL of ICmpULE with the comparison controlling the original loop?
Finding a DL for FirstOrderRecurrenceSplice seems hard(er), perhaps the instruction feeding the next iteration(?).
(Avoid defaulting DL to none in the spirit of MLIR?)
I think for the uses in D113223 there already is a debug location in all cases. The reason for making it optional were other places where VPInstructions are created. But I updated the patch to make it non-optional and push the responsiblity to the places where instructions are created. I think in most cases we potentially have a location available and I tried to use it.
Yes, this motivation of D113223 is clear from the summary.
But I updated the patch to make it non-optional and push the responsiblity to the places where instructions are created. I think in most cases we potentially have a location available and I tried to use it.
Very good! Is it possible to test?
Yes! I precommitted both a codegen test and a VPlan printing test. The changes are now included. The patch is not NCF any longer, I'll update the description accordingly.