[PowerPC] SemaChecking for darn family of builtins

[Conanap]

Summary

The __darn family of builtins are only available on Pwr9,
and only __darn_32 is available on both 64 and 32 bit, while the rest
are only available on 64 bit. The patch adds sema checking
for these builtins and separate the __darn_32's 32 bit
test cases.

[Conanap]

Added error testing

[lei]

LGTM.
Pleases address the test issue on commit.

clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c

13

Isn't this valid for both 32 and 64bit?
Maybe change one of the run lines above to a 64bit test.

[Conanap]

clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c

13

It is indeed valid for both 32 bit and 64 bit; there is already a runline for 64 bit in the clang/test/CodeGen/builtins-ppc-xlcompat-darn.c test case (which includes __darn_32, which is why I didn't include it here.

[amyk]

clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c

13

I agree. I thought __darn_32 is both 32-bit and 64-bit.

[amyk]

clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c

13

You removed __darn_32 from that file, so maybe we should add it back. And also, adjust the description of the patch to say that __darn_32 is available for 32 and 64-bit.

[Conanap]

Moved test case back to original file and use #ifdef __PPC64__ instead

[amyk]

Thanks for updating the tests and description, Albion.

clang/lib/Sema/SemaChecking.cpp

static bool isPPC_64Builtin(unsigned BuiltinID) {
   case PPC::BI__builtin_ppc_maddhd:
   case PPC::BI__builtin_ppc_maddhdu:
   case PPC::BI__builtin_ppc_maddld:
   case PPC::BI__builtin_ppc_load8r:
   case PPC::BI__builtin_ppc_store8r:
   case PPC::BI__builtin_ppc_insert_exp:
   case PPC::BI__builtin_ppc_extract_sig:
   case PPC::BI__builtin_ppc_addex:
+  case PPC::BI__builtin_darn:
+  case PPC::BI__builtin_darn_raw:
     return true;
   }
   return false;
 }
 
 static bool SemaFeatureCheck(Sema &S, CallExpr *TheCall,
                              StringRef FeatureToCheck, unsigned DiagID,
                              StringRef DiagArg = "") {
bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
   case PPC::BI__builtin_ppc_lbarx:
     return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
                             diag::err_ppc_builtin_only_on_arch, "8");
   case PPC::BI__builtin_vsx_ldrmb:
   case PPC::BI__builtin_vsx_strmb:
     return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
                             diag::err_ppc_builtin_only_on_arch, "8") ||
            SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
+  case PPC::BI__builtin_darn:
+  case PPC::BI__builtin_darn_raw:
+  case PPC::BI__builtin_darn_32:
+    return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+                            diag::err_ppc_builtin_only_on_arch, "9");
 #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
   case PPC::BI__builtin_##Name: \
     return SemaBuiltinPPCMMACall(TheCall, Types);
 #include "clang/Basic/BuiltinsPPC.def"
   }
   return SemaBuiltinConstantArgRange(TheCall, i, l, u);
 }
 

clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c

+// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
+// RUN:    -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
+// RUN:   -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:    -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
+
+// CHECK-LABEL: @testdarn_32(
+// CHECK:         [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
+// CHECK-NEXT:    ret i32 [[TMP0]]
+//
+int testdarn_32(void) {
+  return __darn_32();
+}

clang/test/CodeGen/builtins-ppc-xlcompat-darn.c

 // REQUIRES: powerpc-registered-target
 // RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
 // RUN:    -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
 // RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
 // RUN:   -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
 // RUN: %clang_cc1 -triple powerpc64-unknown-aix \
 // RUN:    -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
-// RUN:    -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
-// RUN:   -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpc-unknown-aix \
-// RUN:    -emit-llvm %s -o -  -target-cpu pwr9 | FileCheck %s
 
 // The darn class of builtins are Power 9 and up and only darn_32 works in
 // 32 bit mode.
 
 // CHECK-LABEL: @testdarn(
 // CHECK:         [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
 // CHECK-NEXT:    ret i64 [[TMP0]]
 //
 long long testdarn(void) {
   return __darn();
 }
 
 // CHECK-LABEL: @testdarn_raw(
 // CHECK:         [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
 // CHECK-NEXT:    ret i64 [[TMP0]]
 //
 long long testdarn_raw(void) {
   return __darn_raw();
 }
-
-// CHECK-LABEL: @testdarn_32(
-// CHECK:         [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
-// CHECK-NEXT:    ret i32 [[TMP0]]
-//
-int testdarn_32(void) {
-  return __darn_32();
-}

clang/test/CodeGen/builtins-ppc-xlcompat-error.c

 
 long long testdivde(long long dividend, long long divisor) {
   return __divde(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}}
 }
 
 unsigned long long testdivdeu(unsigned long long dividend, unsigned long long divisor) {
   return __divdeu(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}}
 }
+
+int test_darn() {
+  return __darn(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
+
+int test_darn_raw() {
+  return __darn_raw(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
 #endif
 
 unsigned long test_mfspr(void) {
   return __mfspr(cia); //expected-error {{argument to '__builtin_ppc_mfspr' must be a constant integer}}
 }
 
 void test_mtspr(void) {
    __mtspr(cia, ula); //expected-error {{argument to '__builtin_ppc_mtspr' must be a constant integer}}
 }

clang/test/CodeGen/builtins-ppc.c

 void test_builtin_ppc_flm() {
   volatile double res;
   // CHECK: call double @llvm.ppc.readflm()
   res = __builtin_readflm();
 
   // CHECK: call double @llvm.ppc.setflm(double %1)
   res = __builtin_setflm(res);
 }
-
-void test_builtin_ppc_darn() {
-  volatile long res;
-  volatile int x;
-  // CHECK: call i64 @llvm.ppc.darn()
-  res = __builtin_darn();
-
-  // CHECK: call i64 @llvm.ppc.darnraw()
-  res = __builtin_darn_raw();
-
-  // CHECK: call i32 @llvm.ppc.darn32()
-  x = __builtin_darn_32();
-}