This patch adds range checking for some Power10 altivec builtins and
changes the signature of a builtin to match documentation. For vec_cntm,
range checking is done via SemaChecking. For vec_splati_ins, the second
argument is masked to extract the 0th bit so that we always receive either a 0
or a 1.
Details
Details
- Reviewers
nemanjai lei stefanp amyk - Group Reviewers
Restricted Project - Commits
- rGf9912fe4eac9: [PowerPC] Add range checks for P10 Vector Builtins
Diff Detail
Diff Detail
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- rG LLVM Github Monorepo
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Comment Actions
builtins-ppc-p10vector.c looks like it needs to be updated from the failing test case.
clang/test/CodeGen/builtins-ppc-p10vector.c | ||
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1374 | Is the i32 supposed to be on the first argument? |
clang/test/CodeGen/builtins-ppc-p10vector.c | ||
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1415 | Need to add a testcase where param b to vec_splati_ins(a,b,c) is not 0 or 1. |
Comment Actions
Adding a testcase where the second parameter of vec_splati_ins is out of the range 0,1.
Comment Actions
LGTM
Please add comment to tc upon commit.
clang/test/CodeGen/builtins-ppc-p10vector.c | ||
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1418 | nit: pleases add a comment here explaining behaviour for when param 2 is out of expected value range. |
Is the i32 supposed to be on the first argument?