Allow MIMG instructions to be selected with 6/7 VGPRs for vaddr.
Previously these were rounded up to VReg_256 this saves VGPRs.
Details
Diff Detail
- Repository
- rG LLVM Github Monorepo
Unit Tests
Time | Test | |
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760 ms | x64 debian > libomp.lock::omp_init_lock.c |
Event Timeline
llvm/lib/Target/AMDGPU/MIMGInstructions.td | ||
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766 | This is just "dw" |
LGTM with the caveat that I don't understand all the implementation details -- in particular anything you could do to explain or simplify the complicated expression in MIMGInstructions.td would be much appreciated!
llvm/lib/Target/AMDGPU/MIMGInstructions.td | ||
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765–766 | I have never understood this bit and I understand it even less now that 6 and 7 are treated differently from 3 and 5. |
llvm/lib/Target/AMDGPU/MIMGInstructions.td | ||
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765–766 | I have rewritten this to be more explicit and hence hopefully easier to understand. |
llvm/lib/Target/AMDGPU/MIMGInstructions.td | ||
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765–766 | Yes I think that is better thanks. I will ponder further simplifications... |
A shorter variant would probably fit in one line: