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dp (Dmitry Preobrazhensky)
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Feb 16 2017, 7:55 AM (163 w, 3 d)

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Today

dp accepted D77366: AMDGPU: Remove DisableInst feature.

LGTM. I believe these checks are no longer necessary - they are currently duplicated in 'foreach' filters which look for supported features in opcode profiles.

Mon, Apr 6, 4:50 AM

Feb 7 2020

dp committed rG2de2275cbdb8: [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Feb 7 2020, 5:27 AM

Dec 25 2019

dp committed rG80c45e49c33e: [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Dec 25 2019, 6:56 AM

Nov 20 2019

dp committed rG6778a62eb0d2: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen (authored by dp).
[AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen
Nov 20 2019, 7:08 AM
dp closed D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen.
Nov 20 2019, 7:08 AM · Restricted Project
dp committed rG525f9c0be538: [AMDGPU][DPP] Corrected DPP combiner (authored by dp).
[AMDGPU][DPP] Corrected DPP combiner
Nov 20 2019, 5:01 AM
dp closed D70402: [AMDGPU][DPP] Corrected DPP combiner.
Nov 20 2019, 5:00 AM · Restricted Project

Nov 18 2019

dp added a comment to D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen.

Actually what makes them risky is impuse of M0, so it can be folded around M0 definition. Isn't it cleaner to check for impuse in the SDWA and DPP combiner and disable the combining on these grounds rather than excluding it from codegen completely?

Nov 18 2019, 2:13 PM · Restricted Project
dp added inline comments to D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen.
Nov 18 2019, 10:59 AM · Restricted Project
dp updated the diff for D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen.

Separated dpp combiner changes to D70402

Nov 18 2019, 8:44 AM · Restricted Project
dp added a child revision for D70402: [AMDGPU][DPP] Corrected DPP combiner: D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen.
Nov 18 2019, 8:35 AM · Restricted Project
dp added a parent revision for D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen: D70402: [AMDGPU][DPP] Corrected DPP combiner.
Nov 18 2019, 8:35 AM · Restricted Project
dp created D70402: [AMDGPU][DPP] Corrected DPP combiner.
Nov 18 2019, 8:35 AM · Restricted Project
dp created D70400: [AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen.
Nov 18 2019, 8:09 AM · Restricted Project
dp committed rGedd9f701638e: [AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes (authored by dp).
[AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes
Nov 18 2019, 6:31 AM
dp closed D70170: [AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes.
Nov 18 2019, 6:31 AM · Restricted Project

Nov 13 2019

dp created D70170: [AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodes.
Nov 13 2019, 3:57 AM · Restricted Project

Nov 8 2019

dp closed D69888: [AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32.
Nov 8 2019, 5:41 AM · Restricted Project
dp committed rGe25bc5e02471: [AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32 (authored by dp).
[AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32
Nov 8 2019, 5:41 AM

Nov 6 2019

dp created D69888: [AMDGPU][MC] Corrected src0 for v_movrelsd_b32 and v_movrelsd_2_b32.
Nov 6 2019, 5:14 AM · Restricted Project

Nov 5 2019

dp accepted D69819: [AMDGPU] return Fail instead of SolfFail from addOperand().

LGTM

Nov 5 2019, 2:45 AM · Restricted Project

Oct 28 2019

dp committed rGb8042dbe2bbf: [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64 (authored by dp).
[AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64
Oct 28 2019, 5:16 AM
dp closed D69348: [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64.
Oct 28 2019, 5:16 AM · Restricted Project

Oct 23 2019

dp created D69348: [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64.
Oct 23 2019, 10:05 AM · Restricted Project

Oct 18 2019

dp committed rG6c7d7eebda38: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32 (authored by dp).
[AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32
Oct 18 2019, 7:51 AM
dp closed D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32.
Oct 18 2019, 7:51 AM · Restricted Project
dp committed rG7d325fe57b42: [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa (authored by dp).
[AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa
Oct 18 2019, 6:36 AM
dp closed D69095: [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa.
Oct 18 2019, 6:35 AM · Restricted Project

Oct 17 2019

dp updated the diff for D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32.

Added more guards to avoid generating unused instructions.

Oct 17 2019, 12:54 PM · Restricted Project
dp added inline comments to D69095: [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa.
Oct 17 2019, 12:45 PM · Restricted Project
dp added a comment to D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32.

Still missing foreach around dpp.

Oct 17 2019, 12:26 PM · Restricted Project
dp updated the diff for D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32.

Updated by integrating changes from D69010.

Oct 17 2019, 12:08 PM · Restricted Project
dp added a parent revision for D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32: D69095: [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa.
Oct 17 2019, 3:34 AM · Restricted Project
dp added a child revision for D69095: [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa: D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32.
Oct 17 2019, 3:34 AM · Restricted Project
dp created D69096: [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32.
Oct 17 2019, 3:34 AM · Restricted Project
dp created D69095: [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa.
Oct 17 2019, 3:33 AM · Restricted Project

Oct 11 2019

dp committed rGc4995076c6bd: [AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ds_… (authored by dp).
[AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ds_…
Oct 11 2019, 7:55 AM
dp closed D68787: [AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ds_[read/write]_addtid_b32.
Oct 11 2019, 7:55 AM · Restricted Project
dp committed rGb82fae01ea45: [AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions buffer_atomic_… (authored by dp).
[AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions buffer_atomic_…
Oct 11 2019, 7:46 AM
dp closed D68788: [AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions buffer_atomic_[fcmpswap/fmin/fmax]*.
Oct 11 2019, 7:46 AM · Restricted Project
dp committed rG472c6b0aa022: [AMDGPU][MC][GFX10] Enabled null for 64-bit dst operands (authored by dp).
[AMDGPU][MC][GFX10] Enabled null for 64-bit dst operands
Oct 11 2019, 7:37 AM
dp closed D68785: [AMDGPU][MC][GFX10] Enabled null for 64-bit dst operands.
Oct 11 2019, 7:36 AM · Restricted Project
dp committed rG882c3e3db52d: [AMDGPU][MC] Corrected parsing of optional operands (authored by dp).
[AMDGPU][MC] Corrected parsing of optional operands
Oct 11 2019, 7:08 AM
dp closed D68350: [AMDGPU][MC][GFX9][GFX10] Corrected parsing of optional operands.
Oct 11 2019, 7:08 AM · Restricted Project

Oct 10 2019

dp added inline comments to D68788: [AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions buffer_atomic_[fcmpswap/fmin/fmax]*.
Oct 10 2019, 9:36 AM · Restricted Project
dp created D68788: [AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions buffer_atomic_[fcmpswap/fmin/fmax]*.
Oct 10 2019, 6:28 AM · Restricted Project
dp created D68787: [AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ds_[read/write]_addtid_b32.
Oct 10 2019, 6:10 AM · Restricted Project
dp created D68785: [AMDGPU][MC][GFX10] Enabled null for 64-bit dst operands.
Oct 10 2019, 5:22 AM · Restricted Project

Oct 4 2019

dp committed rG434d59250e38: [AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa… (authored by dp).
[AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa…
Oct 4 2019, 6:07 AM
dp closed D68349: [AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa opcodes.
Oct 4 2019, 6:06 AM · Restricted Project
dp committed rG9bd763679fe9: [AMDGPU][MC][GFX10] Enabled decoding of 'null' operand (authored by dp).
[AMDGPU][MC][GFX10] Enabled decoding of 'null' operand
Oct 4 2019, 5:39 AM
dp committed rG94d040706d4a: [AMDGPU][MC][GFX10] Corrected definition of FLAT GLOBAL/SCRATCH instructions (authored by dp).
[AMDGPU][MC][GFX10] Corrected definition of FLAT GLOBAL/SCRATCH instructions
Oct 4 2019, 5:14 AM

Oct 2 2019

dp added reviewers for D68350: [AMDGPU][MC][GFX9][GFX10] Corrected parsing of optional operands: artem.tamazov, arsenm.
Oct 2 2019, 11:37 AM · Restricted Project
dp added inline comments to D68350: [AMDGPU][MC][GFX9][GFX10] Corrected parsing of optional operands.
Oct 2 2019, 11:31 AM · Restricted Project
dp created D68350: [AMDGPU][MC][GFX9][GFX10] Corrected parsing of optional operands.
Oct 2 2019, 11:22 AM · Restricted Project
dp created D68349: [AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa opcodes.
Oct 2 2019, 11:11 AM · Restricted Project
dp added a comment to D68347: [AMDGPU][MC][GFX10] Corrected definition of FLAT GLOBAL/SCRATCH instructions.

Sure. Thanks!

Oct 2 2019, 11:11 AM · Restricted Project
dp created D68348: [AMDGPU][MC][GFX10] Enabled decoding of 'null' operand.
Oct 2 2019, 10:55 AM · Restricted Project
dp created D68347: [AMDGPU][MC][GFX10] Corrected definition of FLAT GLOBAL/SCRATCH instructions.
Oct 2 2019, 10:46 AM · Restricted Project

Sep 27 2019

dp committed rG436d5b335ae5: [AMDGPU][MC] Corrected parsing of registers (authored by dp).
[AMDGPU][MC] Corrected parsing of registers
Sep 27 2019, 8:41 AM

Sep 25 2019

dp committed rGb9683d3c53d6: [AMDGPU][MC][DOC] Updated AMD GPU assembler description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler description.
Sep 25 2019, 5:39 AM

Sep 23 2019

dp committed rG6784a3cd793a: [AMDGPU][MC] Corrected handling of relocatable expressions (authored by dp).
[AMDGPU][MC] Corrected handling of relocatable expressions
Sep 23 2019, 8:44 AM

Sep 20 2019

dp added a comment to D67829: [AMDGPU][MC] Corrected handling of relocatable expressions.

I believe codegen does not need any changes. Symbols like MO_ExternalSymbol, etc are handled by SIInstrInfo::usesConstantBus and SIInstrInfo::isLiteralConstantLike.

Sep 20 2019, 10:22 AM · Restricted Project
dp created D67829: [AMDGPU][MC] Corrected handling of relocatable expressions.
Sep 20 2019, 6:06 AM · Restricted Project

Sep 2 2019

dp committed rG4aa90ea58efb: [AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null (authored by dp).
[AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null
Sep 2 2019, 7:20 AM
dp closed D65231: [AMDGPU][MC][GFX10] Enabled null with 64-bit operands.

Integrated in 370660

Sep 2 2019, 7:02 AM
dp committed rG9c68eddbbe77: [AMDGPU][MC][GFX10] Enabled null with 64-bit operands (authored by dp).
[AMDGPU][MC][GFX10] Enabled null with 64-bit operands
Sep 2 2019, 6:42 AM
dp committed rGfe2ee4c46a00: [AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit shift instructions (authored by dp).
[AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit shift instructions
Sep 2 2019, 5:50 AM

Jul 24 2019

dp created D65231: [AMDGPU][MC][GFX10] Enabled null with 64-bit operands.
Jul 24 2019, 10:43 AM
dp created D65229: [AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null.
Jul 24 2019, 10:35 AM · Restricted Project
dp created D65228: [AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit shift instructions.
Jul 24 2019, 10:28 AM · Restricted Project
dp created D65224: [AMDGPU][MC] Corrected parsing of registers.
Jul 24 2019, 10:14 AM · Restricted Project
dp committed rG5e1dd02c9099: [AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed by… (authored by dp).
[AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed by…
Jul 24 2019, 9:53 AM
dp updated the diff for D65216: [AMDGPU][MC] Enabled GFX10 assembly with arbitrary wavesize assumed by the code.

The only GFX10 instructions which use exec affected by wave size are v_cmpx*. But in our assembler they use exec implicitly. So I cannot imagine any relevant tests with exec. I added 2 rather formal tests instead:

Jul 24 2019, 9:20 AM · Restricted Project
dp accepted D65158: [AMDGPU] Add all vgpr classes to asm parser.

LGTM

Jul 24 2019, 8:54 AM · Restricted Project
dp created D65216: [AMDGPU][MC] Enabled GFX10 assembly with arbitrary wavesize assumed by the code.
Jul 24 2019, 8:41 AM · Restricted Project

Jul 22 2019

dp added a comment to D62911: WIP: AMDGPU: Use fixup for local linkage functions.

I contemplate if adding a 'proxy' instruction like s_add_u64 would help.
Code emitter would expand it into s_add+s_addc and handle relocations.
Assembly output would look like this:

Jul 22 2019, 11:39 AM

Jul 19 2019

dp committed rG4ccb7f8c4507: [AMDGPU][MC] Corrected parsing of branch offsets (authored by dp).
[AMDGPU][MC] Corrected parsing of branch offsets
Jul 19 2019, 6:18 AM

Jul 15 2019

dp committed rG5153b1723a62: [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message (authored by dp).
[AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message
Jul 15 2019, 8:13 AM
dp committed rG8d879c8d9549: [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions (authored by dp).
[AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions
Jul 15 2019, 7:39 AM
dp created D64729: [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message.
Jul 15 2019, 5:58 AM · Restricted Project
dp created D64716: [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions.
Jul 15 2019, 5:25 AM · Restricted Project

Jul 12 2019

dp created D64629: [AMDGPU][MC] Corrected parsing of branch offsets.
Jul 12 2019, 5:46 AM · Restricted Project

Jul 8 2019

dp committed rG463b87ae888d: [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Jul 8 2019, 10:11 AM
dp committed rGcef9d42157e5: [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Jul 8 2019, 9:51 AM
dp committed rG2eff0318c660: [AMDGPU][MC] Corrected parsing of FLAT offset modifier (authored by dp).
[AMDGPU][MC] Corrected parsing of FLAT offset modifier
Jul 8 2019, 7:28 AM

Jul 5 2019

dp updated the diff for D64244: [AMDGPU][MC] Corrected parsing of FLAT offset modifier.

Corrected a typo

Jul 5 2019, 6:37 AM · Restricted Project
dp created D64244: [AMDGPU][MC] Corrected parsing of FLAT offset modifier.
Jul 5 2019, 5:43 AM · Restricted Project

Jun 28 2019

dp committed rGe1eb25ff3e59: [AMDGPU][MC] Fix 2 for sanitizer failure in 364645 (authored by dp).
[AMDGPU][MC] Fix 2 for sanitizer failure in 364645
Jun 28 2019, 9:30 AM
dp committed rGd12966c08835: [AMDGPU][MC] Fix for sanitizer failure in 364645 (authored by dp).
[AMDGPU][MC] Fix for sanitizer failure in 364645
Jun 28 2019, 8:25 AM
dp committed rG1d572ce39559: [AMDGPU][MC] Enabled constant expressions as operands of sendmsg (authored by dp).
[AMDGPU][MC] Enabled constant expressions as operands of sendmsg
Jun 28 2019, 7:15 AM

Jun 14 2019

dp accepted D63272: AMDGPU: Fix printing trailing whitespace after s_endpgm.

Looks fine.

Jun 14 2019, 3:28 AM
dp updated the diff for D62735: [AMDGPU][MC] Corrected parsing of sendmsg.

Corrected typos in function attributes

Jun 14 2019, 3:16 AM · Restricted Project

Jun 13 2019

dp committed rG1fca3b1972dd: [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg (authored by dp).
[AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg
Jun 13 2019, 5:44 AM

Jun 3 2019

dp committed rG9111f35f0233: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands (authored by dp).
[AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands
Jun 3 2019, 6:49 AM

May 31 2019

dp added inline comments to D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.
May 31 2019, 9:32 AM · Restricted Project
dp updated the diff for D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.

Corrected SIInstrInfo::usesConstantBus

May 31 2019, 9:02 AM · Restricted Project
dp retitled D62735: [AMDGPU][MC] Corrected parsing of sendmsg from [AMDGPU][MC] Enabled constant expressions as operands of s_sendmsg* to [AMDGPU][MC] Corrected parsing of sendmsg.
May 31 2019, 7:26 AM · Restricted Project
dp created D62735: [AMDGPU][MC] Corrected parsing of sendmsg.
May 31 2019, 7:20 AM · Restricted Project
dp added inline comments to D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.
May 31 2019, 6:50 AM · Restricted Project