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dp (Dmitry Preobrazhensky)
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User Since
Feb 16 2017, 7:55 AM (118 w, 1 d)

Recent Activity

Wed, May 22

dp updated the diff for D61125: [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg.
  1. Updated to account for GFX10 hw registers.
  2. Separated bits juggling from high-level code.
Wed, May 22, 8:15 AM
dp committed rG7773fc478d32: [AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers (authored by dp).
[AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers
Wed, May 22, 6:59 AM

Fri, May 17

dp committed rG198611b0ff7e: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers (authored by dp).
[AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers
Fri, May 17, 9:02 AM
dp committed rG5ae3113969b7: [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork (authored by dp).
[AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork
Fri, May 17, 7:55 AM
dp committed rG43fcc79837cd: [AMDGPU][MC] Enabled expressions for most operands which accept integer values (authored by dp).
[AMDGPU][MC] Enabled expressions for most operands which accept integer values
Fri, May 17, 6:16 AM

Thu, May 16

dp added a comment to D62016: [AMDGPU][MC] Enabled labels as operands of s_call_b64 and s_cbranch_i_fork.

This is checked during fixups relaxations. An error is reported if the offset does not fit in 16 bits. See lit test max-branch-distance.s

Thu, May 16, 11:35 AM · Restricted Project
dp created D62016: [AMDGPU][MC] Enabled labels as operands of s_call_b64 and s_cbranch_i_fork.
Thu, May 16, 11:05 AM · Restricted Project
dp added a comment to D61009: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers.

Thanks!

Thu, May 16, 10:52 AM · Restricted Project

Wed, May 15

dp added a comment to D61009: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers.

ping

Wed, May 15, 4:28 AM · Restricted Project

Tue, May 14

dp committed rGee51d851eae5: [AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases (authored by dp).
[AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases
Tue, May 14, 12:14 PM
dp updated the diff for D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.

Retitled and removed a comment

Tue, May 14, 10:40 AM · Restricted Project
dp updated the diff for D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.

Removed GFX10-relevant changes

Tue, May 14, 9:32 AM · Restricted Project
dp added a comment to D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.

SWDEV-188513 is P2. Could you correct the offending predicate by your next commit?
Or I can remove all changes except the predicate correction - that will not affect GFX10.

Tue, May 14, 8:51 AM · Restricted Project
dp created D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.
Tue, May 14, 8:38 AM · Restricted Project

Fri, Apr 26

dp added inline comments to D60768: [AMDGPU][MC] Enabled generic constant expressions as operands.
Fri, Apr 26, 6:11 AM · Restricted Project

Thu, Apr 25

dp created D61125: [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg.
Thu, Apr 25, 3:28 AM

Apr 24 2019

dp committed rG47621d7c8935: [AMDGPU][MC] Parser cleanup and refactoring (authored by dp).
[AMDGPU][MC] Parser cleanup and refactoring
Apr 24 2019, 7:08 AM

Apr 23 2019

dp created D61017: [AMDGPU][MC] Enabled constant expressions as operands of s_waitcnt.
Apr 23 2019, 6:59 AM
dp created D61012: [AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers.
Apr 23 2019, 6:39 AM · Restricted Project
dp created D61009: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers.
Apr 23 2019, 6:23 AM · Restricted Project
dp added a reviewer for D60768: [AMDGPU][MC] Enabled generic constant expressions as operands: vpykhtin.
Apr 23 2019, 2:20 AM · Restricted Project

Apr 22 2019

dp committed rGe2707f5aac91: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier (authored by dp).
[AMDGPU][MC] Corrected parsing of SP3 'neg' modifier
Apr 22 2019, 7:36 AM

Apr 17 2019

dp committed rG394d0a163714: [AMDGPU][MC] Corrected handling of "-" before expressions (authored by dp).
[AMDGPU][MC] Corrected handling of "-" before expressions
Apr 17 2019, 9:55 AM
dp committed rG20d52e3aa2db: [AMDGPU][MC] Corrected parsing of registers (authored by dp).
[AMDGPU][MC] Corrected parsing of registers
Apr 17 2019, 7:43 AM

Apr 16 2019

dp added a parent revision for D60768: [AMDGPU][MC] Enabled generic constant expressions as operands: D60767: [AMDGPU][MC] Parser cleanup and refactoring.
Apr 16 2019, 4:22 AM · Restricted Project
dp created D60768: [AMDGPU][MC] Enabled generic constant expressions as operands.
Apr 16 2019, 4:22 AM · Restricted Project
dp added a child revision for D60767: [AMDGPU][MC] Parser cleanup and refactoring: D60768: [AMDGPU][MC] Enabled generic constant expressions as operands.
Apr 16 2019, 4:22 AM · Restricted Project
dp added a parent revision for D60767: [AMDGPU][MC] Parser cleanup and refactoring: D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier.
Apr 16 2019, 3:03 AM · Restricted Project
dp added a child revision for D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier: D60767: [AMDGPU][MC] Parser cleanup and refactoring.
Apr 16 2019, 3:03 AM · Restricted Project
dp created D60767: [AMDGPU][MC] Parser cleanup and refactoring.
Apr 16 2019, 3:03 AM · Restricted Project

Apr 12 2019

dp added reviewers for D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier: arsenm, artem.tamazov.
Apr 12 2019, 10:28 AM · Restricted Project
dp added reviewers for D60622: [AMDGPU][MC] Corrected handling of "-" before expressions: arsenm, artem.tamazov.
Apr 12 2019, 10:28 AM · Restricted Project
dp added reviewers for D60621: [AMDGPU][MC] Corrected parsing of registers: arsenm, artem.tamazov.
Apr 12 2019, 10:22 AM · Restricted Project
dp added inline comments to D60621: [AMDGPU][MC] Corrected parsing of registers.
Apr 12 2019, 10:22 AM · Restricted Project
dp added a parent revision for D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier: D60622: [AMDGPU][MC] Corrected handling of "-" before expressions.
Apr 12 2019, 10:20 AM · Restricted Project
dp added a child revision for D60622: [AMDGPU][MC] Corrected handling of "-" before expressions: D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier.
Apr 12 2019, 10:20 AM · Restricted Project
dp added a child revision for D60621: [AMDGPU][MC] Corrected parsing of registers: D60622: [AMDGPU][MC] Corrected handling of "-" before expressions.
Apr 12 2019, 10:20 AM · Restricted Project
dp added a parent revision for D60622: [AMDGPU][MC] Corrected handling of "-" before expressions: D60621: [AMDGPU][MC] Corrected parsing of registers.
Apr 12 2019, 10:20 AM · Restricted Project
dp created D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier.
Apr 12 2019, 10:17 AM · Restricted Project
dp created D60622: [AMDGPU][MC] Corrected handling of "-" before expressions.
Apr 12 2019, 10:09 AM · Restricted Project
dp created D60621: [AMDGPU][MC] Corrected parsing of registers.
Apr 12 2019, 9:13 AM · Restricted Project

Mar 29 2019

dp committed rGd6827ce3a35e: [AMDGPU][MC] Corrected conversion rules for inlinable constants to match rules… (authored by dp).
[AMDGPU][MC] Corrected conversion rules for inlinable constants to match rules…
Mar 29 2019, 7:49 AM
dp committed rG7f33574be341: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes (authored by dp).
[AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes
Mar 29 2019, 5:16 AM

Mar 27 2019

dp created D59878: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.
Mar 27 2019, 6:56 AM · Restricted Project
dp committed rG40f0162a9a99: Revert of 357063 [AMDGPU][MC] Corrected handling of tied src for atomic return… (authored by dp).
Revert of 357063 [AMDGPU][MC] Corrected handling of tied src for atomic return…
Mar 27 2019, 6:50 AM
dp committed rGbcc4d5383545: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes (authored by dp).
[AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes
Mar 27 2019, 6:09 AM

Mar 25 2019

dp created D59786: [AMDGPU][MC] Corrected truncation rules for integer inlinable constants to match rules for literals.
Mar 25 2019, 11:10 AM · Restricted Project

Mar 21 2019

dp added a comment to D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.

ping

Mar 21 2019, 11:17 AM · Restricted Project

Mar 20 2019

dp committed rG04bd1185ade5: [AMDGPU][MC] Corrected checks for DS offset0 range (authored by dp).
[AMDGPU][MC] Corrected checks for DS offset0 range
Mar 20 2019, 10:15 AM
dp committed rG137976fae22d: [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit… (authored by dp).
[AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit…
Mar 20 2019, 8:40 AM

Mar 19 2019

dp added a comment to D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.

Could you explain what issues you see in this change? I'm trying to make assembler as close to SP3 as possible.

Mar 19 2019, 5:50 AM · Restricted Project

Mar 15 2019

dp updated the diff for D59290: [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id.

After a discussion with HW people it turned out that these operands (shared_base, shared_limit etc) differ from inline constants in that they compete with other scalars for constant bus access.

Mar 15 2019, 9:54 AM · Restricted Project

Mar 14 2019

dp added a comment to D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.

Shader programming documents state that MUBUF SOFFSET is "SGPR to supply unsigned byte offset. Must be an SGPR, M0 or inline constant."
Also note that our tests are based on SP3 tables which also allow inline constants.
Of course, using fp inline constants in this context is meaningless.

Mar 14 2019, 3:37 AM · Restricted Project

Mar 13 2019

dp created D59313: [AMDGPU][MC] Corrected checks for DS offset0 range.
Mar 13 2019, 11:08 AM · Restricted Project
dp created D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.
Mar 13 2019, 9:51 AM · Restricted Project
dp created D59290: [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id.
Mar 13 2019, 3:18 AM · Restricted Project

Mar 4 2019

dp committed rG6023d5990d06: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32… (authored by dp).
[AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32…
Mar 4 2019, 4:48 AM

Feb 27 2019

dp committed rG7904231edb18: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands (authored by dp).
[AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands
Feb 27 2019, 5:59 AM
dp committed rGef9203582776: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of… (authored by dp).
[AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of…
Feb 27 2019, 5:15 AM
dp added a parent revision for D58713: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32: D58287: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands.
Feb 27 2019, 4:54 AM · Restricted Project
dp added a child revision for D58287: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands: D58713: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32.
Feb 27 2019, 4:54 AM · Restricted Project
dp created D58713: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32.
Feb 27 2019, 4:54 AM · Restricted Project
dp added a comment to D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.

Typos has been corrected. Thanks!

Feb 27 2019, 3:33 AM · Restricted Project

Feb 25 2019

dp updated the diff for D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.

Updated as suggested by Matt

Feb 25 2019, 5:39 AM · Restricted Project

Feb 21 2019

dp added a comment to D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.

Thanks, Matt! Sorry for my dumbness :-)

Feb 21 2019, 8:10 AM · Restricted Project
dp added a comment to D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.

ping

Feb 21 2019, 3:27 AM · Restricted Project

Feb 15 2019

dp added inline comments to D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.
Feb 15 2019, 10:48 AM · Restricted Project
dp created D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.
Feb 15 2019, 9:26 AM · Restricted Project
dp created D58287: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands.
Feb 15 2019, 9:01 AM · Restricted Project

Feb 8 2019

dp committed rG942c273d64c6: [AMDGPU][MC] Added support of lds_direct operand (authored by dp).
[AMDGPU][MC] Added support of lds_direct operand
Feb 8 2019, 6:58 AM
dp committed rG62a0318dffc4: [AMDGPU][MC][CODEOBJECT] Added predefined symbols to access GPU minor and… (authored by dp).
[AMDGPU][MC][CODEOBJECT] Added predefined symbols to access GPU minor and…
Feb 8 2019, 5:52 AM

Feb 7 2019

dp created D57889: [AMDGPU][MC] Added support of lds_direct operand.
Feb 7 2019, 6:02 AM · Restricted Project

Feb 6 2019

dp created D57826: [AMDGPU][MC][CODEOBJECT] Added predefined symbols to access GPU minor and stepping numbers.
Feb 6 2019, 9:05 AM · Restricted Project

Jan 17 2019

dp updated the diff for D56794: [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands.

Thanks! Corrected.

Jan 17 2019, 5:59 AM
dp added a comment to D56847: [AMDGPU][MC] Disabled use of 2 different literals with SOP2/SOPC instructions.

Do we support different constants if one is literal and another one is inline constant?

Sure. Inline constants are free. The code in this patch only limits use of literals.

Jan 17 2019, 5:39 AM
dp created D56847: [AMDGPU][MC] Disabled use of 2 different literals with SOP2/SOPC instructions.
Jan 17 2019, 4:50 AM

Jan 16 2019

dp created D56794: [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands.
Jan 16 2019, 9:40 AM

Sep 21 2018

dp accepted D52019: [AMDGPU] Divergence driven instruction selection. Part 1..
Sep 21 2018, 6:39 AM

Jun 7 2018

dp added a comment to D47884: [AMDGPU][MC] Enabled parsing of relocations on VALU instructions.

Missing test for the f32 src change?

Jun 7 2018, 10:07 AM
dp created D47885: [AMDGPU][GFX8][GFX9] Allow LDS direct reads for DWORDX2/X3/X4.
Jun 7 2018, 8:29 AM
dp created D47884: [AMDGPU][MC] Enabled parsing of relocations on VALU instructions.
Jun 7 2018, 8:22 AM

Jun 1 2018

dp accepted D47434: AMDGPU: Turn D16 for MIMG instructions into a regular operand.

Looks good.

Jun 1 2018, 5:30 AM

Apr 11 2018

dp updated the diff for D45446: [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32.

This change breaks SDWA peepholer which started to produce code with undefined physical registers:

Apr 11 2018, 8:52 AM

Apr 9 2018

dp created D45446: [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32.
Apr 9 2018, 9:37 AM
dp created D45443: [AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32.
Apr 9 2018, 8:58 AM

Apr 5 2018

dp created D45313: [AMDGPU][MC][GFX9] Added instruction s_endpgm_ordered_ps_done.
Apr 5 2018, 2:39 AM

Apr 4 2018

dp created D45268: [AMDGPU][MC][GFX9] Added s_call_b64.
Apr 4 2018, 10:32 AM
dp updated the diff for D45250: [AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*.

Corrected asm tests to use traditional notation (GFX89 instead of VI)

Apr 4 2018, 8:28 AM
dp added inline comments to D45250: [AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*.
Apr 4 2018, 7:23 AM
dp created D45251: [AMDGPU][MC][GFX9] Added instructions s_mul_hi_*32, s_lshl*_add_u32.
Apr 4 2018, 4:42 AM
dp created D45250: [AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*.
Apr 4 2018, 4:30 AM
dp created D45249: [AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions.
Apr 4 2018, 4:19 AM
dp created D45247: [AMDGPU][MC][GFX9] Added s_dcache_discard* instructions.
Apr 4 2018, 4:12 AM

Apr 2 2018

dp added a comment to D45085: [AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions.

Bug fixed, change integrated. Thanks.

Apr 2 2018, 9:46 AM
dp updated subscribers of D45085: [AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions.

Sorry about that. I was unable to reproduce the issue locally.

Apr 2 2018, 8:05 AM

Mar 30 2018

dp created D45099: [AMDGPU][MC] Enabled instruction TBUFFER_LOAD_FORMAT_XYZ for SI/CI.
Mar 30 2018, 9:41 AM
dp created D45097: [AMDGPU][MC][GFX9] Added instructions v_cvt_norm_*16_f16, v_sat_pk_u8_i16.
Mar 30 2018, 9:12 AM
dp created D45085: [AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions.
Mar 30 2018, 6:25 AM
dp created D45084: [AMDGPU][MC] Added support of 3-element addresses for MIMG instructions.
Mar 30 2018, 6:19 AM

Mar 26 2018

dp updated the diff for D44832: [AMDGPU][MC][GFX9] Added s_scratch* instructions.

Updated after a discussion with Matt:

Mar 26 2018, 10:48 AM