[RISCV] Fix wrong objfile attribute bug.

[khchen]

Summary

Need to EmitAttributes after get the correct feature bit.

[jrtc27]

As commented in the depended-on revision:

No it shouldn't. This is precisely the kind of IR you get if you want to make an IFUNC specialised for IMAFDC.

[khchen]

Rebase

[MaskRay]

Aside: RTS.emitTargetAttributes(*STI); just uses the last FeatureBits set by setFeatureBits (in RISCVAsmPrinter::runOnMachineFunction). If you have two functions with target features, the last wins.
So in practice the string is likely inferred from whatever the last __attribute__((target(...))). Using the default for the rest functions seems to make more sense.

In the LTO case, I think encoding the feature bits as module flag metadata probably makes sense, but we may need a new merge behavior (see "Max" behavior from D33418 for an example). In the absence of a better behavior, picking the first is probably not-so-bad and will give something which is immediately usable.

[khchen]

I think this patch is similar to D73339 but it fixes obj file attribute, it is not going to fix different target feature in one complication unit problem.

[khchen]

D106347 will fix this issue.

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

public:
   bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
                                    const MachineInstr *MI);
 
   // Wrapper needed for tblgenned pseudo lowering.
   bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
     return LowerRISCVMachineOperandToMCOperand(MO, MCOp, *this);
   }
 
-  void emitStartOfAsmFile(Module &M) override;
   void emitEndOfAsmFile(Module &M) override;
-
-private:
-  void emitAttributes();
 };
 }
 
 #define GEN_COMPRESS_INSTR
 #include "RISCVGenCompressInstEmitter.inc"
 void RISCVAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
   MCInst CInst;
   bool Res = compressInst(CInst, Inst, *STI, OutStreamer->getContext());
bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
   NewSTI.setFeatureBits(MF.getSubtarget().getFeatureBits());
   STI = &NewSTI;
 
   SetupMachineFunction(MF);
   emitFunctionBody();
   return false;
 }
 
-void RISCVAsmPrinter::emitStartOfAsmFile(Module &M) {
-  if (TM.getTargetTriple().isOSBinFormatELF())
-    emitAttributes();
-}
-
 void RISCVAsmPrinter::emitEndOfAsmFile(Module &M) {
   RISCVTargetStreamer &RTS =
       static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
 
-  if (TM.getTargetTriple().isOSBinFormatELF())
+  if (TM.getTargetTriple().isOSBinFormatELF()) {
+    RTS.emitTargetAttributes(*STI);
     RTS.finishAttributeSection();
   }
-
-void RISCVAsmPrinter::emitAttributes() {
-  RISCVTargetStreamer &RTS =
-      static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
-  RTS.emitTargetAttributes(*STI);
 }
 
 // Force static initialization.
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmPrinter() {
   RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());
   RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target());
 }

llvm/test/CodeGen/RISCV/subtarget-features-obj-bug.ll

 ; RUN: llc -o - < %s | FileCheck %s
 ; RUN: llc --filetype=obj -o - < %s | llvm-readelf -A - \
 ; RUN:   | FileCheck %s -check-prefix=ATTRIBUTE
 
 ; ATTRIBUTE: TagName: arch
-; ATTRIBUTE: Value: rv64i2p0
+; ATTRIBUTE: Value: rv64i2p0_m2p0_a2p0_f2p0_d2p0_c2p0
 
 target triple = "riscv64-unknown-linux-gnu"
 
 ; ASM includes F standard extension instructions but arch attribute information is only RV64I base instructions
 
 define float @foo1(i32 %a) nounwind #0 {
 ; CHECK: fcvt.s.w        ft0, a0
 ; CHECK: fmv.x.w a0, ft0
   %conv = sitofp i32 %a to float
   ret float %conv
 }
 
 attributes #0 = { "target-features"="+64bit,+a,+c,+d,+f,+m"}