[LV] Move exact FP math check out of Requirements.

[fhahn]

Summary

We know if the loop contains FP instructions preventing vectorization
after we are done with legality checks. This patch updates the code the
check for un-vectorizable FP operations earlier, to avoid unnecessarily
running the cost model and picking a vectorization factor. It also makes
the code more direct and moves the check to a position where similar
checks are done.

I might be missing something, but I don't see any reason to handle this
check differently to other, similar checks.

[lebedev.ri]

Not familiar enough with the code, but it totally makes sense to me, thanks!

llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll

224–237

I'm guessing the test needs to change so that the LV cost model is still constructed and printed?
I think you can just commit this as NFC.

[fhahn]

Ping :)

Rebased, committed test change separately

llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll

224–237

Yes exactly. I did just that in 7fb6d9f9588f, thanks!

[lebedev.ri]

LGTM

llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h

void addExactFPMathInst(Instruction *I) {
     if (I && !ExactFPMathInst)
       ExactFPMathInst = I;
   }
 
   void addRuntimePointerChecks(unsigned Num) { NumRuntimePointerChecks = Num; }
 
   bool doesNotMeet(Function *F, Loop *L, const LoopVectorizeHints &Hints);
 
+  Instruction *getExactFPInst() { return ExactFPMathInst; }
+  bool canVectorizeFPMath(const LoopVectorizeHints &Hints) const {
+    return !ExactFPMathInst || Hints.allowReordering();
+  }
+
 private:
   unsigned NumRuntimePointerChecks = 0;
   Instruction *ExactFPMathInst = nullptr;
 
   /// Interface to emit optimization remarks.
   OptimizationRemarkEmitter &ORE;
 };
 

llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp

for (auto H : Hints) {
     }
   }
 }
 
 bool LoopVectorizationRequirements::doesNotMeet(
     Function *F, Loop *L, const LoopVectorizeHints &Hints) {
   const char *PassName = Hints.vectorizeAnalysisPassName();
   bool Failed = false;
-  if (ExactFPMathInst && !Hints.allowReordering()) {
-    ORE.emit([&]() {
-      return OptimizationRemarkAnalysisFPCommute(
-                 PassName, "CantReorderFPOps", ExactFPMathInst->getDebugLoc(),
-                 ExactFPMathInst->getParent())
-             << "loop not vectorized: cannot prove it is safe to reorder "
-                "floating-point operations";
-    });
-    Failed = true;
-  }
 
   // Test if runtime memcheck thresholds are exceeded.
   bool PragmaThresholdReached =
       NumRuntimePointerChecks > PragmaVectorizeMemoryCheckThreshold;
   bool ThresholdReached =
       NumRuntimePointerChecks > VectorizerParams::RuntimeMemoryCheckThreshold;
   if ((ThresholdReached && !Hints.allowReordering()) ||
       PragmaThresholdReached) {

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

if (Hints.isPotentiallyUnsafe() &&
     reportVectorizationFailure(
         "Potentially unsafe FP op prevents vectorization",
         "loop not vectorized due to unsafe FP support.",
         "UnsafeFP", ORE, L);
     Hints.emitRemarkWithHints();
     return false;
   }
 
+  if (!Requirements.canVectorizeFPMath(Hints)) {
+    ORE->emit([&]() {
+      auto *ExactFPMathInst = Requirements.getExactFPInst();
+      return OptimizationRemarkAnalysisFPCommute(DEBUG_TYPE, "CantReorderFPOps",
+                                                 ExactFPMathInst->getDebugLoc(),
+                                                 ExactFPMathInst->getParent())
+             << "loop not vectorized: cannot prove it is safe to reorder "
+                "floating-point operations";
+    });
+    LLVM_DEBUG(dbgs() << "LV: loop not vectorized: cannot prove it is safe to "
+                         "reorder floating-point operations\n");
+    Hints.emitRemarkWithHints();
+    return false;
+  }
+
   bool UseInterleaved = TTI->enableInterleavedAccessVectorization();
   InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL.getLAI());
 
   // If an override option has been passed in for interleaved accesses, use it.
   if (EnableInterleavedMemAccesses.getNumOccurrences() > 0)
     UseInterleaved = EnableInterleavedMemAccesses;
 
   // Analyze interleaved memory accesses.

llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll

; <label>:2                                       ; preds = %2, %0
   %25 = icmp eq i32 %24, 0
   br i1 %25, label %26, label %2
 
 ; <label>:26                                      ; preds = %2
   ret void
 }
 
 define ppc_fp128 @fp128_(ppc_fp128* nocapture %n, ppc_fp128 %d) nounwind readonly {
 ;CHECK-LABEL: fp128_
 ;CHECK: LV(REG): VF = 1
 ;CHECK: LV(REG): Found max usage: 2 item
 ;CHECK: LV(REG): RegisterClass: PPC::GPRRC, 2 registers
 ;CHECK: LV(REG): RegisterClass: PPC::VRRC, 2 registers
 entry:
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %x.05 = phi ppc_fp128 [ %d, %entry ], [ %sub, %for.body ]
   %arrayidx = getelementptr inbounds ppc_fp128, ppc_fp128* %n, i32 %i.06
   %0 = load ppc_fp128, ppc_fp128* %arrayidx, align 8
-  %sub = fsub ppc_fp128 %x.05, %0
+  %sub = fsub fast ppc_fp128 %x.05, %0
   %inc = add nsw i32 %i.06, 1
   %exitcond = icmp eq i32 %inc, 2048
   br i1 %exitcond, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body
   ret ppc_fp128 %sub
 }