Page MenuHomePhabricator

[ARM,MVE] Add intrinsics for abs, neg and not operations.

Authored by simon_tatham on Feb 10 2020, 8:52 AM.



This commit adds the unpredicated intrinsics for the unary operations
vabsq (absolute value), vnegq (arithmetic negation), vmvnq (bitwise
complement), vqabsq and vqnegq (saturating versions of abs and neg for
signed integers, in the sense that they give INT_MAX if an input lane
is INT_MIN).

This is done entirely in clang: all of these operations have existing
isel patterns and existing tests for them on the LLVM side, so I've
just made clang emit the same IR that those patterns already match.

Diff Detail

Event Timeline

simon_tatham created this revision.Feb 10 2020, 8:52 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 10 2020, 8:52 AM

Rebased to current master.

This revision is now accepted and ready to land.Feb 11 2020, 5:17 AM
This revision was automatically updated to reflect the committed changes.