[WIP][RISCV] Set MaxAtomicPromoteWidth and MaxAtomicInlineWidth

[lenary]

Hi Pengxuan,

Thanks for the patch! We have a similar patch from @asb under review at the moment, D57450. There's one question about ABI compatibility that still needs to be answered, which we will discuss in the RISC-V sync-up later today.

Sam

[pzheng]

Hi Sam,

Thanks for pointing me to the patch. I can abandon this one now.

Pengxuan

clang/lib/Basic/Targets/RISCV.h

 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/Compiler.h"
 
 namespace clang {
 namespace targets {
 
 // RISC-V Target
 class RISCVTargetInfo : public TargetInfo {
+  void setAtomic();
+
 protected:
   std::string ABI;
   bool HasM;
   bool HasA;
   bool HasF;
   bool HasD;
   bool HasC;
 

clang/lib/Basic/Targets/RISCV.cpp

return llvm::StringSwitch<bool>(Feature)
       .Case("m", HasM)
       .Case("a", HasA)
       .Case("f", HasF)
       .Case("d", HasD)
       .Case("c", HasC)
       .Default(false);
 }
 
+void RISCVTargetInfo::setAtomic() {
+  bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64;
+
+  MaxAtomicPromoteWidth = Is64Bit ? 64 : 32;
+  MaxAtomicInlineWidth = Is64Bit ? 64 : 32;
+}
+
 /// Perform initialization based on the user configured set of features.
 bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
                                            DiagnosticsEngine &Diags) {
   for (const auto &Feature : Features) {
     if (Feature == "+m")
       HasM = true;
     else if (Feature == "+a")
       HasA = true;
     else if (Feature == "+f")
       HasF = true;
     else if (Feature == "+d")
       HasD = true;
     else if (Feature == "+c")
       HasC = true;
   }
 
+  setAtomic();
+
   return true;
 }

clang/test/CodeGen/atomic-ops-riscv.c

+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=riscv32 | FileCheck %s
+// RUN: %clang_cc1 %s -emit-llvm -o - -triple=riscv64 | FileCheck %s
+// REQUIRES: riscv-registered-target
+
+#ifndef ALREADY_INCLUDED
+#define ALREADY_INCLUDED
+
+#include <stdatomic.h>
+
+// Note: this test is based off atomic-ops.c.
+// TODO: Add more tests.
+//
+// Basic IRGen tests for __c11_atomic_* and GNU __atomic_*
+
+int fi1(_Atomic(int) *i) {
+  // CHECK-LABEL: @fi1
+  // CHECK: load atomic i32, i32* {{.*}} seq_cst
+  return __c11_atomic_load(i, memory_order_seq_cst);
+}
+
+int fi1a(int *i) {
+  // CHECK-LABEL: @fi1a
+  // CHECK: load atomic i32, i32* {{.*}} seq_cst
+  int v;
+  __atomic_load(i, &v, memory_order_seq_cst);
+  return v;
+}
+
+int fi1b(int *i) {
+  // CHECK-LABEL: @fi1b
+  // CHECK: load atomic i32, i32* {{.*}} seq_cst
+  return __atomic_load_n(i, memory_order_seq_cst);
+}
+
+#endif