[DebugInfo] DBG_VALUE instruction generated for loop counter is placed incorrectly.

[avl]

Summary

512B bb.2.for.body:
520B MOVaddr
524B MOVi32imm

DBG_VALUE $x19, $noreg, !"i", <<<<<<<<<<<<<<<

Above DBG_VALUE should be placed before MOV* instructions. Test case presented after
the problem description.

DBG_VALUE instruction is placed incorrectly because wrong debug variable range
is calculated at "COMPUTING LIVE DEBUG VARIABLES" stage. Range for debug variable
instruction (for "i" variable) is computed according to the current state of instructions
inside of loop basic block. But later - Register Allocator creates new instructions
which are not taken into account when Live Debug Variables are computed. Please check
real data(full log in the end): after COMPUTING LIVE DEBUG VARIABLES there is following
instruction range for "i" variable - [544B;848r). It is shorter than Live Interval for
corresponding register [512B,848r:1). Register Allocator inserts two instructions
before 544B. As the result Debug Value record is inserted after these additional
instructions. That is incorrect. Debug Value for the loop counter should be inserted
before any loop instruction.

related reviews: D35953, https://bugs.llvm.org/show_bug.cgi?id=33730, D46599, https://bugs.llvm.org/show_bug.cgi?id=37149.

Debug variable range become incorrect when it was trimmed
at lib/CodeGen/LiveDebugVariables.cpp:

if (I.start() < RStart) {

// Interval start overlaps range - trim to the scope range.
I.setStartUnchecked(RStart);
// Remember that this interval was trimmed.
trimmedDefs.insert(RStart);

}

The fix is to not trim Debug Variable Range.
It does not brake live-debug-variables.ll(no new .debug_loc entries).
It does not affect compilation time for test case from https://bugs.llvm.org/show_bug.cgi?id=33730.

cat test_debug_val.cpp:

void func(int, ...);

int array[0x100];

int main( int argc, char **argv )
{

int var = 56;

int a1 = array[1]; int a2 = array[2]; int a3 = array[3]; int a4 = array[4];
int a5 = array[5]; int a6 = array[6]; int a7 = array[7]; int a8 = array[8];
int a9 = array[9]; int a10 = array[10];

for( int i = 0; i < 0x100; i++ ) {    

    array[i] = var;

    func(0, i, a1, a2, a3, a4, a5, a6, a7, a8, a9, a10 );
}

return 0;

}

clang -O3 -g -c --target=aarch64-unknown-linux -std=gnu++14 test_debug_val.cpp -S -mllvm -print-after-all -mllvm -debug

test_debug_val.s:
.Ltmp7:

//DEBUG_VALUE: main:a2 <- $w21

.LBB0_1: // %for.body

                                // =>This Inner Loop Header: Depth=1
ldr     w2, [sp, #44]           // 4-byte Folded Reload

.Ltmp8:

.loc    1 16 17 is_stmt 1       // test_debug_val.cpp:16:17
adrp    x8, array
add     x8, x8, :lo12:array
mov     w9, #56

.Ltmp9:

//DEBUG_VALUE: i <- $x19

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

DEBUG_VALUE is reported not in the very beginning of Loop.
It is reported after several instructions.

print-after-all data:

• COMPUTING LIVE DEBUG VARIABLES: main **
• DEBUG VARIABLES **

!"i,14" [432B;448B):0 [544B;848r):1 Loc0=0 Loc1=%35

1. * IR Dump After Debug Variable Analysis *:
2. Machine code for function main: NoPHIs, TracksLiveness

512B bb.2.for.body:

; predecessors: %bb.0, %bb.2
  successors: %bb.1(0x04000000), %bb.2(0x7c000000); %bb.1(3.12%), %bb.2(96.88%)

544B STRWroX %28:gpr32, %27:gpr64common, %35:gpr64common, 0, 1, debug-location !54 :: (store 4 into %ir.scevgep, !tbaa !38); test_debug_val.cpp:16:17

• INTERVALS **

%35 [8r,448B:0)[512B,848r:1)[848r,944B:2) 0@8r 1@512B-phi 2@848r weight:2.289400e-01

1. * IR Dump After Greedy Register Allocator *:
2. Machine code for function main: NoPHIs, TracksLiveness

512B bb.2.for.body:

; predecessors: %bb.0, %bb.2
  successors: %bb.1(0x04000000), %bb.2(0x7c000000); %bb.1(3.12%), %bb.2(96.88%)

520B %37:gpr64common = MOVaddr target-flags(aarch64-page) @array, target-flags(aarch64-pageoff, aarch64-nc) @array, debug-location !54; test_debug_val.cpp:16:17
524B %39:gpr32 = MOVi32imm 56, debug-location !54; test_debug_val.cpp:16:17
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
544B STRWroX %39:gpr32, %37:gpr64common, %35:gpr64common, 0, 1, debug-location !54 :: (store 4 into %ir.scevgep, !tbaa !38); test_debug_val.cpp:16:17

1. * IR Dump After Virtual Register Rewriter *:
2. Machine code for function main: NoPHIs, TracksLiveness, NoVRegs

512B bb.2.for.body:

; predecessors: %bb.0, %bb.2
  successors: %bb.1(0x04000000), %bb.2(0x7c000000); %bb.1(3.12%), %bb.2(96.88%)
  liveins: $w20, $w21, $w22, $w23, $w24, $w25, $w26, $w27, $w28, $x19

520B renamable $x8 = MOVaddr target-flags(aarch64-page) @array, target-flags(aarch64-pageoff, aarch64-nc) @array, debug-location !54; test_debug_val.cpp:16:17
524B renamable $w9 = MOVi32imm 56, debug-location !54; test_debug_val.cpp:16:17
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

DBG_VALUE $x19, $noreg, !"i", !DIExpression(), debug-location !51; test_debug_val.cpp:0 line no:14

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
544B STRWroX killed renamable $w9, killed renamable $x8, renamable $x19, 0, 1, debug-location !54 :: (store 4 into %ir.scevgep, !tbaa !38); test_debug_val.cpp:16:17

[aprantl]

llvm/test/CodeGen/AArch64/wrong_debug_loc_after_regalloc.ll

105

Please remove all attributes that aren't necessary for the test. This will make maintenance much easier.

llvm/test/DebugInfo/X86/dbg-addr-dse.ll

103

We can probably delete the TBAA info without compromising the test.

[avl]

cleaned up tests.

[aprantl]

llvm/test/CodeGen/AArch64/wrong_debug_loc_after_regalloc.ll

46

what is the debug location attached to the MOV, the DBG_VALUE, and the instructions in between?
If I understand the original code correctly, the intention was to not move a DBG_VALUE before the lexical scope of its variable starts.

llvm/test/DebugInfo/X86/dbg-addr-dse.ll

45

I don't think it's appropriate to change all dbg.addr instructions to dbg.values in a test that has dbg.addr in the name.

[avl]

llvm/test/CodeGen/AArch64/wrong_debug_loc_after_regalloc.ll

46

log(before this patch) :

512B bb.2.for.body:

520B renamable $x8 = MOVaddr target-flags(aarch64-page) @array, target-flags(aarch64-pageoff, aarch64-nc) @array, debug-location !54; test_debug_val.cpp:16:17
524B renamable $w9 = MOVi32imm 56, debug-location !54; test_debug_val.cpp:16:17

DBG_VALUE $x19, $noreg, !"i", !DIExpression(), debug-location !51; test_debug_val.cpp:0 line no:14

544B STRWroX killed renamable $w9, killed renamable $x8, renamable $x19, 0, 1, debug-location !54 :: (store 4 into %ir.scevgep, !tbaa !38); test_debug_val.cpp:16:17

!51 = !DILocation(line: 0, scope: !35)
!52 = !DILocation(line: 14, column: 4, scope: !35)
!53 = !DILocation(line: 21, column: 4, scope: !14)
!54 = !DILocation(line: 16, column: 8, scope: !55)

short log :

512B bb.2.for.body:

520B $x8 = MOVaddr scope: !55
524B $w9 = MOVi32imm scope: !55

DBG_VALUE $x19, $noreg, !"i" scope: !35

544B STRWroX killed renamable $w9 scope: !55

i.e. DBG_VALUE was inserted into enclosed scope.

The reason for this is that scope identified by MachineInstr :

LiveDebugVariables.cpp:902

const InsnRange &Range : Scope->getRanges()

using InsnRange = std::pair<const MachineInstr *, const MachineInstr *>;

At the moment when scope was created the very first instruction was STRWroX.
So it become start of range. Start slot index(with type of Slot_Block) for
DBG_VALUE was trimmed to this instruction range. But after Register Allocator
there were inserted new MOV instructions before STRWroX with the same scope as STRWroX.
But Slot indices for DBG_VALUE was not updated and scope boundaries was not updated.

Actually Slot indices for DBG_VALUE looks correct without trimming : 512B,848B.
512B points to start of basic block:

512B bb.2.for.body:

which match with definition of slot index of type Slot_Block:

Basic block boundary. Used for live ranges entering and leaving a
/ block without being live in the layout neighbor. Also used as the
/// def slot of PHI-defs.

i.e. 512B,848B actually match with lexical scope and does not require trimming.

Also, trimming this slot index and leaving it of type Slot_Block is a error. Slot_Block should point to start of basic block.

I.setStartUnchecked(RStart); <<< trimmed I.start() is a Slot_Block

This concrete problem could be solved by avoiding trimming for Slot_Block only.

But it looks like trimming also is not required for the original problem test case : live-debug-variables.ll. With and without trimming it generates the same DBG_VALUE instructions :

	  DBG_VALUE $ecx, $noreg, !"i4", !DIExpression(), debug-location !14; foo.c:3:35 @[ foo.c:8:10 ] line no:3
	  DBG_VALUE $ebx, $noreg, !"i4", !DIExpression(), debug-location !14; foo.c:3:35 @[ foo.c:8:10 ] line no:3

So in short :

1. For the problem from D62650: SlotIndex was trimmed incorrectly. It does not require trimming and has incorrect value for Slot_Block after trimming.

2. Trimming for testcase from D35953 looks unnecessary. With and without trimming it generates the same DBG_VALUE instructions.

Thus it looks like trimming could be removed at all.

llvm/test/DebugInfo/X86/dbg-addr-dse.ll

45

I noticed that current clang generates IR without @llvm.dbg.addr.
That is why I regenerated the test. But I agree that this test should still
check for @llvm.dbg.addr as it was created originally. So I would return it back ...

[aprantl]

llvm/test/DebugInfo/X86/dbg-addr-dse.ll

45

IIRC, there's a flag to change this behavior. It's the default on windows only.

[aprantl]

I'm reposting your reply with an easier to read format:

log(before this patch) :

512B bb.2.for.body:

520B renamable $x8 = MOVaddr target-flags(aarch64-page) @array, target-flags(aarch64-pageoff, aarch64-nc) @array, debug-location !54; test_debug_val.cpp:16:17
524B renamable $w9 = MOVi32imm 56, debug-location !54; test_debug_val.cpp:16:17

DBG_VALUE $x19, $noreg, !"i", !DIExpression(), debug-location !51; test_debug_val.cpp:0 line no:14
544B STRWroX killed renamable $w9, killed renamable $x8, renamable $x19, 0, 1, debug-location !54 :: (store 4 into %ir.scevgep, !tbaa !38); test_debug_val.cpp:16:17

!51 = !DILocation(line: 0, scope: !35)
!52 = !DILocation(line: 14, column: 4, scope: !35)
!53 = !DILocation(line: 21, column: 4, scope: !14)
!54 = !DILocation(line: 16, column: 8, scope: !55)

short log :

512B bb.2.for.body:

520B $x8 = MOVaddr scope: !55
524B $w9 = MOVi32imm scope: !55

DBG_VALUE $x19, $noreg, !"i" scope: !35
544B STRWroX killed renamable $w9 scope: !55

i.e. DBG_VALUE was inserted into enclosed scope.

The reason for this is that scope identified by MachineInstr :

LiveDebugVariables.cpp:902

const InsnRange &Range : Scope->getRanges()

using InsnRange = std::pair<const MachineInstr *, const MachineInstr *>;

At the moment when scope was created the very first instruction was STRWroX.
So it become start of range. Start slot index(with type of Slot_Block) for
DBG_VALUE was trimmed to this instruction range. But after Register Allocator
there were inserted new MOV instructions before STRWroX with the same scope as STRWroX.
But Slot indices for DBG_VALUE was not updated and scope boundaries was not updated.

Actually Slot indices for DBG_VALUE looks correct without trimming : 512B,848B.
512B points to start of basic block:

512B bb.2.for.body:

which match with definition of slot index of type Slot_Block:

Basic block boundary. Used for live ranges entering and leaving a
/ block without being live in the layout neighbor. Also used as the
/// def slot of PHI-defs.

i.e. 512B,848B actually match with lexical scope and does not require trimming.

Also, trimming this slot index and leaving it of type Slot_Block is a error. Slot_Block should point to start of basic block.

I.setStartUnchecked(RStart); <<< trimmed I.start() is a Slot_Block

This concrete problem could be solved by avoiding trimming for Slot_Block only.

But it looks like trimming also is not required for the original problem test case : live-debug-variables.ll. With and without trimming it generates the same DBG_VALUE instructions :

DBG_VALUE $ecx, $noreg, !"i4", !DIExpression(), debug-location !14; foo.c:3:35 @[ foo.c:8:10 ] line no:3
DBG_VALUE $ebx, $noreg, !"i4", !DIExpression(), debug-location !14; foo.c:3:35 @[ foo.c:8:10 ] line no:3

So in short :

For the problem from D62650: SlotIndex was trimmed incorrectly. It does not require trimming and has incorrect value for Slot_Block after trimming.
Trimming for testcase from D35953 looks unnecessary. With and without trimming it generates the same DBG_VALUE instructions.
Thus it looks like trimming could be removed at all.

[aprantl]

Have you looked at the performance of the example posted in https://bugs.llvm.org/show_bug.cgi?id=33730 ?

[aprantl]

In D62650#1527632, @aprantl wrote:

Have you looked at the performance of the example posted in https://bugs.llvm.org/show_bug.cgi?id=33730 ?

Just to clarify: I'm asking because this change was introduced to fix a performance problem, not a correctness issue, but the LLVM testsuite only verifies the functional change, not its performance characteristics. I'm worried that reverting the change would regress the performance again.

[avl]

In D62650#1527632, @aprantl wrote:

Have you looked at the performance of the example posted in https://bugs.llvm.org/show_bug.cgi?id=33730 ?

Yes. I checked the performance impact of this patch for test case from https://bugs.llvm.org/show_bug.cgi?id=33730.
It does not increase execution time.

Removing full patch for D35953 affects performance. But removing only trimming of slot indexes does not affect performance.

I will post performance results for both modes shortly.

[avl]

restored dbg-addr-dse.ll.

[avl]

following performance results with and without this patch. they are equal :

if this patch applied:

time clang foo.c -O2 -c -g -mllvm -stats 2>&1 | grep livedebug
15074 livedebugvars - Number of DBG_VALUEs inserted

real 0m4,819s
user 0m4,799s
sys 0m0,022s

if this patch is not applied:

time clang foo.c -O2 -c -g -mllvm -stats 2>&1 | grep livedebug
15074 livedebugvars - Number of DBG_VALUEs inserted

real 0m4,838s
user 0m4,808s
sys 0m0,032s

Before D35953 that time was over 40min.

[aprantl]

I'm kind of curious where the performance is gained back, but generally, if the performance is the same, we can tentatively land this. Please be quick to revert if complaints about the performance resurface.

[aprantl]

And thanks for doing the measurements!

llvm/lib/CodeGen/LiveDebugVariables.cpp

class UserValue {
   UserValue *next = nullptr; ///< Next value in equivalence class, or null.
 
   /// Numbered locations referenced by locmap.
   SmallVector<MachineOperand, 4> locations;
 
   /// Map of slot indices where this value is live.
   LocMap locInts;
 
-  /// Set of interval start indexes that have been trimmed to the
-  /// lexical scope.
-  SmallSet<SlotIndex, 2> trimmedDefs;
-
   /// Insert a DBG_VALUE into MBB at Idx for LocNo.
   void insertDebugValue(MachineBasicBlock *MBB, SlotIndex StartIdx,
                         SlotIndex StopIdx, DbgValueLocation Loc, bool Spilled,
                         unsigned SpillOffset, LiveIntervals &LIS,
                         const TargetInstrInfo &TII,
                         const TargetRegisterInfo &TRI);
 
   /// Replace OldLocNo ranges with NewRegs ranges where NewRegs
if (PrevEnd && I.start() < PrevEnd) {
       DbgValueLocation Loc = I.value();
 
       // Stop overlaps previous end - trim the end of the interval to
       // the scope range.
       I.setStopUnchecked(PrevEnd);
       ++I;
 
       // If the interval also overlaps the start of the "next" (i.e.
-      // current) range create a new interval for the remainder (which
-      // may be further trimmed).
+      // current) range create a new interval for the remainder
       if (RStart < IStop)
         I.insert(RStart, IStop, Loc);
     }
 
     // Advance I so that I.stop() >= RStart, and check for overlap.
     I.advanceTo(RStart);
     if (!I.valid())
       return;
 
-    if (I.start() < RStart) {
-      // Interval start overlaps range - trim to the scope range.
-      I.setStartUnchecked(RStart);
-      // Remember that this interval was trimmed.
-      trimmedDefs.insert(RStart);
-    }
-
     // The end of a lexical scope range is the last instruction in the
     // range. To convert to an interval we need the index of the
     // instruction after it.
     REnd = REnd.getNextIndex();
 
     // Advance I to first interval outside current range.
     I.advanceTo(REnd);
     if (!I.valid())
for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
     SlotIndex Start = I.start();
     SlotIndex Stop = I.stop();
     DbgValueLocation Loc = I.value();
     auto SpillIt =
         !Loc.isUndef() ? SpillOffsets.find(Loc.locNo()) : SpillOffsets.end();
     bool Spilled = SpillIt != SpillOffsets.end();
     unsigned SpillOffset = Spilled ? SpillIt->second : 0;
 
-    // If the interval start was trimmed to the lexical scope insert the
-    // DBG_VALUE at the previous index (otherwise it appears after the
-    // first instruction in the range).
-    if (trimmedDefs.count(Start))
-      Start = Start.getPrevIndex();
-
     LLVM_DEBUG(dbgs() << "\t[" << Start << ';' << Stop << "):" << Loc.locNo());
     MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
     SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
 
     LLVM_DEBUG(dbgs() << ' ' << printMBBReference(*MBB) << '-' << MBBEnd);
     insertDebugValue(&*MBB, Start, Stop, Loc, Spilled, SpillOffset, LIS, TII,
                      TRI);
     // This interval may span multiple basic blocks.

llvm/test/CodeGen/AArch64/wrong_debug_loc_after_regalloc.ll

+; RUN: llc -O3 -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -print-after virtregrewriter < %s >%t 2>&1 && FileCheck <%t %s 
+
+; This test checks that DBG_VALUE instruction placed correctly.
+; Specifically: if Register Allocator inserts additional instructions
+; in the beginning of basic block then it should not break placement 
+; of DBG_VALUE for loop index variable. That DBG_VALUE instruction 
+; for "i" variable should be placed before any real loop instruction. 
+; https://reviews.llvm.org/D62650
+
+; Created from the following C source: 
+
+; cat test_debug_val.cpp
+;
+; void func(int, ...);
+;
+; int array[0x100];
+;
+; int main( int argc, char **argv )    
+; {    
+;    int var = 56;
+;
+;    int a1 = array[1]; int a2 = array[2]; int a3 = array[3]; int a4 = array[4];
+;    int a5 = array[5]; int a6 = array[6]; int a7 = array[7]; int a8 = array[8];
+;    int a9 = array[9]; int a10 = array[10];
+; 
+;    for( int i = 0; i < 0x100; i++ ) {    
+; 
+;        array[i] = var;
+; 
+;        func(0, i, a1, a2, a3, a4, a5, a6, a7, a8, a9, a10 );
+;    }
+; 
+;    return 0;
+; }
+;
+;
+; clang -O3 -g -c --target=aarch64-unknown-linux -std=gnu++14 test_debug_val.cpp -emit-llvm -S -o -
+
+
+; CHECK:  bb.2.for.body
+; CHECK-NEXT: predecessors
+; CHECK-NEXT: successors
+; CHECK-NEXT: liveins
+; CHECK-NOT: MOV
+; CHECK: DBG_VALUE $[[REG:[xw][0-9]+]], $noreg, !"i"
+; CHECK: MOV
+
+; ModuleID = 'test_debug_val.cpp'
+source_filename = "test_debug_val.cpp"
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux"
+
+@array = dso_local local_unnamed_addr global [256 x i32] zeroinitializer, align 4, !dbg !0
+
+; Function Attrs: norecurse
+define dso_local i32 @main(i32 %argc, i8** nocapture readnone %argv) local_unnamed_addr #0 !dbg !14 {
+entry:
+  call void @llvm.dbg.value(metadata i32 %argc, metadata !21, metadata !DIExpression()), !dbg !36
+  call void @llvm.dbg.value(metadata i8** %argv, metadata !22, metadata !DIExpression()), !dbg !36
+  call void @llvm.dbg.value(metadata i32 56, metadata !23, metadata !DIExpression()), !dbg !36
+  %0 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 1), align 4, !dbg !37
+  call void @llvm.dbg.value(metadata i32 %0, metadata !24, metadata !DIExpression()), !dbg !36
+  %1 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 2), align 4, !dbg !42
+  call void @llvm.dbg.value(metadata i32 %1, metadata !25, metadata !DIExpression()), !dbg !36
+  %2 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 3), align 4, !dbg !43
+  call void @llvm.dbg.value(metadata i32 %2, metadata !26, metadata !DIExpression()), !dbg !36
+  %3 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 4), align 4, !dbg !44
+  call void @llvm.dbg.value(metadata i32 %3, metadata !27, metadata !DIExpression()), !dbg !36
+  %4 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 5), align 4, !dbg !45
+  call void @llvm.dbg.value(metadata i32 %4, metadata !28, metadata !DIExpression()), !dbg !36
+  %5 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 6), align 4, !dbg !46
+  call void @llvm.dbg.value(metadata i32 %5, metadata !29, metadata !DIExpression()), !dbg !36
+  %6 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 7), align 4, !dbg !47
+  call void @llvm.dbg.value(metadata i32 %6, metadata !30, metadata !DIExpression()), !dbg !36
+  %7 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 8), align 4, !dbg !48
+  call void @llvm.dbg.value(metadata i32 %7, metadata !31, metadata !DIExpression()), !dbg !36
+  %8 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 9), align 4, !dbg !49
+  call void @llvm.dbg.value(metadata i32 %8, metadata !32, metadata !DIExpression()), !dbg !36
+  %9 = load i32, i32* getelementptr inbounds ([256 x i32], [256 x i32]* @array, i64 0, i64 10), align 4, !dbg !50
+  call void @llvm.dbg.value(metadata i32 %9, metadata !33, metadata !DIExpression()), !dbg !36
+  call void @llvm.dbg.value(metadata i32 0, metadata !34, metadata !DIExpression()), !dbg !51
+  br label %for.body, !dbg !52
+
+for.cond.cleanup:                                 ; preds = %for.body
+  ret i32 0, !dbg !53
+
+for.body:                                         ; preds = %for.body, %entry
+  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+  call void @llvm.dbg.value(metadata i64 %indvars.iv, metadata !34, metadata !DIExpression()), !dbg !51
+  %arrayidx = getelementptr inbounds [256 x i32], [256 x i32]* @array, i64 0, i64 %indvars.iv, !dbg !54
+  store i32 56, i32* %arrayidx, align 4, !dbg !57
+  %10 = trunc i64 %indvars.iv to i32, !dbg !58
+  tail call void (i32, ...) @_Z4funciz(i32 0, i32 %10, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9), !dbg !58
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !59
+  call void @llvm.dbg.value(metadata i32 undef, metadata !34, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !51
+  %exitcond = icmp eq i64 %indvars.iv.next, 256, !dbg !60
+  br i1 %exitcond, label %for.cond.cleanup, label %for.body, !dbg !52, !llvm.loop !61
+}
+
+declare dso_local void @_Z4funciz(i32, ...) local_unnamed_addr #1
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.value(metadata, metadata, metadata) #2
+
+attributes #0 = { nounwind uwtable }
+attributes #1 = { nounwind uwtable }
+attributes #2 = { nounwind readnone speculatable }
+
+!llvm.dbg.cu = !{!2}
+!llvm.module.flags = !{!10, !11, !12}
+!llvm.ident = !{!13}
+
+!0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+!1 = distinct !DIGlobalVariable(name: "array", scope: !2, file: !3, line: 4, type: !6, isLocal: false, isDefinition: true)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !3, producer: "clang version 9.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, globals: !5, nameTableKind: None)
+!3 = !DIFile(filename: "test_debug_val.cpp", directory: "")
+!4 = !{}
+!5 = !{!0}
+!6 = !DICompositeType(tag: DW_TAG_array_type, baseType: !7, size: 8192, elements: !8)
+!7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!8 = !{!9}
+!9 = !DISubrange(count: 256)
+!10 = !{i32 2, !"Dwarf Version", i32 4}
+!11 = !{i32 2, !"Debug Info Version", i32 3}
+!12 = !{i32 1, !"wchar_size", i32 4}
+!13 = !{!"clang version 9.0.0 "}
+!14 = distinct !DISubprogram(name: "main", scope: !3, file: !3, line: 6, type: !15, scopeLine: 7, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2, retainedNodes: !20)
+!15 = !DISubroutineType(types: !16)
+!16 = !{!7, !7, !17}
+!17 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !18, size: 64)
+!18 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !19, size: 64)
+!19 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_unsigned_char)
+!20 = !{!21, !22, !23, !24, !25, !26, !27, !28, !29, !30, !31, !32, !33, !34}
+!21 = !DILocalVariable(name: "argc", arg: 1, scope: !14, file: !3, line: 6, type: !7)
+!22 = !DILocalVariable(name: "argv", arg: 2, scope: !14, file: !3, line: 6, type: !17)
+!23 = !DILocalVariable(name: "var", scope: !14, file: !3, line: 8, type: !7)
+!24 = !DILocalVariable(name: "a1", scope: !14, file: !3, line: 10, type: !7)
+!25 = !DILocalVariable(name: "a2", scope: !14, file: !3, line: 10, type: !7)
+!26 = !DILocalVariable(name: "a3", scope: !14, file: !3, line: 10, type: !7)
+!27 = !DILocalVariable(name: "a4", scope: !14, file: !3, line: 10, type: !7)
+!28 = !DILocalVariable(name: "a5", scope: !14, file: !3, line: 11, type: !7)
+!29 = !DILocalVariable(name: "a6", scope: !14, file: !3, line: 11, type: !7)
+!30 = !DILocalVariable(name: "a7", scope: !14, file: !3, line: 11, type: !7)
+!31 = !DILocalVariable(name: "a8", scope: !14, file: !3, line: 11, type: !7)
+!32 = !DILocalVariable(name: "a9", scope: !14, file: !3, line: 12, type: !7)
+!33 = !DILocalVariable(name: "a10", scope: !14, file: !3, line: 12, type: !7)
+!34 = !DILocalVariable(name: "i", scope: !35, file: !3, line: 14, type: !7)
+!35 = distinct !DILexicalBlock(scope: !14, file: !3, line: 14, column: 4)
+!36 = !DILocation(line: 0, scope: !14)
+!37 = !DILocation(line: 10, column: 13, scope: !14)
+!42 = !DILocation(line: 10, column: 32, scope: !14)
+!43 = !DILocation(line: 10, column: 51, scope: !14)
+!44 = !DILocation(line: 10, column: 70, scope: !14)
+!45 = !DILocation(line: 11, column: 13, scope: !14)
+!46 = !DILocation(line: 11, column: 32, scope: !14)
+!47 = !DILocation(line: 11, column: 51, scope: !14)
+!48 = !DILocation(line: 11, column: 70, scope: !14)
+!49 = !DILocation(line: 12, column: 13, scope: !14)
+!50 = !DILocation(line: 12, column: 33, scope: !14)
+!51 = !DILocation(line: 0, scope: !35)
+!52 = !DILocation(line: 14, column: 4, scope: !35)
+!53 = !DILocation(line: 21, column: 4, scope: !14)
+!54 = !DILocation(line: 16, column: 8, scope: !55)
+!55 = distinct !DILexicalBlock(scope: !56, file: !3, line: 14, column: 37)
+!56 = distinct !DILexicalBlock(scope: !35, file: !3, line: 14, column: 4)
+!57 = !DILocation(line: 16, column: 17, scope: !55)
+!58 = !DILocation(line: 18, column: 8, scope: !55)
+!59 = !DILocation(line: 14, column: 32, scope: !56)
+!60 = !DILocation(line: 14, column: 22, scope: !56)
+!61 = distinct !{!61, !52, !62}
+!62 = !DILocation(line: 19, column: 4, scope: !35)

llvm/test/DebugInfo/X86/dbg-addr-dse.ll

entry:
   store i32 %x, i32* %x.addr, align 4
   call void @llvm.dbg.addr(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !18
   call void @escape(i32* %x.addr), !dbg !19
   call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()), !dbg !20
   store i32 1, i32* @global, align 4, !dbg !22
   call void @llvm.dbg.addr(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !23
   store i32 2, i32* %x.addr, align 4, !dbg !23
   call void @escape(i32* %x.addr), !dbg !24
   ret void, !dbg !25
 }
 
 ; ASM-LABEL: f: # @f
-; ASM: movl    %ecx, [[OFF_X:[0-9]+]](%rsp)
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X:[0-9]+]]] [$rsp+0]
+; ASM: movl    %ecx, [[OFF_X]](%rsp)
 ; ASM: callq   escape
 ; ASM: #DEBUG_VALUE: f:x <- 1
 ; ASM: movl    $1, global(%rip)
-; FIXME: Needs a fix to LiveDebugVariables
-; ASMX: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
 ; ASM: movl    $2, [[OFF_X]](%rsp)
 ; ASM: callq   escape
 ; ASM: retq
 
 ; DWARF:      DW_TAG_formal_parameter
 ; DWARF-NEXT:   DW_AT_location        (0x00000000
 ; DWARF-NEXT:      {{[^:]*}}: DW_OP_breg7 RSP+{{[0-9]+}}
 ; DWARF-NEXT:      {{[^:]*}}: DW_OP_consts +1, DW_OP_stack_value

 !17 = !{!"Simple C/C++ TBAA"}
 !18 = !DILocation(line: 3, column: 12, scope: !8)
 !19 = !DILocation(line: 4, column: 3, scope: !8)
 !20 = !DILocation(line: 5, column: 5, scope: !8)
 !21 = !DILocation(line: 6, column: 12, scope: !8)
 !22 = !DILocation(line: 6, column: 10, scope: !8)
 !23 = !DILocation(line: 7, column: 5, scope: !8)
 !24 = !DILocation(line: 8, column: 3, scope: !8)
 !25 = !DILocation(line: 9, column: 1, scope: !8)

llvm/test/DebugInfo/X86/live-debug-variables.ll

 ;          F(a,b,c,d,e) +
 ;          F(a,b,c,d,e) +
 ;          F(a,b,c,d,e);
 ; }
 
 ; CHECK:      .debug_loc contents:
 ; CHECK-NEXT: 0x00000000:
 ;   We currently emit an entry for the function prologue, too, which could be optimized away.
-; CHECK:              [0x0000000000000018, 0x0000000000000072): DW_OP_reg3 RBX
+; CHECK:              [0x0000000000000010, 0x0000000000000072): DW_OP_reg3 RBX
 ;   We should only have one entry inside the function.
 ; CHECK-NOT: :
 
 declare i32 @foobar(i32, i32, i32, i32, i32)
 
 define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) !dbg !25 {
 entry:
   tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !15, metadata !17) #3, !dbg !41