[NFC] Add the infrastructure to forward the scheduled state between MBB

[qiucf]

Summary

Forward the scheduled state from the single pred MBB, as they are belong to the the same window from pipeline view.

[lei]

llvm/include/llvm/CodeGen/MachineScheduler.h

233

Do you mean Return true if scheduled state is saved successfully before leaving the MBB?

239

Does pred mean predecessor? I think it is best to use the full word for code documentation.

239

Maybe this is more clear?

/// Return predecessor if MBB have only a single predecessor.

[fhahn]

llvm/include/llvm/CodeGen/MachineScheduler.h

312–313

IIUC this would drop the way to specify this via the scheduling policy and could change behavior for existing policies around.

It might make sense to have state forwarding imply top down here (SchedImpl->doMBBSchedRegionsTopDown() || MF.getSubtarget().forwardScheduledState())

llvm/include/llvm/CodeGen/TargetSubtargetInfo.h

197 ↗

(On Diff #197051)

Is there a benefit of putting this setting in here, rather than in the scheduling policy, like similar settings? Unless I am missing something, I think it would be more suitable in the scheduling policy, where we already have similar options.

[steven.zhang]

Address reviewer's comments. Thank you!

llvm/include/llvm/CodeGen/MachineScheduler.h

239

Thank you for the comments. I will update it.

239

Yes, it is. I will use the full item.

312–313

ok.

llvm/include/llvm/CodeGen/TargetSubtargetInfo.h

197 ↗

(On Diff #197051)

Sounds good.

[jonpa]

please rebase

llvm/include/llvm/CodeGen/MachineScheduler.h

public:
   virtual void initialize(ScheduleDAGMI *DAG) = 0;
 
   /// Tell the strategy that MBB is about to be processed.
   virtual void enterMBB(MachineBasicBlock *MBB) {};
 
   /// Tell the strategy that current MBB is done.
   virtual void leaveMBB() {};
 
+  /// Return true if scheduled state is saved successfully before leaving
+  /// the MBB.
+  virtual bool saveScheduledState(MachineBasicBlock *MBB) { return false; }
+
+  /// Return true if scheduled state is restored from predecessor MBB.
+  virtual bool restoreScheduledState(MachineBasicBlock *MBB) { return false; }
+
+  /// Return predecessor if MBB have only a single predecessor.
+  virtual MachineBasicBlock *getScheduledPredMBB(MachineBasicBlock *MBB);
+
+   /// Return true if scheduled state is forwarded between MBBs. 
+  virtual bool forwardScheduledState() const { return false; }
+
   /// Notify this strategy that all roots have been released (including those
   /// that depend on EntrySU or ExitSU).
   virtual void registerRoots() {}
 
   /// Pick the next node to schedule, or return NULL. Set IsTopNode to true to
   /// schedule the node at the top of the unscheduled region. Otherwise it will
   /// be scheduled at the bottom.
   virtual SUnit *pickNode(bool &IsTopNode) = 0;
public:
 
   // Provide a vtable anchor
   ~ScheduleDAGMI() override;
 
   /// If this method returns true, handling of the scheduling regions
   /// themselves (in case of a scheduling boundary in MBB) will be done
   /// beginning with the topmost region of MBB.
   bool doMBBSchedRegionsTopDown() const override {
-    return SchedImpl->doMBBSchedRegionsTopDown();
+    return SchedImpl->doMBBSchedRegionsTopDown() ||
+      SchedImpl->forwardScheduledState();
   }
 
   // Returns LiveIntervals instance for use in DAG mutators and such.
   LiveIntervals *getLIS() const { return LIS; }
 
   /// Return true if this DAG supports VReg liveness and RegPressure.
   virtual bool hasVRegLiveness() const { return false; }
 

llvm/lib/CodeGen/MachineScheduler.cpp

 
 #include "llvm/CodeGen/MachineScheduler.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/PriorityQueue.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/iterator_range.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"

 #include <tuple>
 #include <utility>
 #include <vector>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "machine-scheduler"
 
+STATISTIC(NumFwdSchedState, "Number of scheduled state forwarded");
+
 namespace llvm {
 
 cl::opt<bool> ForceTopDown("misched-topdown", cl::Hidden,
                            cl::desc("Force top-down list scheduling"));
 cl::opt<bool> ForceBottomUp("misched-bottomup", cl::Hidden,
                             cl::desc("Force bottom-up list scheduling"));
 cl::opt<bool>
 DumpCriticalPathLength("misched-dcpl", cl::Hidden,

 MachineSchedContext::MachineSchedContext() {
   RegClassInfo = new RegisterClassInfo();
 }
 
 MachineSchedContext::~MachineSchedContext() {
   delete RegClassInfo;
 }
 
+MachineBasicBlock *MachineSchedStrategy::getScheduledPredMBB(
+  MachineBasicBlock *MBB) {
+  return MBB->pred_size() == 1 ? *MBB->pred_begin() : nullptr;
+}
+
 namespace {
 
 /// Base class for a machine scheduler class that can run at any point.
 class MachineSchedulerBase : public MachineSchedContext,
                              public MachineFunctionPass {
 public:
   MachineSchedulerBase(char &ID): MachineFunctionPass(ID) {}
 

 void ScheduleDAGMI::releasePredecessors(SUnit *SU) {
   for (SDep &Pred : SU->Preds)
     releasePred(SU, &Pred);
 }
 
 void ScheduleDAGMI::startBlock(MachineBasicBlock *bb) {
   ScheduleDAGInstrs::startBlock(bb);
   SchedImpl->enterMBB(bb);
+
+  // If current BB has single pred MBB, forward its scheduled
+  // state to current MBB.
+  if (SchedImpl->forwardScheduledState()) {
+    MachineBasicBlock *PredMBB = SchedImpl->getScheduledPredMBB(bb);
+    if (PredMBB && SchedImpl->restoreScheduledState(PredMBB)) {
+      NumFwdSchedState ++;
+      LLVM_DEBUG(dbgs() << "** Initialize scheduled state from "
+                 << printMBBReference(*PredMBB) << "\n";);
+    }
+  }
 }
 
 void ScheduleDAGMI::finishBlock() {
+  if (SchedImpl->forwardScheduledState())
+    SchedImpl->saveScheduledState(BB);
   SchedImpl->leaveMBB();
   ScheduleDAGInstrs::finishBlock();
 }
 
 /// enterRegion - Called back from MachineScheduler::runOnMachineFunction after
 /// crossing a scheduling boundary. [begin, end) includes all instructions in
 /// the region, including the boundary itself and single-instruction regions
 /// that don't get scheduled.

llvm/lib/Target/SystemZ/SystemZMachineScheduler.h

public:
   // transferrred over scheduling boundaries.
   bool doMBBSchedRegionsTopDown() const override { return true; }
 
   void initialize(ScheduleDAGMI *dag) override;
 
   /// Tell the strategy that MBB is about to be processed.
   void enterMBB(MachineBasicBlock *NextMBB) override;
 
+  // Copy & continue the scheduler states over scheduling boundaries.
+  bool forwardScheduledState() const override { return true; }
+
   /// Tell the strategy that current MBB is done.
   void leaveMBB() override;
 
   /// Pick the next node to schedule, or return NULL.
   SUnit *pickNode(bool &IsTopNode) override;
 
   /// ScheduleDAGMI has scheduled an instruction - tell HazardRec
   /// about it.