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jonpa (Jonas Paulsson)
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Feb 24 2015, 1:18 AM (226 w, 1 d)

Recent Activity

Yesterday

jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.
  • Don't use VRM for VirtReg in analyzeOperands(). In case of an eviction (where VirtReg already has a physreg in VRM), this previous regclass should not be reused initially.
Tue, Jun 25, 3:38 AM

Tue, Jun 18

jonpa added a comment to D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Here's an updated list of stats for SPEC 2006, with the latest fixes applied, and also with "soft hints" at the bottom.

Tue, Jun 18, 10:47 AM
jonpa committed rG5c64a8c4c694: [SystemZ] Fix AHIMuxK pseudo expansion. (authored by jonpa).
[SystemZ] Fix AHIMuxK pseudo expansion.
Tue, Jun 18, 5:09 AM
jonpa committed rL363665: [SystemZ] Fix AHIMuxK pseudo expansion..
[SystemZ] Fix AHIMuxK pseudo expansion.
Tue, Jun 18, 5:06 AM
jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Don't skip all 2-address hints in getRegallocationHints() just because it's a GRH32 register: AHIMuxK actually can expand to a 2-address instruction using a high register.

Tue, Jun 18, 4:24 AM

Mon, Jun 17

jonpa added inline comments to D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.
Mon, Jun 17, 8:44 AM
jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.
  • SystemZSelectMux.cpp merged into SystemZPostRewrite.cpp.
Mon, Jun 17, 8:35 AM

Sat, Jun 8

jonpa added a comment to D22011: [SystemZ] Generate fewer instructions for (sub <constant>, x).

This test has now been added as int-sub-11.ll by r362868 "Favor 3-address instructions during instruction selection".

Sat, Jun 8, 12:03 AM

Fri, Jun 7

jonpa closed D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Thanks for review! Committed as r362868.

Fri, Jun 7, 11:45 PM
jonpa committed rGbca56ab073a0: [SystemZ] Fix CMakeLists.txt for alphabetical order (NFC). (authored by jonpa).
[SystemZ] Fix CMakeLists.txt for alphabetical order (NFC).
Fri, Jun 7, 11:40 PM
jonpa committed rL362869: [SystemZ] Fix CMakeLists.txt for alphabetical order (NFC)..
[SystemZ] Fix CMakeLists.txt for alphabetical order (NFC).
Fri, Jun 7, 11:39 PM
jonpa committed rGfdc4ea34e326: [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection. (authored by jonpa).
[SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.
Fri, Jun 7, 11:17 PM
jonpa committed rL362868: [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection..
[SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.
Fri, Jun 7, 11:17 PM
jonpa added inline comments to D60888: [SystemZ] Favor 3-address instructions during instruction selection..
Fri, Jun 7, 8:54 AM
jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

More multiclasses moved down to new section in SystemZInstrFormats.td

Fri, Jun 7, 8:47 AM

Thu, Jun 6

jonpa added inline comments to D60888: [SystemZ] Favor 3-address instructions during instruction selection..
Thu, Jun 6, 12:32 AM
jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Move down new multiclasses to new section.

Thu, Jun 6, 12:29 AM

Wed, Jun 5

jonpa added a comment to D60888: [SystemZ] Favor 3-address instructions during instruction selection..

I did SPEC runs overnight on both 2006 and 2017, see summary-files:

Wed, Jun 5, 1:37 AM

Mon, Jun 3

jonpa requested review of D60888: [SystemZ] Favor 3-address instructions during instruction selection..
Mon, Jun 3, 11:46 PM
jonpa abandoned D62803: [SystemZ] Handle 3-address instructions in foldMemoryOperandImpl().

merged into D60888.

Mon, Jun 3, 11:46 PM
jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

D62803 merged into this patch.

Mon, Jun 3, 11:41 PM
jonpa created D62803: [SystemZ] Handle 3-address instructions in foldMemoryOperandImpl().
Mon, Jun 3, 1:36 AM

May 16 2019

jonpa added a comment to D54742: [CodeMetrics] Don't let extends of i1 be free..

Thanks for review.

May 16 2019, 6:33 PM
jonpa committed rG19871f848bbe: [CodeMetrics] Don't let extends of i1 be free. (authored by jonpa).
[CodeMetrics] Don't let extends of i1 be free.
May 16 2019, 6:25 PM
jonpa committed rL360970: [CodeMetrics] Don't let extends of i1 be free..
[CodeMetrics] Don't let extends of i1 be free.
May 16 2019, 6:25 PM
jonpa closed D62036: [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM().

r360965

May 16 2019, 5:51 PM
jonpa committed rG9427961c89f4: [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM() (authored by jonpa).
[SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM()
May 16 2019, 5:49 PM
jonpa committed rL360965: [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM().
[SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM()
May 16 2019, 5:48 PM
jonpa added a comment to D62036: [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM().

(This patch is NFC on benchmarks).

May 16 2019, 3:00 PM
jonpa created D62036: [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM().
May 16 2019, 2:55 PM

May 14 2019

jonpa added a comment to D54742: [CodeMetrics] Don't let extends of i1 be free..

There are still no tests failing with this patch, and I do think I have met all requests from reviewers...

May 14 2019, 8:40 AM

May 13 2019

jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Patch refactored, with very near NFC.

May 13 2019, 3:01 PM
jonpa added a comment to D60888: [SystemZ] Favor 3-address instructions during instruction selection..

@Quentin: This has the same common-code change as in D58923, with the added VRM to foldMemoryOperand(). You seemed fine with this change, right?

Correct!

Thanks Jonas.

May 13 2019, 2:46 PM

Apr 30 2019

jonpa added a comment to D60888: [SystemZ] Favor 3-address instructions during instruction selection..

...it is unlikely we can fix this later, since RA will have allocated an additional register to load the spilled value into, and this will have pessimized the whole function (since we must already have register pressure, otherwise we wouldn't have a spilled value in the first place)...

Apr 30 2019, 1:07 PM

Apr 29 2019

jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Removing the improvement in foldMemoryOperandImpl().

Apr 29 2019, 3:15 PM
jonpa added a comment to D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Sorry if I was not clear in my description, but what I meant to illustrate is that the RA allocates the VRegs in the order I listed them. So first %21 is allocated $r2d, and then the next VReg assigned is %12, and then %13, %14, ..., %20, %21.

I guess my question is, why is RA allocating VRegs in this particular order? If it is first allocating %21, it seems there is some understanding that it makes sense to allocate it since we have a hint. But why is then %12 assigned next? The allocation of %21 should have made a new hint available for %20, so wouldn't it make more sense to now attempt to allocate %20 next?

Apr 29 2019, 11:19 AM

Apr 26 2019

jonpa added a comment to D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Well, I wasn't sure how the hinting mechanism iterates. I'd have thought the following might be possible:

First, because of this instruction:

560B      $r2d = COPY %21:gr64bit

register %r21 is hinted as $r2d.

Because of that, and this instruction:

400B      %21:gr64bit = AGRK %20:gr64bit, %10:gr64bit, implicit-def dead $cc

we now get a new hint for register %r20 as $r2d

... and so forth backwards through the AGRK chain.

Apr 26 2019, 12:48 PM
jonpa added a comment to D60888: [SystemZ] Favor 3-address instructions during instruction selection..
> %12 -> $r0d // does not see that $r2d would be better

Is this a hint, or is this a choice made by the register allocator in the absence of all hints? I would have expected that there would be no hint due to the LA, but the hints propagate backwards from the end of the AGRK chain ...

But in any case, this doesn't seem to be a big deal. Otherwise, this all looks quite good to me ...

Apr 26 2019, 12:26 PM
jonpa added inline comments to D60888: [SystemZ] Favor 3-address instructions during instruction selection..
Apr 26 2019, 11:31 AM
jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

@Quentin: This has the same common-code change as in D58923, with the added VRM to foldMemoryOperand(). You seemed fine with this change, right?

Apr 26 2019, 11:28 AM

Apr 22 2019

jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Whitespace fixes.

Apr 22 2019, 12:24 PM
jonpa added inline comments to D60888: [SystemZ] Favor 3-address instructions during instruction selection..
Apr 22 2019, 12:18 PM
jonpa updated the diff for D60888: [SystemZ] Favor 3-address instructions during instruction selection..

Most points in review inocoorporated, except for the getRegAllocationHints() -- see inlined comment.

Apr 22 2019, 12:13 PM

Apr 19 2019

jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Don't build a new MI in selectAddSubMux(), but instead update the registers, MCInstrDesc and TiedTo flag. This avoids the need to update SlotIndexes. This is needed to not loose any extra ("regalloc") operands or instruction flags (such as "nsw") . Question: Are there any such flags that should be modified when commutation is performed on a sub and it becomes an add?

Apr 19 2019, 6:46 PM

Apr 18 2019

jonpa created D60888: [SystemZ] Favor 3-address instructions during instruction selection..
Apr 18 2019, 1:50 PM

Apr 5 2019

jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Thank you Quentin for the review! Patch updated per your suggestions. (I am not sure why LIS and VRM are optional parameters to foldMemoryOperandImpl(). It would have simplified my patch somewhat if they were not, but I instead added a check to see that VRM is available.)

Apr 5 2019, 8:07 AM

Apr 4 2019

jonpa closed D60255: [SystemZ] Bugfix in isFusableLoadOpStorePattern()..

r357688

Apr 4 2019, 5:13 AM
jonpa committed rGc56ffed3043c: [SystemZ] Bugfix in isFusableLoadOpStorePattern() (authored by jonpa).
[SystemZ] Bugfix in isFusableLoadOpStorePattern()
Apr 4 2019, 5:12 AM
jonpa committed rL357688: [SystemZ] Bugfix in isFusableLoadOpStorePattern().
[SystemZ] Bugfix in isFusableLoadOpStorePattern()
Apr 4 2019, 5:11 AM
jonpa created D60255: [SystemZ] Bugfix in isFusableLoadOpStorePattern()..
Apr 4 2019, 1:25 AM

Apr 2 2019

jonpa committed rGf76fe454268d: [SystemZ] Improve instruction selection of 64 bit shifts and rotates. (authored by jonpa).
[SystemZ] Improve instruction selection of 64 bit shifts and rotates.
Apr 2 2019, 8:35 AM
jonpa committed rL357481: [SystemZ] Improve instruction selection of 64 bit shifts and rotates..
[SystemZ] Improve instruction selection of 64 bit shifts and rotates.
Apr 2 2019, 8:35 AM
jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Regalloc hints for llc/llh added as well, which handled two regressions.

Apr 2 2019, 12:30 AM

Mar 27 2019

jonpa closed D59822: [DAGCombiner] Don't allow addcarry if the type of the carry producer is illegal..

Thanks for review! Test case updated per suggestion.

Mar 27 2019, 1:47 AM
jonpa committed rG38342a5185a1: [DAGCombiner] Don't allow addcarry if the carry producer is illegal. (authored by jonpa).
[DAGCombiner] Don't allow addcarry if the carry producer is illegal.
Mar 27 2019, 1:41 AM
jonpa committed rL357052: [DAGCombiner] Don't allow addcarry if the carry producer is illegal..
[DAGCombiner] Don't allow addcarry if the carry producer is illegal.
Mar 27 2019, 1:40 AM

Mar 26 2019

jonpa committed rG8f8c38174ef3: [SystemZ] Remove LRMux pseudo instruction. (authored by jonpa).
[SystemZ] Remove LRMux pseudo instruction.
Mar 26 2019, 8:13 AM
jonpa committed rL356997: [SystemZ] Remove LRMux pseudo instruction..
[SystemZ] Remove LRMux pseudo instruction.
Mar 26 2019, 8:12 AM
jonpa created D59822: [DAGCombiner] Don't allow addcarry if the type of the carry producer is illegal..
Mar 26 2019, 7:53 AM

Mar 25 2019

jonpa committed rG0e75e21eb385: [RegAlloc] Simplify MIR test (authored by jonpa).
[RegAlloc] Simplify MIR test
Mar 25 2019, 7:28 AM
jonpa committed rL356899: [RegAlloc] Simplify MIR test.
[RegAlloc] Simplify MIR test
Mar 25 2019, 7:27 AM
jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Patch refined / improved.

Mar 25 2019, 4:43 AM

Mar 19 2019

jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Patch is still experimental, but updated with the latest improvements.

Mar 19 2019, 5:54 AM

Mar 18 2019

jonpa updated subscribers of D59480: [NFC] Add SchedState to allow forwarding the Scheduling state between MBB.

I did something similar for the SystemZ PostRA scheduler. Is this patch taking that into consideration? I have not looked at this in detail, but it would be nice if the SystemZ implementation could use this or at least parts of it...

Mar 18 2019, 2:10 PM · Restricted Project

Mar 16 2019

jonpa added a reviewer for D59363: [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC: uweigand.

I think the SystemZ test changes look ok (by replacing the undef operands with an argument the tests are more or less unaffected by this patch), but as usual I will let Uli do the formal approval.

Mar 16 2019, 6:32 AM · Restricted Project

Mar 12 2019

jonpa updated the diff for D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

Still INCOMPLETE! SPEC builds, but this patch is still experimental.

Mar 12 2019, 8:48 AM

Mar 11 2019

jonpa added inline comments to D59201: [RegAllocHints] Avoid compile time regression.
Mar 11 2019, 12:16 PM
jonpa closed D59201: [RegAllocHints] Avoid compile time regression.

r355854

Mar 11 2019, 12:04 PM
jonpa committed rG8b8dc50e79d4: [RegAlloc] Avoid compile time regression with multiple copy hints. (authored by jonpa).
[RegAlloc] Avoid compile time regression with multiple copy hints.
Mar 11 2019, 12:02 PM
jonpa committed rL355854: [RegAlloc] Avoid compile time regression with multiple copy hints..
[RegAlloc] Avoid compile time regression with multiple copy hints.
Mar 11 2019, 12:00 PM
jonpa added a comment to D59201: [RegAllocHints] Avoid compile time regression.
In D59201#1424934, @dim wrote:

Btw @jonpa, for me it's still interesting as to why the compiler hang only occurred for builds targeting i386 (i.e 32 bit x86), while x86_64 worked just fine. Is it due to the lower number of physical registers on i386?

Mar 11 2019, 11:41 AM

Mar 10 2019

jonpa created D59201: [RegAllocHints] Avoid compile time regression.
Mar 10 2019, 5:58 PM

Mar 4 2019

jonpa added a comment to D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.

The patch as of now is a work in progress (experimental).

Mar 4 2019, 1:50 PM
jonpa created D58923: [SystemZ] Utilize Compare/Add/Sub "High" instructions.
Mar 4 2019, 1:49 PM

Feb 26 2019

jonpa committed rG129826cd9fb5: [SystemZ] Pass regalloc hints to help Load-and-Test transformations. (authored by jonpa).
[SystemZ] Pass regalloc hints to help Load-and-Test transformations.
Feb 26 2019, 4:19 PM
jonpa committed rL354935: [SystemZ] Pass regalloc hints to help Load-and-Test transformations..
[SystemZ] Pass regalloc hints to help Load-and-Test transformations.
Feb 26 2019, 4:19 PM
jonpa abandoned D57926: [SystemZ] Wait with selection of VREPI and VGM until after DAGCombine2..

Replaced by https://reviews.llvm.org/D58270.

Feb 26 2019, 8:55 AM
jonpa abandoned D58142: [SystemZ] Accept more constant FP BuildVectors..

Replaced by https://reviews.llvm.org/D58270.

Feb 26 2019, 8:53 AM
jonpa closed D58270: [SystemZ] Load all vector and FP constants in Select() .

Thanks for help and review!

Feb 26 2019, 8:51 AM
jonpa committed rGc110b5b69f19: [SystemZ] Wait with selection of legal vector/FP constants until Select(). (authored by jonpa).
[SystemZ] Wait with selection of legal vector/FP constants until Select().
Feb 26 2019, 8:49 AM
jonpa committed rL354896: [SystemZ] Wait with selection of legal vector/FP constants until Select()..
[SystemZ] Wait with selection of legal vector/FP constants until Select().
Feb 26 2019, 8:48 AM

Feb 25 2019

jonpa updated the diff for D58270: [SystemZ] Load all vector and FP constants in Select() .

I don't think this will make much of a difference compile-time wise, so I'd prefer to go with the version where the code looks simpler ...

Feb 25 2019, 10:52 AM
jonpa added a comment to D58521: [DAGCombiner] allow truncation of binops after legalization if desirable.

I tried this patch on SystemZ / SPEC, and as before this seems to have a relatively very minor impact on the number of files changed (7), and on the performance (seemingly unaffected).

Feb 25 2019, 9:14 AM · Restricted Project
jonpa abandoned D58210: [SelectionDAGLegalize] Improve promotion of CTLZ.

Generally we should prefer to perform combines in DAGCombine in cases where it's straightforward.

Feb 25 2019, 8:59 AM

Feb 23 2019

jonpa added inline comments to D58270: [SystemZ] Load all vector and FP constants in Select() .
Feb 23 2019, 3:47 PM
jonpa updated the diff for D58270: [SystemZ] Load all vector and FP constants in Select() .

Patch updated per review, thanks.

Feb 23 2019, 3:47 PM

Feb 20 2019

jonpa added a comment to D54742: [CodeMetrics] Don't let extends of i1 be free..

PING!

Feb 20 2019, 6:35 PM
jonpa updated the diff for D58270: [SystemZ] Load all vector and FP constants in Select() .

Added handling for fp128 on z14, with some new tests that checks that this is working in fp-const-11.ll. NFC on spec on z14.

Feb 20 2019, 11:05 AM

Feb 15 2019

jonpa committed rGc0eef3542b3a: Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support." (authored by jonpa).
Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."
Feb 15 2019, 11:14 AM
jonpa committed rL354160: Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support.".
Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."
Feb 15 2019, 11:14 AM

Feb 14 2019

jonpa added a comment to D58142: [SystemZ] Accept more constant FP BuildVectors..

Tried this idea, see https://reviews.llvm.org/D58270

Feb 14 2019, 6:52 PM
jonpa created D58270: [SystemZ] Load all vector and FP constants in Select() .
Feb 14 2019, 6:51 PM
jonpa closed D58240: [SystemZ] Make sure VEXTEND and VROUND nodes are not emitted without vector support..

r354039.

Feb 14 2019, 10:02 AM
jonpa committed rGaa0b77d3395d: [SystemZ] Do not emit VEXTEND or VROUND nodes without vector support. (authored by jonpa).
[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support.
Feb 14 2019, 9:59 AM
jonpa committed rL354039: [SystemZ] Do not emit VEXTEND or VROUND nodes without vector support..
[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support.
Feb 14 2019, 9:58 AM
jonpa created D58240: [SystemZ] Make sure VEXTEND and VROUND nodes are not emitted without vector support..
Feb 14 2019, 9:23 AM

Feb 13 2019

jonpa created D58210: [SelectionDAGLegalize] Improve promotion of CTLZ.
Feb 13 2019, 2:07 PM

Feb 12 2019

jonpa committed rG749dc51e452d: [SystemZ] Remember to cast value to void to disable warning. (authored by jonpa).
[SystemZ] Remember to cast value to void to disable warning.
Feb 12 2019, 3:14 PM
jonpa committed rL353898: [SystemZ] Remember to cast value to void to disable warning..
[SystemZ] Remember to cast value to void to disable warning.
Feb 12 2019, 3:14 PM
jonpa updated the diff for D57926: [SystemZ] Wait with selection of VREPI and VGM until after DAGCombine2..

Patch rebased.

Feb 12 2019, 2:55 PM