This commit is for `[RFC] Porting MachinePipeliner to AArch64+SVE'.
Adding some reviewers + folks on the original review:
Note: this is work-in-progress proof-of-concept for the RFC:
Thanks for updating the patch. I think it would be slightly easier to review this patch if you could provide a brief high-level description of the modelling and some test cases.
could use range based for loop here?
We need to ignore debug info here I think.
Does this implementation satisfy the interface? According to TargetInstrInfo::reduceLoopCount, it should generate code to reduce the loop iteration by one.
Couldn't we stop after we found the SUBSXrr closest to the terminator?
Thank you for your detailed comment.
Your points make sense to me.
I should have clarified the intent of this patch.
I do not think that this patch will be accepted.
This is aimed to show that we can generate code without DFAPacketizer with as few changes as possible.
For that reason, the method interface and code keeps the original code as much as possible.
Hexagon uses special loop instructions to count down the loop counter.
Yes, you are right.
No, at the moment there is nothing.
Since I think there was no objection to the extension of MachinePipeliner, I am currently creating a patch aimed for upstreaming.
Please review it.
Thank you very much.