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huntergr (Graham Hunter)
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User Since
Sep 5 2014, 5:55 AM (403 w, 1 d)

Recent Activity

Wed, May 4

huntergr accepted D114487: [LAA] Support runtime checks for select GEP base pointers..

LGTM

Wed, May 4, 1:42 AM · Restricted Project, Restricted Project

Apr 12 2022

huntergr added a comment to D108699: [LAA] Analyze pointers forked by a select.

Thanks for the update!

I think it would be good to split this up to have a first patch that just adds very limited support in findForkedSCEVs and then gradually add support for more cases separately. This also makes it easier to make sure all code paths in findForkedSCEVs are covered by the unit tests.

I went ahead and rebased D114487 and stripped the fork analysis to the bare minimum. I'd be happy to land the scaffolding in D114487 separately and this patch and following could add the sophisticated fork analysis.

Apr 12 2022, 5:32 AM · Restricted Project, Restricted Project

Apr 7 2022

huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased. Ping?

Apr 7 2022, 1:47 AM · Restricted Project, Restricted Project

Mar 17 2022

Herald added a project to D119284: [IR] Add intrinsics to represent complex multiply and divide instructions.: Restricted Project.
Mar 17 2022, 3:05 AM · Restricted Project, Restricted Project

Mar 3 2022

huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased, added a recursion limit to the SCEV building function.

Mar 3 2022, 2:19 AM · Restricted Project, Restricted Project

Feb 8 2022

huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased and changed to use @fhahn 's lighter-weight approach from D114487 combined with my recursive function to find the SCEVs. Although the simplified tests are handled with a couple levels of checking, the real applications I was working on had additional operations between the ptr value for the load or store and a select.

Feb 8 2022, 2:09 AM · Restricted Project, Restricted Project

Nov 26 2021

huntergr added inline comments to D108699: [LAA] Analyze pointers forked by a select.
Nov 26 2021, 2:27 AM · Restricted Project, Restricted Project
huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Revised based on @fhahn 's initial suggestions, rebased.

Nov 26 2021, 2:22 AM · Restricted Project, Restricted Project

Nov 24 2021

huntergr committed rGdee810e117ad: [NFC][LAA] Precommit tests for forked pointers (authored by huntergr).
[NFC][LAA] Precommit tests for forked pointers
Nov 24 2021, 8:21 AM

Nov 22 2021

huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased, disabled by default, added a couple of different instructions into the tests to ensure those paths are at least covered even if they aren't in a positive case right now; I'm still planning to leave those cases (known strides, g/s, uniform) for a followup patch; I suppose I could start a patch series if people want to see those earlier.

Nov 22 2021, 5:23 AM · Restricted Project, Restricted Project

Nov 17 2021

huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased, and changed the membership of a checking group to be a pair of PointerInfo index and fork so that printing can show which forks are present in a group.

Nov 17 2021, 2:23 AM · Restricted Project, Restricted Project

Nov 10 2021

huntergr abandoned D109749: Experimental Partial Mem2Reg.

Superseded by @lebedev.ri 's patches. I'll continue looking at the metadata angle separately.

Nov 10 2021, 5:05 AM · Restricted Project

Nov 5 2021

huntergr updated the diff for D109749: Experimental Partial Mem2Reg.

Added the ability to look through GEPs for a call. I've limited this to using indexes of all 0, and only for single value types, so I'm not sure how often we'll encounter that. The limitation on the indexes does match the existing checks for whether promotion is allowed.

Nov 5 2021, 3:46 AM · Restricted Project

Nov 2 2021

huntergr added a comment to D109749: Experimental Partial Mem2Reg.
Nov 2 2021, 3:46 AM · Restricted Project
huntergr added a comment to D109749: Experimental Partial Mem2Reg.

Does this work for you:

diff --git a/llvm/lib/Analysis/CaptureTracking.cpp b/llvm/lib/Analysis/CaptureTracking.cpp
index 8955658cb9e7..41251d2676e6 100644
--- a/llvm/lib/Analysis/CaptureTracking.cpp
+++ b/llvm/lib/Analysis/CaptureTracking.cpp
@@ -373,9 +373,13 @@ void llvm::PointerMayBeCaptured(const Value *V, CaptureTracker *Tracker,
     case Instruction::Store:
       // Stored the pointer - conservatively assume it may be captured.
       // Volatile stores make the address observable.
-      if (U->getOperandNo() == 0 || cast<StoreInst>(I)->isVolatile())
+      if (U->getOperandNo() == 0 || cast<StoreInst>(I)->isVolatile()) {
+        if (auto *AI = dyn_cast<AllocaInst>(I->getOperand(1)->stripInBoundsOffsets()))
+          if (AI->hasMetadata("nocapture_storage"))
+            break;
         if (Tracker->captured(U))
           return;
+      }
       break;
     case Instruction::AtomicRMW: {
       // atomicrmw conceptually includes both a load and store from

And then add !nocapture_storage !0 after the alloca in your example as well as !0 = !{!0} in the end of that file

Ah, the 'nocapture_storage' metadata is what I've been missing, thanks. I'll update the diff once I've added that and adjusted the tests.

Technically, this is not yet something we have in the IR. We can reply to the old thread in which different solutions were discussed and
propose this one again. Then modify Clang to emit the metadata for the reduction case and land the diff I posted. All that said, it works
for your case, right?

Nov 2 2021, 3:28 AM · Restricted Project
huntergr updated the diff for D109749: Experimental Partial Mem2Reg.

Updated the diff based on the suggestion from @lebedev.ri

Nov 2 2021, 3:26 AM · Restricted Project

Oct 21 2021

huntergr added a comment to D109749: Experimental Partial Mem2Reg.
  1. Although the address is loop invariant, the data isn't.

LICM does scalar promotion (controlled by -disable-licm-promotion), as in "promote memory location to register". It doesn't matter whether the value at the location is invariant. Whether this belongs into a pass called "Loop Invariant Code Motion" is a different question.

  1. For this loop in particular, the store is conditional so might never happen. We *could* add a second boolean reduction to determine whether or not to actually perform a store after the loop, but that's a bit more complicated than just letting mem2reg do what it should.

This patch adds another pass, not make mem2reg do it. LICM currently does not handle conditional control flow for scalar promotion, but it should require much less code to change that. See the use of isGuaranteedToExecute in llvm::promoteLoopAccessesToScalars.

Oct 21 2021, 9:14 AM · Restricted Project
huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased, minor fixes from review comments.

Oct 21 2021, 4:43 AM · Restricted Project, Restricted Project
huntergr added a comment to D109749: Experimental Partial Mem2Reg.

I have seen cases where this would be beneficial,
some of those are just due to lack of inlining, but not all.

I strongly believe this should be part of SROA,
it should analyze the alloca's ignoring captures,
and if it is otherwise promoteable, it should:

  1. duplicate the original alloca (only for simplicity, this is fine since we know the old alloca goes away)
  2. before each capture, load contents of the old alloca, and store it into new alloca
  3. after each capture, load contents of the new alloca, and store it into old alloca
  4. change captures to refer to the new alloca
  5. run AggLoadStoreRewriter on the new alloca - so that all the uses of old alloca we've just introduced are analyzeable by SROA
  6. proceed with normal handling of the old alloca - mem2reg will now succeed
Oct 21 2021, 2:18 AM · Restricted Project

Oct 20 2021

huntergr added a comment to D108699: [LAA] Analyze pointers forked by a select.

Ping.

Oct 20 2021, 5:39 AM · Restricted Project, Restricted Project

Oct 12 2021

huntergr added inline comments to D108699: [LAA] Analyze pointers forked by a select.
Oct 12 2021, 2:10 AM · Restricted Project, Restricted Project
huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased, updated based on review comments.

Oct 12 2021, 1:53 AM · Restricted Project, Restricted Project

Sep 14 2021

huntergr requested review of D109749: Experimental Partial Mem2Reg.
Sep 14 2021, 2:32 AM · Restricted Project

Sep 7 2021

huntergr added inline comments to D108699: [LAA] Analyze pointers forked by a select.
Sep 7 2021, 7:31 AM · Restricted Project, Restricted Project

Sep 6 2021

huntergr updated the diff for D108699: [LAA] Analyze pointers forked by a select.

Rebased, ran clang-format over the patch.

Sep 6 2021, 6:18 AM · Restricted Project, Restricted Project

Aug 25 2021

huntergr requested review of D108699: [LAA] Analyze pointers forked by a select.
Aug 25 2021, 6:04 AM · Restricted Project, Restricted Project

Jun 22 2021

huntergr committed rGa83ce95b0976: [clang] Remove unused capture in closure (authored by huntergr).
[clang] Remove unused capture in closure
Jun 22 2021, 7:12 AM
huntergr added a comment to rGc6a91ee6aaaa: [Clang][OpenMP] Monotonic does not apply to SIMD.

I'm fixing up the buildbot failure - other parts of the repo (e.g. openmp) fail to build with -Werror so I don't normally use it.

Jun 22 2021, 3:18 AM
huntergr committed rGc6a91ee6aaaa: [Clang][OpenMP] Monotonic does not apply to SIMD (authored by huntergr).
[Clang][OpenMP] Monotonic does not apply to SIMD
Jun 22 2021, 2:25 AM
huntergr closed D103793: [Clang][OpenMP] Monotonic does not apply to SIMD.
Jun 22 2021, 2:25 AM · Restricted Project

Jun 17 2021

huntergr added a comment to D103793: [Clang][OpenMP] Monotonic does not apply to SIMD.

Ping.

Jun 17 2021, 6:48 AM · Restricted Project

Jun 7 2021

huntergr added a comment to D103793: [Clang][OpenMP] Monotonic does not apply to SIMD.

Apologies for not including more of the diff for context, but the test files are large enough that the full diff exceeds the maximum upload size.

Jun 7 2021, 1:46 AM · Restricted Project
huntergr requested review of D103793: [Clang][OpenMP] Monotonic does not apply to SIMD.
Jun 7 2021, 1:44 AM · Restricted Project

Mar 4 2020

huntergr added a comment to D75594: [AArch64] Add support for Fujitsu A64FX.

Looks good, I agree with @dmgreen that a clang driver test would be nice.

Mar 4 2020, 7:19 AM · Restricted Project, Restricted Project

Mar 2 2020

huntergr committed rGad497658d25a: [OpenMP] Allow const parameters in declare simd linear clause (authored by huntergr).
[OpenMP] Allow const parameters in declare simd linear clause
Mar 2 2020, 6:57 AM
huntergr closed D75350: [OpenMP] Allow const parameters in declare simd linear clause.
Mar 2 2020, 6:57 AM · Restricted Project
huntergr updated the diff for D75350: [OpenMP] Allow const parameters in declare simd linear clause.
  • Removed the ) my editor helpfully added to the CHECK line
  • Added a test to declare_simd_aarch64.c
Mar 2 2020, 6:16 AM · Restricted Project

Feb 28 2020

huntergr updated the diff for D75350: [OpenMP] Allow const parameters in declare simd linear clause.
  • Added a function body to the test so that it would generate symbols
  • Added check lines to ensure the mangled name is present
  • Reformatted the params of Sema::CheckOpenMPLinearDecl to comply with coding style.
Feb 28 2020, 9:37 AM · Restricted Project
huntergr added inline comments to D75350: [OpenMP] Allow const parameters in declare simd linear clause.
Feb 28 2020, 7:17 AM · Restricted Project
huntergr created D75350: [OpenMP] Allow const parameters in declare simd linear clause.
Feb 28 2020, 6:39 AM · Restricted Project

Jan 23 2020

huntergr abandoned D47779: [AArch64][SVE] Implement copying for Z registers.

Superseded by D66302

Jan 23 2020, 6:57 AM
huntergr abandoned D47771: [AArch64][SVE] Scalable arguments and returns passed in Z regs.

Superseded by D65448

Jan 23 2020, 6:48 AM
huntergr abandoned D47773: [AArch64][SVE] Add VScale Intrinsic.

Superseded by D68203

Jan 23 2020, 6:48 AM

Nov 26 2019

huntergr added inline comments to D69956: [AArch64][SVE] Integer reduction instructions pattern/intrinsics..
Nov 26 2019, 3:39 AM · Restricted Project

Nov 18 2019

huntergr committed rG3f08ad611aa2: [SVE][CodeGen] Scalable vector MVT size queries (authored by huntergr).
[SVE][CodeGen] Scalable vector MVT size queries
Nov 18 2019, 4:35 AM
huntergr closed D66871: [SVE] MVT scalable size queries.
Nov 18 2019, 4:35 AM · Restricted Project

Nov 14 2019

huntergr updated the diff for D66871: [SVE] MVT scalable size queries.
  • Removed const qualifier from queries
  • Swapped to std::make_tuple for the comparisons in CodeGenDAGPatterns.cpp
Nov 14 2019, 5:20 AM · Restricted Project

Nov 13 2019

huntergr added inline comments to D66871: [SVE] MVT scalable size queries.
Nov 13 2019, 5:02 AM · Restricted Project

Nov 12 2019

huntergr added inline comments to D66871: [SVE] MVT scalable size queries.
Nov 12 2019, 4:04 AM · Restricted Project
huntergr added a comment to D66871: [SVE] MVT scalable size queries.

I also changed the SelectionDAGBuilder code for masked loads/stores/gathers/scatters to use the known min size when creating a MachineMemoryOperand, since MMO isn't aware of scalable types yet. I've left TODOs as reminders.

Nov 12 2019, 4:04 AM · Restricted Project
huntergr updated the diff for D66871: [SVE] MVT scalable size queries.
  • Switched the lambdas in CodeGenDAGPatterns to use std::tie for ordering. This needed the TypeSize objects to be constant (I get a "non-const lvalue reference" error otherwise), so I changed all query methods to return const objects.
  • Changed stack offset to deliberately use a TypeSize. This hit another problem with implicit promotion and signed v. unsigned casting, so I've added explicit casts.
Nov 12 2019, 3:41 AM · Restricted Project

Nov 5 2019

huntergr added inline comments to D66871: [SVE] MVT scalable size queries.
Nov 5 2019, 9:42 AM · Restricted Project

Oct 30 2019

huntergr added a comment to D68476: [SVE][AArch64] Adding pattern matching for some SVE instructions..

Renamed the inrinsics according to the convention.

Oct 30 2019, 3:27 AM · Restricted Project
huntergr added inline comments to D69128: [AArch64][SVE] Add patterns for some integer vector instructions.
Oct 30 2019, 3:17 AM · Restricted Project

Oct 29 2019

huntergr added inline comments to D69128: [AArch64][SVE] Add patterns for some integer vector instructions.
Oct 29 2019, 5:01 AM · Restricted Project
huntergr added inline comments to D68476: [SVE][AArch64] Adding pattern matching for some SVE instructions..
Oct 29 2019, 3:37 AM · Restricted Project

Oct 25 2019

huntergr updated the diff for D66871: [SVE] MVT scalable size queries.
  • Refactored to match the same approach used in D53137 -- TypeSize returned for all size queries instead of introducing separate interfaces and relying on implicit conversion to be (mostly) compatible with existing code.
  • Added 'isByteSized()' interface to TypeSize.
  • Minor bugfix to DAGCombiner::ForwardStoreValueToDirectLoad, where implicit conversions allowed an unsigned number to wrap and then be converted to a larger signed integer; with TypeSize using uint64_t instead, this showed up during a make check-all run with ubsan active. Can't write a test for that one since the transform bailed out when Offset was non-zero.
Oct 25 2019, 4:55 AM · Restricted Project

Oct 23 2019

huntergr added a comment to D68877: [AArch64][SVE] Implement masked load intrinsics.

I was also expecting something that says "setOperationAction(ISD::MLOAD, VT, Legal)" somewhere, but I guess that's already the default?

Oct 23 2019, 6:26 AM · Restricted Project

Oct 22 2019

huntergr accepted D68476: [SVE][AArch64] Adding pattern matching for some SVE instructions..

Hi, thanks for waiting a bit. LGTM.

Oct 22 2019, 2:30 AM · Restricted Project

Oct 18 2019

huntergr committed rG84da2596f96d: [AArch64][SVE] Add SPLAT_VECTOR ISD Node (authored by huntergr).
[AArch64][SVE] Add SPLAT_VECTOR ISD Node
Oct 18 2019, 4:48 AM
huntergr closed D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
Oct 18 2019, 4:47 AM · Restricted Project
huntergr committed rL375222: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
[AArch64][SVE] Add SPLAT_VECTOR ISD Node
Oct 18 2019, 4:47 AM
huntergr committed rL375216: Request commit access for huntergr.
Request commit access for huntergr
Oct 18 2019, 3:27 AM

Oct 17 2019

huntergr updated the diff for D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
  • Fixed legalization action code, which was trying to use widening for all integer scalable vector types after the new MVT ranges were added
  • Added unit tests for legalizing the result via promotion
  • Minor cleanups, additional comments as requested
Oct 17 2019, 6:21 AM · Restricted Project

Oct 16 2019

huntergr committed rGf998fa2924c7: [SVE][IR] Small TypeSize improvements left out of initial commit (authored by huntergr).
[SVE][IR] Small TypeSize improvements left out of initial commit
Oct 16 2019, 9:32 AM
huntergr committed rL375013: [SVE][IR] Small TypeSize improvements left out of initial commit.
[SVE][IR] Small TypeSize improvements left out of initial commit
Oct 16 2019, 9:32 AM
huntergr added a comment to D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.

Ping.

Oct 16 2019, 6:41 AM · Restricted Project

Oct 8 2019

huntergr added a comment to D53137: Scalable vector core instruction support + size queries.

Hmm, forgot to add the last round of minor fixes before committing. Sorry about that, will push them as well.

Oct 8 2019, 7:01 AM · Restricted Project, Restricted Project
huntergr committed rGb302561b763a: [SVE][IR] Scalable Vector size queries and IR instruction support (authored by huntergr).
[SVE][IR] Scalable Vector size queries and IR instruction support
Oct 8 2019, 5:56 AM
huntergr committed rL374042: [SVE][IR] Scalable Vector size queries and IR instruction support.
[SVE][IR] Scalable Vector size queries and IR instruction support
Oct 8 2019, 5:56 AM
huntergr closed D53137: Scalable vector core instruction support + size queries.
Oct 8 2019, 5:56 AM · Restricted Project, Restricted Project

Oct 3 2019

huntergr updated the diff for D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
  • Added DAG combine to canonicalize a build_vector splat into a splat_vector if the target supports the splat_vector operation (by overriding the default Expand legalization action)
Oct 3 2019, 6:55 AM · Restricted Project
huntergr updated subscribers of D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.

Hi James,

Oct 3 2019, 6:52 AM · Restricted Project

Oct 2 2019

huntergr added inline comments to D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
Oct 2 2019, 2:39 AM · Restricted Project

Oct 1 2019

huntergr updated the diff for D53137: Scalable vector core instruction support + size queries.
  • Renamed ScalableSize to TypeSize, including header name.
  • added alignTo function that takes and returns a TypeSize. I wasn't sure if this should be added to MathExtras.h where the other variants live, so just kept it in TypeSize.h for now
Oct 1 2019, 5:16 AM · Restricted Project, Restricted Project
huntergr added inline comments to D53137: Scalable vector core instruction support + size queries.
Oct 1 2019, 5:14 AM · Restricted Project, Restricted Project

Sep 30 2019

huntergr updated subscribers of D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
Sep 30 2019, 8:08 AM · Restricted Project
huntergr added inline comments to D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
Sep 30 2019, 5:28 AM · Restricted Project
huntergr updated the diff for D47775: [AArch64][SVE] Add SPLAT_VECTOR ISD Node.
Sep 30 2019, 4:06 AM · Restricted Project
huntergr accepted D68098: [AArch64][SVE] Adding patterns for floating point SVE add instructions..

You can add the extra multiclass for ftsmul if you wish, but it's not needed until someone implements a matching pattern for that instruction. We only match it against an ACLE intrinsic downstream, not common SDag nodes.

Sep 30 2019, 2:52 AM · Restricted Project

Sep 27 2019

huntergr added a comment to D68098: [AArch64][SVE] Adding patterns for floating point SVE add instructions..

Thanks for taking an interest in SVE codegen. The tests look fine, but we had a different approach in mind for generating many of the patterns. In this case instead of making separate def : Pat< lines for each type, we add an SDPatternOperator and pattern to the multiclass for that instruction type.

Sep 27 2019, 4:53 AM · Restricted Project

Sep 23 2019

huntergr updated the diff for D53137: Scalable vector core instruction support + size queries.
  • Changed existing interface to return ScalableSize objects and added a (mostly) transparent conversion, as per Sander's suggestion.
  • Removed new interfaces for DataLayout and Type.
  • Fixed cases where the transparent conversion doesn't quite work (e.g. std::max/min, where the types must be the same)
Sep 23 2019, 4:25 AM · Restricted Project, Restricted Project

Sep 17 2019

huntergr committed rG1a9195d817d3: [SVE][MVT] Fixed-length vector MVT ranges (authored by huntergr).
[SVE][MVT] Fixed-length vector MVT ranges
Sep 17 2019, 3:20 AM
huntergr committed rL372099: [SVE][MVT] Fixed-length vector MVT ranges.
[SVE][MVT] Fixed-length vector MVT ranges
Sep 17 2019, 3:18 AM
huntergr closed D66339: [SVE] Fixed-length vector MVT ranges.
Sep 17 2019, 3:17 AM · Restricted Project

Aug 29 2019

huntergr added a comment to D66871: [SVE] MVT scalable size queries.

LGTM

Aug 29 2019, 6:34 AM · Restricted Project
huntergr added a comment to D53137: Scalable vector core instruction support + size queries.

Does anyone like Sander's suggestion to make ScalableSize (or whatever we end up naming it) the return value for all size queries and provide an overloaded cast operator to transparently work with existing code comparing against unsigned values? Or is it preferable to keep the current split?

Aug 29 2019, 5:52 AM · Restricted Project, Restricted Project

Aug 28 2019

huntergr created D66871: [SVE] MVT scalable size queries.
Aug 28 2019, 4:16 AM · Restricted Project

Aug 27 2019

huntergr updated the diff for D53137: Scalable vector core instruction support + size queries.
  • Split out backend code into separate patches
  • Renamed 'Min' to 'KnownMin' in method names.
  • Added a few more comments.
Aug 27 2019, 3:42 AM · Restricted Project, Restricted Project

Aug 21 2019

huntergr updated the diff for D66339: [SVE] Fixed-length vector MVT ranges.
  • Reordered MVTs to group fixed-length types together (and the same for scalable).
  • Replaced existing range accessors to remove explicit isScalableVector checks on MVTs in various backends.
Aug 21 2019, 9:02 AM · Restricted Project

Aug 16 2019

huntergr added a comment to D66339: [SVE] Fixed-length vector MVT ranges.

Split out from D53137.

Aug 16 2019, 4:14 AM · Restricted Project
huntergr added a comment to D53137: Scalable vector core instruction support + size queries.

Created D66339 to split out the code to skip scalable vector types in other backends.

Aug 16 2019, 4:14 AM · Restricted Project, Restricted Project
huntergr created D66339: [SVE] Fixed-length vector MVT ranges.
Aug 16 2019, 4:04 AM · Restricted Project

Aug 9 2019

huntergr added a comment to D53137: Scalable vector core instruction support + size queries.

Thanks @huntergr for working on this!

This patch can probably be split into two separate patches, which make them easier to review;

  • One that fixes the Targets to ignore scalable types (see comment)
  • Another one that adds the interface for scalable size queries.
Aug 9 2019, 3:34 AM · Restricted Project, Restricted Project
huntergr added inline comments to D53137: Scalable vector core instruction support + size queries.
Aug 9 2019, 3:16 AM · Restricted Project, Restricted Project

Aug 6 2019

huntergr updated the diff for D53137: Scalable vector core instruction support + size queries.
  • Added comments explaining the new methods
  • Added tests for the MVT/EVT/DataLayout interfaces
  • Refactored ScalableSize class operators to build on '==' and '<'
  • Added checks in various backends that don't support scalable vectors to prevent legalizing operations involving scalable MVTs
Aug 6 2019, 5:55 AM · Restricted Project, Restricted Project

Aug 5 2019

huntergr committed rG208d63ea9018: [MVT][SVE] Map between scalable vector IR Type and VTs (authored by huntergr).
[MVT][SVE] Map between scalable vector IR Type and VTs
Aug 5 2019, 4:19 AM
huntergr committed rL367832: [MVT][SVE] Map between scalable vector IR Type and VTs.
[MVT][SVE] Map between scalable vector IR Type and VTs
Aug 5 2019, 4:18 AM
huntergr closed D47770: [MVT][SVE] Add EVT strings and Type mapping.
Aug 5 2019, 4:18 AM · Restricted Project

Aug 2 2019

huntergr updated the diff for D47770: [MVT][SVE] Add EVT strings and Type mapping.
  • Added inline comments to clarify boolean parameter meaning.
Aug 2 2019, 3:29 AM · Restricted Project