kparzysz (Krzysztof Parzyszek)
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Apr 21 2014, 4:27 PM (186 w, 6 d)

Recent Activity

Thu, Nov 16

kparzysz added a comment to D39848: [RISCV] Support lowering FrameIndex.

Why do you want the special load/store instructions?

Thu, Nov 16, 12:51 PM

Fri, Nov 10

kparzysz committed rL317921: Recommit r317904: [Hexagon] Create HexagonISelDAGToDAG.h, NFC.
Recommit r317904: [Hexagon] Create HexagonISelDAGToDAG.h, NFC
Fri, Nov 10, 12:10 PM
kparzysz committed rL317916: Revert "[Hexagon] Create HexagonISelDAGToDAG.h, NFC".
Revert "[Hexagon] Create HexagonISelDAGToDAG.h, NFC"
Fri, Nov 10, 11:27 AM
kparzysz committed rL317904: [Hexagon] Create HexagonISelDAGToDAG.h, NFC.
[Hexagon] Create HexagonISelDAGToDAG.h, NFC
Fri, Nov 10, 10:40 AM
kparzysz committed rL317903: Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc.
Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc
Fri, Nov 10, 10:36 AM
kparzysz closed D39596: Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc by committing rL317903: Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc.
Fri, Nov 10, 10:36 AM

Tue, Nov 7

kparzysz committed rL317592: [Hexagon] Make a test more flexible in HexagonLoopIdiomRecognition.
[Hexagon] Make a test more flexible in HexagonLoopIdiomRecognition
Tue, Nov 7, 9:06 AM

Fri, Nov 3

kparzysz added a comment to D39596: Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc.

Here's an example of what an .inc file will look like:

Fri, Nov 3, 7:08 AM
kparzysz created D39596: Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc.
Fri, Nov 3, 7:05 AM

Thu, Nov 2

kparzysz committed rL317275: [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr.
[Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr
Thu, Nov 2, 2:57 PM
kparzysz added a comment to D36504: [CodeGenPrepare][WIP] Convert uncond. branch to return into a return to help with shrink-wrapping.

Thanks for the feedback. Can you elaborate a bit more on why we wouldn't want to do this in CodeGenPrepare?

Thu, Nov 2, 10:53 AM
kparzysz added a comment to D36504: [CodeGenPrepare][WIP] Convert uncond. branch to return into a return to help with shrink-wrapping.

So I attempted this in the PreRA tail-duplication pass. Unfortunately by the time we get there the opportunity is gone. If we do not duplicate the return then CodegenPrepare will end up deleting the for.cond.cleanup.loopexit block and we loose the shrink wrapping opportunity.

Thu, Nov 2, 7:53 AM

Mon, Oct 30

kparzysz committed rL316904: [Hexagon] Allow the RDF optimizations to be run in .mir testcases.
[Hexagon] Allow the RDF optimizations to be run in .mir testcases
Mon, Oct 30, 7:12 AM

Fri, Oct 27

kparzysz committed rL316804: [Hexagon] Adjust patterns to reflect instruction selection preferences.
[Hexagon] Adjust patterns to reflect instruction selection preferences
Fri, Oct 27, 3:25 PM
kparzysz committed rL316785: [Hexagon] Fix an incorrect assertion in HexagonConstExtenders.cpp.
[Hexagon] Fix an incorrect assertion in HexagonConstExtenders.cpp
Fri, Oct 27, 11:53 AM
kparzysz added a comment to D36504: [CodeGenPrepare][WIP] Convert uncond. branch to return into a return to help with shrink-wrapping.

Isn't tail duplication a better place to do this?

Fri, Oct 27, 3:48 AM

Wed, Oct 25

kparzysz committed rL316601: [Hexagon] Account for negative offset when limiting max deviation.
[Hexagon] Account for negative offset when limiting max deviation
Wed, Oct 25, 11:47 AM

Mon, Oct 23

kparzysz committed rL316367: [Hexagon] Return the correct chain edge for i1 function calls.
[Hexagon] Return the correct chain edge for i1 function calls
Mon, Oct 23, 12:36 PM
kparzysz committed rL316363: [Hexagon] Add extra pattern for S4_addaddi.
[Hexagon] Add extra pattern for S4_addaddi
Mon, Oct 23, 12:10 PM

Oct 20 2017

kparzysz committed rL316243: [Packetizer] Add function to check for aliasing between instructions.
[Packetizer] Add function to check for aliasing between instructions
Oct 20 2017, 3:10 PM
kparzysz committed rL316236: [Hexagon] Report error instead of crashing on wrong inline-asm constraints.
[Hexagon] Report error instead of crashing on wrong inline-asm constraints
Oct 20 2017, 1:25 PM
kparzysz committed rL316228: [Hexagon] Reorganize and update instruction patterns.
[Hexagon] Reorganize and update instruction patterns
Oct 20 2017, 12:33 PM
kparzysz committed rL316218: [Hexagon] Allow redefinition with immediates for hw loop conversion.
[Hexagon] Allow redefinition with immediates for hw loop conversion
Oct 20 2017, 9:57 AM

Oct 19 2017

kparzysz committed rL316170: [Hexagon] Fix store conversion from rr to io in optimize addressing modes.
[Hexagon] Fix store conversion from rr to io in optimize addressing modes
Oct 19 2017, 10:01 AM

Oct 18 2017

kparzysz committed rL316098: [Hexagon] Mark vector loads as predicable, update instruction mappings.
[Hexagon] Mark vector loads as predicable, update instruction mappings
Oct 18 2017, 10:36 AM
kparzysz accepted D38852: [Hexagon] Handling of new HVX flags and target-features.
Oct 18 2017, 9:28 AM

Oct 16 2017

kparzysz committed rL315938: Replace make_range in MachineRegisterInfo with ArrayRef, NFC.
Replace make_range in MachineRegisterInfo with ArrayRef, NFC
Oct 16 2017, 2:20 PM
kparzysz committed rL315927: Add iterator range MachineRegisterInfo::liveins(), adopt users, NFC.
Add iterator range MachineRegisterInfo::liveins(), adopt users, NFC
Oct 16 2017, 12:09 PM
kparzysz committed rL315925: [Hexagon] Rangify some loops, NFC.
[Hexagon] Rangify some loops, NFC
Oct 16 2017, 11:43 AM

Oct 15 2017

kparzysz committed rL315883: [Hexagon] Add LLVM_ATTRIBUTE_UNUSED to operator<<, NFC.
[Hexagon] Add LLVM_ATTRIBUTE_UNUSED to operator<<, NFC
Oct 15 2017, 5:30 PM
kparzysz committed rL315870: Phony change to CMakeLists.txt to (hopefully) trigger regeneration.
Phony change to CMakeLists.txt to (hopefully) trigger regeneration
Oct 15 2017, 11:23 AM
kparzysz committed rL315861: [unittests] Only build llvm-cfi-verify if X86 is in LLVM_TARGETS_TO_BUILD.
[unittests] Only build llvm-cfi-verify if X86 is in LLVM_TARGETS_TO_BUILD
Oct 15 2017, 9:55 AM
kparzysz committed rL315858: [TableGen] Remove error checks incorrectly failing on non-error conditions.
[TableGen] Remove error checks incorrectly failing on non-error conditions
Oct 15 2017, 8:40 AM

Oct 13 2017

kparzysz committed rL315769: Revert r315763: "[Hexagon] Rangify some loops, NFC".
Revert r315763: "[Hexagon] Rangify some loops, NFC"
Oct 13 2017, 2:57 PM
kparzysz committed rL315763: [Hexagon] Rangify some loops, NFC.
[Hexagon] Rangify some loops, NFC
Oct 13 2017, 2:43 PM
kparzysz committed rL315735: [Hexagon] Minimize number of repeated constant extenders.
[Hexagon] Minimize number of repeated constant extenders
Oct 13 2017, 12:03 PM
kparzysz committed rL315692: [Hexagon] Add patterns for cmpb/cmph with immediate arguments.
[Hexagon] Add patterns for cmpb/cmph with immediate arguments
Oct 13 2017, 8:57 AM

Oct 12 2017

kparzysz accepted D38850: [Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC).
Oct 12 2017, 9:57 AM
kparzysz accepted D38851: [Hexagon] New HVX target features..

LGTM with a comment.

Oct 12 2017, 9:55 AM

Oct 11 2017

kparzysz committed rL315510: [Hexagon] Make sure that new-value jump is packetized with producer.
[Hexagon] Make sure that new-value jump is packetized with producer
Oct 11 2017, 2:20 PM
kparzysz accepted D38789: MachineInstr: Make isEqual agree with getHashValue in MachineInstrExpressionTrait.
Oct 11 2017, 9:16 AM
kparzysz committed rL315472: [Hexagon] Handle non-immediate operands to A2_addi in getIncrementValue.
[Hexagon] Handle non-immediate operands to A2_addi in getIncrementValue
Oct 11 2017, 9:15 AM
kparzysz committed rL315468: [Pipeliner] Fix offset value for instrs dependent on post-inc load/stores.
[Pipeliner] Fix offset value for instrs dependent on post-inc load/stores
Oct 11 2017, 9:00 AM
kparzysz committed rL315466: [Pipeliner] Improve serialization order for post-increments.
[Pipeliner] Improve serialization order for post-increments
Oct 11 2017, 8:52 AM
kparzysz added a comment to D38789: MachineInstr: Make isEqual agree with getHashValue in MachineInstrExpressionTrait.

Here's a comment from include/llvm/CodeGen/MachineInstr.h (definition of MachineInstrExpressionTrait)

Oct 11 2017, 6:51 AM

Oct 6 2017

kparzysz accepted D38624: [TableGen] Avoid unnecessary std::string creations.
Oct 6 2017, 3:42 PM

Oct 5 2017

kparzysz committed rL315019: [Hexagon] Make PS_fi and PS_fia extendable (they both expand to A2_addi).
[Hexagon] Make PS_fi and PS_fia extendable (they both expand to A2_addi)
Oct 5 2017, 1:21 PM
kparzysz committed rL315013: [Hexagon] Give uniform names to functions changing addressing modes, NFC.
[Hexagon] Give uniform names to functions changing addressing modes, NFC
Oct 5 2017, 1:03 PM
kparzysz committed rL314991: [RDF] Simplify construction of maximal registers.
[RDF] Simplify construction of maximal registers
Oct 5 2017, 10:14 AM

Oct 4 2017

kparzysz added inline comments to D38534: [TablgeGen] : Tidy up CodeGenSchedule. NFC..
Oct 4 2017, 11:06 AM
kparzysz committed rL314920: [Hexagon] Add a member Subtarget to HexagonInstrInfo, NFC.
[Hexagon] Add a member Subtarget to HexagonInstrInfo, NFC
Oct 4 2017, 11:02 AM
kparzysz accepted D38548: Hexagon] Move getHexagonTargetFeatures to Hexagon.cpp (NFC).

Thanks!

Oct 4 2017, 10:44 AM
kparzysz set the repository for D38548: Hexagon] Move getHexagonTargetFeatures to Hexagon.cpp (NFC) to rL LLVM.
Oct 4 2017, 10:42 AM

Oct 3 2017

kparzysz added a comment to D38235: [UnreachableBlockElim] Use COPY if PHI input is undef.

Yes. This is great! Thanks.

Oct 3 2017, 7:10 AM

Sep 29 2017

kparzysz accepted D38235: [UnreachableBlockElim] Use COPY if PHI input is undef.

Looks good. Thanks.

Sep 29 2017, 5:59 AM

Sep 27 2017

kparzysz committed rL314301: Typo: const MCSchedModel SchedModel -> const MCSchedModel &SchedModel.
Typo: const MCSchedModel SchedModel -> const MCSchedModel &SchedModel
Sep 27 2017, 5:50 AM

Sep 26 2017

kparzysz committed rL314216: [Hexagon] Fix a typo: #ifndef DEBUG -> #ifndef NDEBUG.
[Hexagon] Fix a typo: #ifndef DEBUG -> #ifndef NDEBUG
Sep 26 2017, 3:34 PM
kparzysz committed rL314214: [Hexagon] Fix initialization of HexagonSubtarget.
[Hexagon] Fix initialization of HexagonSubtarget
Sep 26 2017, 3:34 PM

Sep 25 2017

kparzysz committed rL314136: [Hexagon] Better determination of register classes in bit tracker.
[Hexagon] Better determination of register classes in bit tracker
Sep 25 2017, 12:14 PM
kparzysz committed rL314134: [Hexagon] Make getHexagonSubRegIndex take reference instead of pointer.
[Hexagon] Make getHexagonSubRegIndex take reference instead of pointer
Sep 25 2017, 11:51 AM

Sep 22 2017

kparzysz committed rL314004: [TableGen] Replace InfoByHwMode::getAsString with writeToStream.
[TableGen] Replace InfoByHwMode::getAsString with writeToStream
Sep 22 2017, 11:31 AM
kparzysz committed rL313990: Revert "[TableGen] Replace InfoByHwMode::getAsString with writeToStream".
Revert "[TableGen] Replace InfoByHwMode::getAsString with writeToStream"
Sep 22 2017, 9:20 AM
kparzysz committed rL313989: [TableGen] Replace InfoByHwMode::getAsString with writeToStream.
[TableGen] Replace InfoByHwMode::getAsString with writeToStream
Sep 22 2017, 9:08 AM
kparzysz accepted D38174: [TableGen] Return StringRef from ValueTypeByHwMode::getMVTName.

This is good regardless of any future changes to replace getAsString.

Sep 22 2017, 6:21 AM

Sep 20 2017

kparzysz accepted D37957: [TableGen] Some simple optimizations to TableGen execution time.

LGTM with a few nitpicks (inline comments). Also, could you commit the DenseSet/tombstone changes in a separate patch?

Sep 20 2017, 10:41 AM

Sep 19 2017

kparzysz added inline comments to D37957: [TableGen] Some simple optimizations to TableGen execution time.
Sep 19 2017, 2:46 PM
kparzysz added a comment to D37957: [TableGen] Some simple optimizations to TableGen execution time.

Can you apply this patch Krzysztof and see if you can figure out what the right thing to do is with the empty StringRef?

Sep 19 2017, 2:41 PM
kparzysz abandoned D31958: [Hexagon] Switch to parametrized register classes for HVX.

Committed in https://reviews.llvm.org/rL313362.

Sep 19 2017, 12:58 PM
kparzysz added a comment to D37957: [TableGen] Some simple optimizations to TableGen execution time.

Could you rebase this patch?

Sep 19 2017, 12:53 PM
kparzysz accepted D37966: [TableGen] Generate formatted DAGISelEmitter without relying on formatted_raw_ostream..

On my machine, in the debug build of TableGen, the time for X86 -gen-dag-isel went down from 61s to 52s.

Sep 19 2017, 12:29 PM
kparzysz committed rL313660: Recommit r313647 now that GCC seems to accept the offering.
Recommit r313647 now that GCC seems to accept the offering
Sep 19 2017, 11:44 AM
kparzysz committed rL313651: Revert "Improve TableGen performance of -gen-dag-isel (motivated by X86….
Revert "Improve TableGen performance of -gen-dag-isel (motivated by X86…
Sep 19 2017, 10:56 AM
kparzysz committed rL313649: Move "(void)variable" closer to the assertion that uses it, NFC.
Move "(void)variable" closer to the assertion that uses it, NFC
Sep 19 2017, 10:49 AM
kparzysz committed rL313647: Improve TableGen performance of -gen-dag-isel (motivated by X86 backend).
Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)
Sep 19 2017, 10:34 AM

Sep 15 2017

kparzysz committed rL313380: Fix selecting legal types in TypeInfer::getLegalTypes.
Fix selecting legal types in TypeInfer::getLegalTypes
Sep 15 2017, 11:59 AM
kparzysz committed rL313362: [Hexagon] Switch to parameterized register classes for HVX.
[Hexagon] Switch to parameterized register classes for HVX
Sep 15 2017, 8:47 AM

Sep 14 2017

kparzysz added inline comments to D37866: [LateJumpThreading] Enable LateJumpThreading right before CGP..
Sep 14 2017, 2:12 PM
kparzysz committed rL313295: Subtarget support for parameterized register class information.
Subtarget support for parameterized register class information
Sep 14 2017, 1:45 PM
kparzysz closed D31959: Subtarget support for parametrized register class information by committing rL313295: Subtarget support for parameterized register class information.
Sep 14 2017, 1:45 PM
kparzysz committed rL313273: Silence warning about unused variable in release build.
Silence warning about unused variable in release build
Sep 14 2017, 10:09 AM
kparzysz committed rL313271: TableGen support for parameterized register class information.
TableGen support for parameterized register class information
Sep 14 2017, 9:59 AM
kparzysz closed D31951: TableGen support for parameterized register class information by committing rL313271: TableGen support for parameterized register class information.
Sep 14 2017, 9:59 AM
kparzysz committed rL313268: [IfConversion] More simple, correct dead/kill liveness handling.
[IfConversion] More simple, correct dead/kill liveness handling
Sep 14 2017, 8:56 AM
kparzysz closed D37611: [IfConversion] More simple, correct dead/kill liveness handling by committing rL313268: [IfConversion] More simple, correct dead/kill liveness handling.
Sep 14 2017, 8:56 AM
kparzysz added inline comments to D37816: Experimental late jump threading pass.
Sep 14 2017, 8:36 AM
kparzysz added a comment to D36404: Disable jump threading into loop headers.

On another note, this patch was meant to prevent adding extra branches to the header from within the loop. Branches to the header that come from outside of the loop should be fine. In other words, it should be ok to refine the check to only disable jump threading when any of the PredBBs is dominated by the header (SuccBB).

Sep 14 2017, 8:25 AM
kparzysz added inline comments to D37816: Experimental late jump threading pass.
Sep 14 2017, 8:13 AM
kparzysz added a comment to D37611: [IfConversion] More simple, correct dead/kill liveness handling.

I found and fixed the reason our randomized tests didn't run cleanly. It was essentially that stepBackwards removed defined regs from the set even if the instruction was predicated.

Sep 14 2017, 7:46 AM
kparzysz updated the diff for D37816: Experimental late jump threading pass.

Reduced code duplication between the legacy (old PM) passes.

Sep 14 2017, 7:39 AM
kparzysz committed rL313257: [Hexagon] Make getMemAccessSize return size in bytes.
[Hexagon] Make getMemAccessSize return size in bytes
Sep 14 2017, 5:08 AM

Sep 13 2017

kparzysz added a comment to D36404: Disable jump threading into loop headers.

Late jump threading is in D37816.

Sep 13 2017, 10:09 AM
kparzysz created D37816: Experimental late jump threading pass.
Sep 13 2017, 10:08 AM
kparzysz added a comment to D36404: Disable jump threading into loop headers.

I'll come up with a late jump threading pass that you can try plugging in, in addition to having the existing one.

Sep 13 2017, 9:08 AM
kparzysz added a comment to D36404: Disable jump threading into loop headers.

Have you tried it? Changing jump threading to have early/late versions is trivial, the question is when should the late one run, and if that would help in the first place.

Sep 13 2017, 8:18 AM
kparzysz added a comment to D37611: [IfConversion] More simple, correct dead/kill liveness handling.

Good news everyone... The Hexagon test suite passed.

Sep 13 2017, 7:08 AM
kparzysz added a comment to D37611: [IfConversion] More simple, correct dead/kill liveness handling.

To add to my previous comment---there is a plan to eliminate kill flags in the future (as I was told), so passes the rely on those will eventually need to be modified. If it's the presence of kill flags on predicated instructions (and tied uses) that is causing problems, maybe it would be a good thing to address that in the passes that are exploiting that to generate wrong code. It would imply more work, so I guess the answer depends on how much more work it would be.

Sep 13 2017, 6:53 AM
kparzysz added a comment to D37611: [IfConversion] More simple, correct dead/kill liveness handling.

I just started a test run on a Hexagon suite, but I wonder if the anti-dependence breaker could be a problem. This is regarding the question of whether the implicit uses on predicated instructions should be killed or not. BTW, the same argument applies to tied uses. Even though the live ranges seem to end/start at that instruction, the register cannot be renamed in only one of them. This differentiates those instructions from a case of unrelated use/def coincidentally using the same register (as was in the example: r0 = add r0, r1).

Sep 13 2017, 6:48 AM

Sep 12 2017

kparzysz updated the diff for D31951: TableGen support for parameterized register class information.

Addressed Simon's comments.

Sep 12 2017, 11:14 AM
kparzysz added inline comments to D31951: TableGen support for parameterized register class information.
Sep 12 2017, 11:11 AM
kparzysz committed rL313038: Remove ancient, commented out code from TableGen, NFC.
Remove ancient, commented out code from TableGen, NFC
Sep 12 2017, 8:49 AM