[RISCV] Add errors for mixing Zcmp with C/Zcd and D.

[craig.topper]

Summary

We already had an error for Zcmt though it appears to be untested
Add similar one for Zcmp along with tests for both.

Factor the code to share the strings as much as possible.

[VincentWu]

llvm/lib/Support/RISCVISAInfo.cpp

900–901

I found there might be a problem about predicate of Zcd

Zcd contains: c.fld, c.fldsp, c.fsd, c.fsdsp, witch is a subset of D ext.
it directly depends on Zca instead of C ext.

Thus, c.fld, c.fldsp, c.fsd, c.fsdsp are valid when HasZcd || (HasD && HasC)

Zcmp is directly incompatible with Zcd, so there should be two error msg

'Zcmp' extension is incompatible with 'Zcd'
and 'Zcmp' extension is incompatible with both 'C' and 'D' are enabled

900–901

same problem also happens on MC layer.

I am trying to fix it by

def HasCompressedDoubleFloat
    : Predicate<"Subtarget->hasStdExtZcd() || (Subtarget->hasStdExtC() && Subtarget->hasStdExtC())">,
                AssemblerPredicate<(any_of FeatureStdExtZcd, (all_of FeatureStdExtD, FeatureStdExtC)),
                                   "'Zcd' (Compressed Double-Precision Floating-Point Instructions) or "
                                   "both 'C' (Compressed Instructions) and "
                                   "'D' (Double-Precision Floating-Point)">;

but it seems AssemblerPredicate can't process nested conditions

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

900–901

I don't think the Zcd instructions should be enabled without D. That's not a very useful behavior. There wouldn't be much point in making CPU support Zcd without D.

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

900–901

I think Zcd might imply D and Zcf on RV32 might imply F. That was stated by Krste here https://lists.riscv.org/g/tech-code-size/message/1544

I think even the normative text can state Zcf requires F and Zcd
requires D (which means it also requires F).  It's OK for normative
text to be redundant at times, and I think this would reduce
confusion.

[VincentWu]

LGTM

llvm/lib/Support/RISCVISAInfo.cpp

for (auto Ext : AllExts) {
     }
   }
 
   return RISCVISAInfo::postProcessAndChecking(std::move(ISAInfo));
 }
 
 Error RISCVISAInfo::checkDependency() {
   bool HasC = Exts.count("c") != 0;
-  bool HasD = Exts.count("d") != 0;
   bool HasF = Exts.count("f") != 0;
   bool HasZfinx = Exts.count("zfinx") != 0;
   bool HasVector = Exts.count("zve32x") != 0;
   bool HasZvl = MinVLen != 0;
   bool HasZcmt = Exts.count("zcmt") != 0;
-  bool HasZcd = Exts.count("zcd") != 0;
 
   if (HasF && HasZfinx)
     return createStringError(errc::invalid_argument,
                              "'f' and 'zfinx' extensions are incompatible");
 
   if (HasZvl && !HasVector)
     return createStringError(
         errc::invalid_argument,
return createStringError(
         errc::invalid_argument,
         "'zvk*' requires 'v' or 'zve*' extension to also be specified");
 
   if (Exts.count("zvknhb") && !Exts.count("zve64x"))
     return createStringError(
         errc::invalid_argument,
         "'zvknhb' requires 'v' or 'zve64*' extension to also be specified");
 
-  if (HasZcmt && HasD && HasC)
+  if ((HasZcmt || Exts.count("zcmp")) && Exts.count("d") &&
+      (HasC || Exts.count("zcd")))
     return createStringError(
         errc::invalid_argument,
-        "'zcmt' is incompatible with 'c' extension when 'd' extension is set");
-
-  if (HasZcmt && HasD && HasZcd)
-    return createStringError(errc::invalid_argument,
-                             "'zcmt' is incompatible with 'zcd' extension when "
-                             "'d' extension is set");
+        Twine("'") + (HasZcmt ? "zcmt" : "zcmp") +
+        "' extension is incompatible with '" + (HasC ? "c" : "zcd") +
+        "' extension when 'd' extension is enabled");
 
   // Additional dependency checks.
   // TODO: The 'q' extension requires rv64.
   // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'.
 
   return Error::success();
 }
 

llvm/unittests/Support/RISCVISAInfoTest.cpp

TEST(ParseArchString, AddsImpliedExtensions) {
   EXPECT_EQ(ExtsRV32IZKN.count("zkn"), 1U);
 }
 
 TEST(ParseArchString, RejectsConflictingExtensions) {
   for (StringRef Input : {"rv32ifzfinx", "rv64gzdinx"}) {
     EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
               "'f' and 'zfinx' extensions are incompatible");
   }
+
+  for (StringRef Input : {"rv32idc_zcmp1p0", "rv64idc_zcmp1p0"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'zcmp' extension is incompatible with 'c' extension when 'd' "
+              "extension is enabled");
+  }
+
+  for (StringRef Input : {"rv32id_zcd1p0_zcmp1p0", "rv64id_zcd1p0_zcmp1p0"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'zcmp' extension is incompatible with 'zcd' extension when 'd' "
+              "extension is enabled");
+  }
+
+  for (StringRef Input : {"rv32idc_zcmt1p0", "rv64idc_zcmt1p0"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'zcmt' extension is incompatible with 'c' extension when 'd' "
+              "extension is enabled");
+  }
+
+  for (StringRef Input : {"rv32id_zcd1p0_zcmt1p0", "rv64id_zcd1p0_zcmt1p0"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'zcmt' extension is incompatible with 'zcd' extension when 'd' "
+              "extension is enabled");
+  }
 }
 
 TEST(ToFeatureVector, IIsDroppedAndExperimentalExtensionsArePrefixed) {
   auto MaybeISAInfo1 =
       RISCVISAInfo::parseArchString("rv64im_zihintntl", true, false);
   ASSERT_THAT_EXPECTED(MaybeISAInfo1, Succeeded());
   EXPECT_THAT((*MaybeISAInfo1)->toFeatureVector(),
               ElementsAre("+m", "+experimental-zihintntl"));