[RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg

[foad]

Summary

Live intervals for physical registers are calculated lazily on demand.
In a case like this:

16B    %0:gpr32 = IMPLICIT_DEF
32B    $wzr = COPY %0

if the live interval for $wzr did not already exist then the update code
in joinReservedPhysReg would create it with a definition at 32B, which
would remain even after the COPY was deleted.

[foad]

llvm/lib/CodeGen/RegisterCoalescer.cpp

2242

In the old code, if the live interval did not already exist, this would do nothing...

2245

... and this would create a new live interval including the dead def at 32B, which would not get removed when CopyMI was deleted.

llvm/test/CodeGen/AArch64/regcoal-physreg.mir

1–5

This is a hack to ensure that machine verification gets run after (the first run of) simple-register-coalescing. It will not be required after D129208 lands.

[foad]

Blank line

[arsenm]

llvm/test/CodeGen/AArch64/regcoal-physreg.mir

1–5

Should add a comment here explaining this

llvm/lib/CodeGen/RegisterCoalescer.cpp

if (CP.isFlipped()) {
     // Physreg is copied into vreg
     //   %y = COPY %physreg_x
     //   ...  //< no other def of %physreg_x here
     //   use %y
     // =>
     //   ...
     //   use %physreg_x
     CopyMI = MRI->getVRegDef(SrcReg);
+    deleteInstr(CopyMI);
   } else {
     // VReg is copied into physreg:
     //   %y = def
     //   ... //< no other def or use of %physreg_x here
     //   %physreg_x = COPY %y
     // =>
     //   %physreg_x = def
     //   ...
if (!MRI->isConstantPhysReg(DstReg)) {
       }
     }
 
     // We're going to remove the copy which defines a physical reserved
     // register, so remove its valno, etc.
     LLVM_DEBUG(dbgs() << "\t\tRemoving phys reg def of "
                       << printReg(DstReg, TRI) << " at " << CopyRegIdx << "\n");
 
     LIS->removePhysRegDefAt(DstReg.asMCReg(), CopyRegIdx);
+    deleteInstr(CopyMI);
+
     // Create a new dead def at the new def location.
     for (MCRegUnitIterator UI(DstReg, TRI); UI.isValid(); ++UI) {
       LiveRange &LR = LIS->getRegUnit(*UI);
       LR.createDeadDef(DestRegIdx, LIS->getVNInfoAllocator());
     }
   }
 
-  deleteInstr(CopyMI);
-
   // We don't track kills for reserved registers.
   MRI->clearKillFlags(CP.getSrcReg());
 
   return true;
 }
 
 //===----------------------------------------------------------------------===//
 //                 Interference checking and interval joining

llvm/test/CodeGen/AArch64/regcoal-physreg.mir

-# RUN: llc -mtriple=aarch64-apple-ios -run-pass=simple-register-coalescing -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64-apple-ios -run-pass=simple-register-coalescing,simple-register-coalescing -verify-machineinstrs %s -o - | FileCheck %s
+
+# FIXME: Second run of the pass is a workaround for a bug in
+# -run-pass. The verifier doesn't detect broken LiveIntervals, see bug
+# 46873
 --- |
   declare void @f2()
 
   define void @func0() { ret void }
   define void @func1() { ret void }
   define void @func2() { ret void }
 ...
 ---