Precommit test for #61120

[junaire]

Summary

Signed-off-by: Jun Zhang <[e-mail]>

[junaire]

Add more tests

[RKSimon]

Please can you add remaining icmp predicates - I think we still need sge/uge/eq/ne?

llvm/test/CodeGen/X86/setcc-combine.ll

503

maybe rename these to @cmp_not_????? to better explain the test

584

Please can you add at least one test with the constant on the LHS, to check that existing canonicalization will commute it.

640

<2 x i64> are interesting due to the weak support pre-SSE4 but it'd be good have some other vector types as well

[junaire]

1. Rename tests.
2. Add more preds tests
3. Use <3 x i64> for vector tests but also keep one for <2 x i64>
4. Add commute tests

[RKSimon]

The <3 x i64> is interesting - but I meant other legal SSE vector types likes <16 x i8> / <8 x i16> / <4 x i32>

[junaire]

Use legal SSE types <4 x i32>

[RKSimon]

LGTM - cheers

[junaire]

Close it in https://reviews.llvm.org/rG1c420cd4e31f68fedca83b4d3a857a5519f4ce03

llvm/test/CodeGen/X86/setcc-combine.ll

 ; CHECK-NEXT:    andnpd %xmm1, %xmm2
 ; CHECK-NEXT:    orpd %xmm2, %xmm0
 ; CHECK-NEXT:    retq
   %neg = fneg double %x
   %cmp = fcmp ogt double %x, 1.0
   %r = select i1 %cmp, double %x, double %neg
   ret double %r
 }
+
+define i64 @cmp_sgt_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_sgt_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setg %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp sgt i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_sgt_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_sgt_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $43, %rdi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp sgt i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <2 x i64> @cmp_sgt_not_with_vec(<2 x i64> %a, <2 x i64> %b) {
+; CHECK-LABEL: cmp_sgt_not_with_vec:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [18446744071562067967,18446744071562067967]
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    pxor %xmm2, %xmm0
+; CHECK-NEXT:    movdqa %xmm0, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm1, %xmm2
+; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
+; CHECK-NEXT:    pcmpeqd %xmm1, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; CHECK-NEXT:    pand %xmm3, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
+; CHECK-NEXT:    por %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %na = xor <2 x i64> %a, <i64 -1, i64 -1>
+  %nb = xor <2 x i64> %b, <i64 -1, i64 -1>
+  %c = icmp sgt <2 x i64> %na, %nb
+  %r = sext <2 x i1> %c to <2 x i64>
+  ret <2 x i64> %r
+}
+
+define i64 @cmp_ugt_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_ugt_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    addq %rsi, %rdi
+; CHECK-NEXT:    sbbq %rax, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp ugt i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_ugt_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_ugt_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $43, %rdi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp ugt i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <2 x i64> @cmp_ugt_not_with_vec(<2 x i64> %a, <2 x i64> %b) {
+; CHECK-LABEL: cmp_ugt_not_with_vec:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159]
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    pxor %xmm2, %xmm0
+; CHECK-NEXT:    movdqa %xmm0, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm1, %xmm2
+; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
+; CHECK-NEXT:    pcmpeqd %xmm1, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; CHECK-NEXT:    pand %xmm3, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
+; CHECK-NEXT:    por %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %na = xor <2 x i64> %a, <i64 -1, i64 -1>
+  %nb = xor <2 x i64> %b, <i64 -1, i64 -1>
+  %c = icmp ugt <2 x i64> %na, %nb
+  %r = sext <2 x i1> %c to <2 x i64>
+  ret <2 x i64> %r
+}
+
+define i64 @cmp_sge_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_sge_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp sge i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_sge_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_sge_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $42, %rdi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp sge i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <2 x i64> @cmp_sge_not_with_vec(<2 x i64> %a, <2 x i64> %b) {
+; CHECK-LABEL: cmp_sge_not_with_vec:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159]
+; CHECK-NEXT:    pxor %xmm2, %xmm0
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    movdqa %xmm1, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm0, %xmm2
+; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
+; CHECK-NEXT:    pand %xmm3, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
+; CHECK-NEXT:    por %xmm0, %xmm1
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT:    pxor %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %na = xor <2 x i64> %a, <i64 -1, i64 -1>
+  %nb = xor <2 x i64> %b, <i64 -1, i64 -1>
+  %c = icmp uge <2 x i64> %na, %nb
+  %r = sext <2 x i1> %c to <2 x i64>
+  ret <2 x i64> %r
+}
+
+define i64 @cmp_uge_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_uge_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp uge i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_uge_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_uge_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $42, %rdi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp uge i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_uge_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_uge_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    movq %r9, %xmm0
+; SSE2-NEXT:    movq %rdx, %xmm3
+; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159]
+; SSE2-NEXT:    pxor %xmm4, %xmm2
+; SSE2-NEXT:    pxor %xmm4, %xmm1
+; SSE2-NEXT:    movdqa %xmm1, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm1, %xmm2
+; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
+; SSE2-NEXT:    pxor %xmm1, %xmm2
+; SSE2-NEXT:    movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF
+; SSE2-NEXT:    movq %rax, %xmm4
+; SSE2-NEXT:    pxor %xmm4, %xmm3
+; SSE2-NEXT:    pxor %xmm4, %xmm0
+; SSE2-NEXT:    movdqa %xmm0, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm0, %xmm3
+; SSE2-NEXT:    pxor %xmm1, %xmm3
+; SSE2-NEXT:    movq %xmm3, %rcx
+; SSE2-NEXT:    movq %xmm2, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_uge_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    movq %r9, %xmm0
+; SSE41-NEXT:    movq %rdx, %xmm3
+; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159]
+; SSE41-NEXT:    pxor %xmm4, %xmm2
+; SSE41-NEXT:    pxor %xmm4, %xmm1
+; SSE41-NEXT:    movdqa %xmm1, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm1, %xmm2
+; SSE41-NEXT:    pcmpeqd %xmm1, %xmm1
+; SSE41-NEXT:    pxor %xmm1, %xmm2
+; SSE41-NEXT:    movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF
+; SSE41-NEXT:    movq %rax, %xmm4
+; SSE41-NEXT:    pxor %xmm4, %xmm3
+; SSE41-NEXT:    pxor %xmm4, %xmm0
+; SSE41-NEXT:    movdqa %xmm0, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm0, %xmm3
+; SSE41-NEXT:    pxor %xmm1, %xmm3
+; SSE41-NEXT:    movq %xmm3, %rcx
+; SSE41-NEXT:    movq %xmm2, %rax
+; SSE41-NEXT:    pextrq $1, %xmm2, %rdx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp uge <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+
+define i64 @cmp_sle_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_sle_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setle %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp sle i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_sle_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_sle_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $43, %rdi
+; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp sle i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_sle_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_sle_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    movq %rdx, %xmm0
+; SSE2-NEXT:    movq %r9, %xmm3
+; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967]
+; SSE2-NEXT:    pxor %xmm4, %xmm2
+; SSE2-NEXT:    pxor %xmm4, %xmm1
+; SSE2-NEXT:    movdqa %xmm1, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm1, %xmm2
+; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
+; SSE2-NEXT:    pxor %xmm1, %xmm2
+; SSE2-NEXT:    movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; SSE2-NEXT:    movq %rax, %xmm4
+; SSE2-NEXT:    pxor %xmm4, %xmm3
+; SSE2-NEXT:    pxor %xmm4, %xmm0
+; SSE2-NEXT:    movdqa %xmm0, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm0, %xmm3
+; SSE2-NEXT:    pxor %xmm1, %xmm3
+; SSE2-NEXT:    movq %xmm3, %rcx
+; SSE2-NEXT:    movq %xmm2, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_sle_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    movq %rdx, %xmm0
+; SSE41-NEXT:    movq %r9, %xmm3
+; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967]
+; SSE41-NEXT:    pxor %xmm4, %xmm2
+; SSE41-NEXT:    pxor %xmm4, %xmm1
+; SSE41-NEXT:    movdqa %xmm1, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm1, %xmm2
+; SSE41-NEXT:    pcmpeqd %xmm1, %xmm1
+; SSE41-NEXT:    pxor %xmm1, %xmm2
+; SSE41-NEXT:    movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; SSE41-NEXT:    movq %rax, %xmm4
+; SSE41-NEXT:    pxor %xmm4, %xmm3
+; SSE41-NEXT:    pxor %xmm4, %xmm0
+; SSE41-NEXT:    movdqa %xmm0, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm0, %xmm3
+; SSE41-NEXT:    pxor %xmm1, %xmm3
+; SSE41-NEXT:    movq %xmm3, %rcx
+; SSE41-NEXT:    movq %xmm2, %rax
+; SSE41-NEXT:    pextrq $1, %xmm2, %rdx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp sle <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+
+define i64 @cmp_slt_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_slt_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp slt i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_slt_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_slt_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $42, %rdi
+; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp slt i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_slt_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_slt_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    movq %r9, %xmm0
+; SSE2-NEXT:    movq %rdx, %xmm3
+; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967]
+; SSE2-NEXT:    pxor %xmm4, %xmm2
+; SSE2-NEXT:    pxor %xmm4, %xmm1
+; SSE2-NEXT:    movdqa %xmm1, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm1, %xmm2
+; SSE2-NEXT:    movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; SSE2-NEXT:    movq %rax, %xmm1
+; SSE2-NEXT:    pxor %xmm1, %xmm3
+; SSE2-NEXT:    pxor %xmm1, %xmm0
+; SSE2-NEXT:    movdqa %xmm0, %xmm1
+; SSE2-NEXT:    pcmpgtd %xmm3, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE2-NEXT:    pand %xmm4, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    por %xmm0, %xmm1
+; SSE2-NEXT:    movq %xmm1, %rcx
+; SSE2-NEXT:    movq %xmm2, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_slt_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    movq %r9, %xmm0
+; SSE41-NEXT:    movq %rdx, %xmm3
+; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967]
+; SSE41-NEXT:    pxor %xmm4, %xmm2
+; SSE41-NEXT:    pxor %xmm4, %xmm1
+; SSE41-NEXT:    movdqa %xmm1, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm1, %xmm2
+; SSE41-NEXT:    movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
+; SSE41-NEXT:    movq %rax, %xmm1
+; SSE41-NEXT:    pxor %xmm1, %xmm3
+; SSE41-NEXT:    pxor %xmm1, %xmm0
+; SSE41-NEXT:    movdqa %xmm0, %xmm1
+; SSE41-NEXT:    pcmpgtd %xmm3, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE41-NEXT:    pand %xmm4, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    por %xmm0, %xmm1
+; SSE41-NEXT:    movq %xmm1, %rcx
+; SSE41-NEXT:    movq %xmm2, %rax
+; SSE41-NEXT:    pextrq $1, %xmm2, %rdx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp slt <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+
+
+define i64 @cmp_ult_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_ult_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    addq %rdi, %rsi
+; CHECK-NEXT:    sbbq %rax, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp ult i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_ult_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_ult_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    addq $42, %rdi
+; CHECK-NEXT:    sbbq %rax, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp ult i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_ult_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_ult_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    movq %r9, %xmm0
+; SSE2-NEXT:    movq %rdx, %xmm3
+; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159]
+; SSE2-NEXT:    pxor %xmm4, %xmm2
+; SSE2-NEXT:    pxor %xmm4, %xmm1
+; SSE2-NEXT:    movdqa %xmm1, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm1, %xmm2
+; SSE2-NEXT:    movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF
+; SSE2-NEXT:    movq %rax, %xmm1
+; SSE2-NEXT:    pxor %xmm1, %xmm3
+; SSE2-NEXT:    pxor %xmm1, %xmm0
+; SSE2-NEXT:    movdqa %xmm0, %xmm1
+; SSE2-NEXT:    pcmpgtd %xmm3, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE2-NEXT:    pand %xmm4, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    por %xmm0, %xmm1
+; SSE2-NEXT:    movq %xmm1, %rcx
+; SSE2-NEXT:    movq %xmm2, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_ult_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    movq %r9, %xmm0
+; SSE41-NEXT:    movq %rdx, %xmm3
+; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159]
+; SSE41-NEXT:    pxor %xmm4, %xmm2
+; SSE41-NEXT:    pxor %xmm4, %xmm1
+; SSE41-NEXT:    movdqa %xmm1, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm1, %xmm2
+; SSE41-NEXT:    movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF
+; SSE41-NEXT:    movq %rax, %xmm1
+; SSE41-NEXT:    pxor %xmm1, %xmm3
+; SSE41-NEXT:    pxor %xmm1, %xmm0
+; SSE41-NEXT:    movdqa %xmm0, %xmm1
+; SSE41-NEXT:    pcmpgtd %xmm3, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE41-NEXT:    pand %xmm4, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    por %xmm0, %xmm1
+; SSE41-NEXT:    movq %xmm1, %rcx
+; SSE41-NEXT:    movq %xmm2, %rax
+; SSE41-NEXT:    pextrq $1, %xmm2, %rdx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp ult <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+
+define i64 @cmp_ule_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_ule_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rdi, %rsi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp ule i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_ule_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_ule_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $43, %rdi
+; CHECK-NEXT:    sbbq %rax, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp ule i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_ule_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_ule_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    movq %rdx, %xmm0
+; SSE2-NEXT:    movq %r9, %xmm3
+; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159]
+; SSE2-NEXT:    pxor %xmm4, %xmm2
+; SSE2-NEXT:    pxor %xmm4, %xmm1
+; SSE2-NEXT:    movdqa %xmm1, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm1, %xmm2
+; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
+; SSE2-NEXT:    pxor %xmm1, %xmm2
+; SSE2-NEXT:    movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF
+; SSE2-NEXT:    movq %rax, %xmm4
+; SSE2-NEXT:    pxor %xmm4, %xmm3
+; SSE2-NEXT:    pxor %xmm4, %xmm0
+; SSE2-NEXT:    movdqa %xmm0, %xmm4
+; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
+; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE2-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE2-NEXT:    pand %xmm5, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
+; SSE2-NEXT:    por %xmm0, %xmm3
+; SSE2-NEXT:    pxor %xmm1, %xmm3
+; SSE2-NEXT:    movq %xmm3, %rcx
+; SSE2-NEXT:    movq %xmm2, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_ule_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    movq %rdx, %xmm0
+; SSE41-NEXT:    movq %r9, %xmm3
+; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159]
+; SSE41-NEXT:    pxor %xmm4, %xmm2
+; SSE41-NEXT:    pxor %xmm4, %xmm1
+; SSE41-NEXT:    movdqa %xmm1, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm2, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm2, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm1
+; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm1, %xmm2
+; SSE41-NEXT:    pcmpeqd %xmm1, %xmm1
+; SSE41-NEXT:    pxor %xmm1, %xmm2
+; SSE41-NEXT:    movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF
+; SSE41-NEXT:    movq %rax, %xmm4
+; SSE41-NEXT:    pxor %xmm4, %xmm3
+; SSE41-NEXT:    pxor %xmm4, %xmm0
+; SSE41-NEXT:    movdqa %xmm0, %xmm4
+; SSE41-NEXT:    pcmpgtd %xmm3, %xmm4
+; SSE41-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
+; SSE41-NEXT:    pcmpeqd %xmm3, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; SSE41-NEXT:    pand %xmm5, %xmm0
+; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
+; SSE41-NEXT:    por %xmm0, %xmm3
+; SSE41-NEXT:    pxor %xmm1, %xmm3
+; SSE41-NEXT:    movq %xmm3, %rcx
+; SSE41-NEXT:    movq %xmm2, %rax
+; SSE41-NEXT:    pextrq $1, %xmm2, %rdx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp ule <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+
+define i64 @cmp_eq_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_eq_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp eq i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_eq_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_eq_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $-43, %rdi
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp eq i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_eq_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_eq_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    pcmpeqd %xmm1, %xmm2
+; SSE2-NEXT:    movq %r9, %xmm0
+; SSE2-NEXT:    movq %rdx, %xmm1
+; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,0,3,2]
+; SSE2-NEXT:    pand %xmm2, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,0,3,2]
+; SSE2-NEXT:    pand %xmm1, %xmm2
+; SSE2-NEXT:    movq %xmm0, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    movq %xmm2, %rcx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_eq_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    pcmpeqq %xmm1, %xmm2
+; SSE41-NEXT:    movq %r9, %xmm0
+; SSE41-NEXT:    movq %rdx, %xmm1
+; SSE41-NEXT:    pcmpeqq %xmm0, %xmm1
+; SSE41-NEXT:    movq %xmm2, %rax
+; SSE41-NEXT:    pextrq $1, %xmm2, %rdx
+; SSE41-NEXT:    movq %xmm1, %rcx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp eq <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+define i64 @cmp_ne_not(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_ne_not:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setne %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp ne i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_ne_not_with_constant(i64 %a) {
+; CHECK-LABEL: cmp_ne_not_with_constant:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $-43, %rdi
+; CHECK-NEXT:    setne %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp ne i64 %na, 42
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <3 x i64> @cmp_ne_not_with_vec(<3 x i64> %a, <3 x i64> %b) {
+; SSE2-LABEL: cmp_ne_not_with_vec:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq %r8, %xmm0
+; SSE2-NEXT:    movq %rcx, %xmm1
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE2-NEXT:    movq %rsi, %xmm0
+; SSE2-NEXT:    movq %rdi, %xmm2
+; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE2-NEXT:    pcmpeqd %xmm1, %xmm2
+; SSE2-NEXT:    movq %r9, %xmm0
+; SSE2-NEXT:    movq %rdx, %xmm1
+; SSE2-NEXT:    pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,0,3,2]
+; SSE2-NEXT:    pand %xmm2, %xmm0
+; SSE2-NEXT:    pcmpeqd %xmm2, %xmm2
+; SSE2-NEXT:    pxor %xmm2, %xmm0
+; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2]
+; SSE2-NEXT:    pand %xmm1, %xmm3
+; SSE2-NEXT:    pxor %xmm2, %xmm3
+; SSE2-NEXT:    movq %xmm0, %rax
+; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; SSE2-NEXT:    movq %xmm0, %rdx
+; SSE2-NEXT:    movq %xmm3, %rcx
+; SSE2-NEXT:    retq
+;
+; SSE41-LABEL: cmp_ne_not_with_vec:
+; SSE41:       # %bb.0:
+; SSE41-NEXT:    movq %r8, %xmm0
+; SSE41-NEXT:    movq %rcx, %xmm1
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
+; SSE41-NEXT:    movq %rsi, %xmm0
+; SSE41-NEXT:    movq %rdi, %xmm2
+; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
+; SSE41-NEXT:    pcmpeqq %xmm1, %xmm2
+; SSE41-NEXT:    movq %r9, %xmm0
+; SSE41-NEXT:    movq %rdx, %xmm1
+; SSE41-NEXT:    pcmpeqq %xmm0, %xmm1
+; SSE41-NEXT:    pcmpeqd %xmm0, %xmm0
+; SSE41-NEXT:    pxor %xmm2, %xmm0
+; SSE41-NEXT:    movq %xmm0, %rax
+; SSE41-NEXT:    pextrq $1, %xmm0, %rdx
+; SSE41-NEXT:    movq %xmm1, %rcx
+; SSE41-NEXT:    notq %rcx
+; SSE41-NEXT:    retq
+  %na = xor <3 x i64> %a, <i64 -1, i64 -1, i64 -1>
+  %nb = xor <3 x i64> %b, <i64 -1, i64 -1, i64 -1>
+  %c = icmp ne <3 x i64> %na, %nb
+  %r = sext <3 x i1> %c to <3 x i64>
+  ret <3 x i64> %r
+}
+
+define i64 @cmp_uge_not_commute(i64 %b, i64 %a) {
+; CHECK-LABEL: cmp_uge_not_commute:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rdi, %rsi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp uge i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define i64 @cmp_ult_not_with_constant_commute(i64 %a) {
+; CHECK-LABEL: cmp_ult_not_with_constant_commute:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $43, %rdi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %c = icmp ult i64 42, %a
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <2 x i64> @cmp_uge_not_with_vec2xi64(<2 x i64> %a, <2 x i64> %b) {
+; CHECK-LABEL: cmp_uge_not_with_vec2xi64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159]
+; CHECK-NEXT:    pxor %xmm2, %xmm0
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    movdqa %xmm1, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm0, %xmm2
+; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
+; CHECK-NEXT:    pand %xmm3, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
+; CHECK-NEXT:    por %xmm0, %xmm1
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT:    pxor %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %na = xor <2 x i64> %a, <i64 -1, i64 -1>
+  %nb = xor <2 x i64> %b, <i64 -1, i64 -1>
+  %c = icmp uge <2 x i64> %na, %nb
+  %r = sext <2 x i1> %c to <2 x i64>
+  ret <2 x i64> %r
+}