Precommit test for #61120

[junaire]

Summary

Signed-off-by: Jun Zhang <[e-mail]>

[junaire]

Add more tests

[RKSimon]

Please can you add remaining icmp predicates - I think we still need sge/uge/eq/ne?

llvm/test/CodeGen/X86/setcc-combine.ll

503

maybe rename these to @cmp_not_????? to better explain the test

584

Please can you add at least one test with the constant on the LHS, to check that existing canonicalization will commute it.

640

<2 x i64> are interesting due to the weak support pre-SSE4 but it'd be good have some other vector types as well

[junaire]

1. Rename tests.
2. Add more preds tests
3. Use <3 x i64> for vector tests but also keep one for <2 x i64>
4. Add commute tests

[RKSimon]

The <3 x i64> is interesting - but I meant other legal SSE vector types likes <16 x i8> / <8 x i16> / <4 x i32>

[junaire]

Use legal SSE types <4 x i32>

[RKSimon]

LGTM - cheers

[junaire]

Close it in https://reviews.llvm.org/rG1c420cd4e31f68fedca83b4d3a857a5519f4ce03

llvm/test/CodeGen/X86/setcc-combine.ll

 ; CHECK-NEXT:    andnpd %xmm1, %xmm2
 ; CHECK-NEXT:    orpd %xmm2, %xmm0
 ; CHECK-NEXT:    retq
   %neg = fneg double %x
   %cmp = fcmp ogt double %x, 1.0
   %r = select i1 %cmp, double %x, double %neg
   ret double %r
 }
+
+define i64 @cmp_sgt(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_sgt:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setg %al
+; CHECK-NEXT:    negq %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp sgt i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <2 x i64> @cmp_sgt_vec(<2 x i64> %a, <2 x i64> %b) {
+; CHECK-LABEL: cmp_sgt_vec:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [18446744071562067967,18446744071562067967]
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    pxor %xmm2, %xmm0
+; CHECK-NEXT:    movdqa %xmm0, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm1, %xmm2
+; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
+; CHECK-NEXT:    pcmpeqd %xmm1, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; CHECK-NEXT:    pand %xmm3, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
+; CHECK-NEXT:    por %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %na = xor <2 x i64> %a, <i64 -1, i64 -1>
+  %nb = xor <2 x i64> %b, <i64 -1, i64 -1>
+  %c = icmp sgt <2 x i64> %na, %nb
+  %r = sext <2 x i1> %c to <2 x i64>
+  ret <2 x i64> %r
+}
+
+define i64 @cmp_ule(i64 %a, i64 %b) {
+; CHECK-LABEL: cmp_ule:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    notq %rdi
+; CHECK-NEXT:    notq %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq %rdi, %rsi
+; CHECK-NEXT:    adcq $-1, %rax
+; CHECK-NEXT:    retq
+  %na = xor i64 %a, -1
+  %nb = xor i64 %b, -1
+  %c = icmp ule i64 %na, %nb
+  %r = sext i1 %c to i64
+  ret i64 %r
+}
+
+define <2 x i64> @cmp_ule_vec(<2 x i64> %a, <2 x i64> %b) {
+; CHECK-LABEL: cmp_ule_vec:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159]
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    pxor %xmm2, %xmm0
+; CHECK-NEXT:    movdqa %xmm0, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm1, %xmm2
+; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
+; CHECK-NEXT:    pcmpeqd %xmm1, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; CHECK-NEXT:    pand %xmm3, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
+; CHECK-NEXT:    por %xmm0, %xmm1
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT:    pxor %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %na = xor <2 x i64> %a, <i64 -1, i64 -1>
+  %nb = xor <2 x i64> %b, <i64 -1, i64 -1>
+  %c = icmp ule <2 x i64> %na, %nb
+  %r = sext <2 x i1> %c to <2 x i64>
+  ret <2 x i64> %r
+}