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[RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative
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Authored by HsiangKai on Dec 22 2022, 7:28 PM.

Details

Summary

Follow-up patch of D140530.

We can add FMIN, FMAX to isAssociativeAndCommutative to
increase instruction-level parallelism by the existing MachineCombiner
pass.

Diff Detail

Event Timeline

HsiangKai created this revision.Dec 22 2022, 7:28 PM
HsiangKai requested review of this revision.Dec 22 2022, 7:28 PM
craig.topper added inline comments.Dec 22 2022, 8:51 PM
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
1367

I don't think FMIN/FMAX require Reassoc or FmNsz

No need to check RmReassoc and FmNsz for fmin/fmax.

asi-sc added inline comments.Dec 23 2022, 2:24 AM
llvm/test/CodeGen/RISCV/machine-combiner.ll
743

I believe we can remove nsz and reassoc flags here as well.

HsiangKai added inline comments.Dec 25 2022, 6:34 PM
llvm/test/CodeGen/RISCV/machine-combiner.ll
743

Thank you. I copied the test cases and forgot to remove them.

HsiangKai updated this revision to Diff 485262.Dec 25 2022, 7:06 PM

Remove unnecessary fast-math flags in the test cases.

This revision is now accepted and ready to land.Dec 25 2022, 10:52 PM
This revision was landed with ongoing or failed builds.Dec 29 2022, 3:59 AM
This revision was automatically updated to reflect the committed changes.