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[AArch64][SVE][CodeGen] Prefer ld1r* over indexed-load when consumed by a splat
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Authored by peterwaller-arm on Dec 12 2022, 8:31 AM.

Details

Summary

If a load is consumed by a single splat, don't consider indexed loads.

This is an alternative implementation to D138581.

Depends on D139637.

Diff Detail

Event Timeline

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peterwaller-arm requested review of this revision.Dec 12 2022, 8:31 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 12 2022, 8:31 AM
  • Update a test name (an old one crept in)
Matt added a subscriber: Matt.Dec 12 2022, 12:31 PM
sdesmalen added inline comments.Dec 16 2022, 3:28 AM
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
21545

nit: unnecessary curly braces

llvm/test/CodeGen/AArch64/sve-ld1r.ll
1223

What happens if the passthrough value is something else than undef? That would require a predicated mov to implement the merging, do we still want to use the pre/post increment in that case?

Address review comments:

  • Remove superflous braces.
  • Prefer indexed operations in the presence of a non-undef passthrough to a dup.
peterwaller-arm marked 2 inline comments as done.
  • Fix test naming.
  • Also cover the zero passthru case.
llvm/test/CodeGen/AArch64/sve-ld1r.ll
1223

Thanks, this case is now covered by preindex_load_dup_passthru.

sdesmalen accepted this revision.Dec 21 2022, 6:20 AM
This revision is now accepted and ready to land.Dec 21 2022, 6:20 AM