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MattDevereau (Matt Devereau)
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User Since
Aug 6 2021, 8:13 AM (10 w, 2 d)

Recent Activity

Tue, Oct 12

MattDevereau updated the diff for D111638: [AArch64][SVE] Combine predicated FMUL/FADD into FMA.

ran clang-format

Tue, Oct 12, 6:40 AM · Restricted Project
MattDevereau requested review of D111638: [AArch64][SVE] Combine predicated FMUL/FADD into FMA.
Tue, Oct 12, 6:25 AM · Restricted Project

Tue, Oct 5

MattDevereau closed D111145: [AArch64][SVE] Propagate math flags from intrinsics to instructions.

2ac199993764e068494a69a85af098c0ae1ff37e

Tue, Oct 5, 7:40 AM · Restricted Project
MattDevereau committed rG2ac199993764: [AArch64][SVE] Propagate math flags from intrinsics to instructions (authored by MattDevereau).
[AArch64][SVE] Propagate math flags from intrinsics to instructions
Tue, Oct 5, 7:39 AM
MattDevereau added inline comments to D111145: [AArch64][SVE] Propagate math flags from intrinsics to instructions.
Tue, Oct 5, 6:44 AM · Restricted Project
MattDevereau requested review of D111145: [AArch64][SVE] Propagate math flags from intrinsics to instructions.
Tue, Oct 5, 6:23 AM · Restricted Project

Fri, Oct 1

MattDevereau closed D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

Closed in commit f085a9db8b8d408d08adcba8e283e637a0116622

Fri, Oct 1, 3:29 AM · Restricted Project
MattDevereau committed rGf085a9db8b8d: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR… (authored by MattDevereau).
[AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR…
Fri, Oct 1, 3:26 AM

Thu, Sep 30

MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

renamed no_replace_on_non_ptrue to no_replace_on_non_ptrue_all

Thu, Sep 30, 10:38 AM · Restricted Project
MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

added test no_replace_on_non_ptrue to assert only ptrue_all is replaced

Thu, Sep 30, 10:37 AM · Restricted Project

Sep 17 2021

MattDevereau closed D109891: Add O3 flag to VLS and VLA test-suite flags.

closed in commit 3ddb899dea13cab48f1c79587f9eb5ec836b5459

Sep 17 2021, 3:04 AM · Restricted Project
MattDevereau updated the summary of D109891: Add O3 flag to VLS and VLA test-suite flags.
Sep 17 2021, 3:02 AM · Restricted Project
MattDevereau added a comment to D109891: Add O3 flag to VLS and VLA test-suite flags.

@maxim-kuvyrkov I've expanded the commit message a bit.

Sep 17 2021, 2:56 AM · Restricted Project
MattDevereau committed rZORG3ddb899dea13: Add O3 flag to VLS and VLA configs (authored by MattDevereau).
Add O3 flag to VLS and VLA configs
Sep 17 2021, 2:49 AM

Sep 16 2021

MattDevereau requested review of D109891: Add O3 flag to VLS and VLA test-suite flags.
Sep 16 2021, 8:33 AM · Restricted Project
MattDevereau retitled D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops from [AArch64][SVE] Replace fmul and fadd LLVM IR instrinsics with fmul and fadd to [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.
Sep 16 2021, 7:56 AM · Restricted Project
MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

Added fsub case and tests. Rearranged instCombineSVEVectorBinOp logic

Sep 16 2021, 7:09 AM · Restricted Project

Sep 13 2021

MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

updated for clang-format and clang-tidy

Sep 13 2021, 3:39 AM · Restricted Project

Sep 10 2021

MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

Make instCombineSVEVectorBinOp more succinct

Sep 10 2021, 5:43 AM · Restricted Project

Sep 8 2021

MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

Added test, removed Intrinsic::aarch64_sve_from_svbool case

Sep 8 2021, 6:17 AM · Restricted Project

Sep 7 2021

MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

Added ptrue check

Sep 7 2021, 3:51 AM · Restricted Project

Sep 3 2021

MattDevereau updated the diff for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.

Created new method instCombineSVEVectorBinOp and narrowed the intrinsic conditional replacement to svp_true_xx/Intrinsic::aarch64_sve_convert_from_svbool

Sep 3 2021, 3:40 AM · Restricted Project

Sep 2 2021

MattDevereau added a reviewer for D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops: georges.
Sep 2 2021, 4:26 AM · Restricted Project
MattDevereau requested review of D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops.
Sep 2 2021, 4:24 AM · Restricted Project

Aug 26 2021

MattDevereau committed rG9b830c798ebf: [AArch64][SVE] Teach cost model masked gathers/scatters are cheap (authored by MattDevereau).
[AArch64][SVE] Teach cost model masked gathers/scatters are cheap
Aug 26 2021, 3:19 AM

Aug 25 2021

MattDevereau updated the diff for D108558: [AArch64][SVE] Teach cost model masked gathers/scatters are cheap.

Moved new tests into mem-op-cost-model.ll

Aug 25 2021, 8:48 AM · Restricted Project
MattDevereau added a comment to D108558: [AArch64][SVE] Teach cost model masked gathers/scatters are cheap.

Hi @MattDevereau, given we already have tests in Analysis/CostModel/AArch64/mem-op-cost-model.ll is it necessary to sve-gather-vls.ll and sve-scatter-vls.ll tests? I was thinking you could just add those to mem-op-cost-model.ll instead.

Aug 25 2021, 8:07 AM · Restricted Project

Aug 24 2021

MattDevereau updated the diff for D108558: [AArch64][SVE] Teach cost model masked gathers/scatters are cheap.

[AArch64][SVE] Teach cost model masked SVE VLS gathers/scatters are cheap

Aug 24 2021, 5:58 AM · Restricted Project

Aug 23 2021

MattDevereau requested review of D108558: [AArch64][SVE] Teach cost model masked gathers/scatters are cheap.
Aug 23 2021, 7:39 AM · Restricted Project

Aug 19 2021

MattDevereau committed rG734708e04f84: [AArch64][SVE] Teach cost model that masked loads/stores are cheap (authored by MattDevereau).
[AArch64][SVE] Teach cost model that masked loads/stores are cheap
Aug 19 2021, 5:03 AM

Aug 18 2021

MattDevereau updated the diff for D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.

renamed fixed-sve-vl to fixed_sve_vl, use useNeonVector() function instead of verbose if statement

Aug 18 2021, 2:58 AM · Restricted Project

Aug 16 2021

MattDevereau updated the diff for D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.

Removed -mattr=sve from RUN lines in regression test

Aug 16 2021, 5:35 AM · Restricted Project
MattDevereau updated the diff for D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.

Removed i1 vector from regression test, added some LLVM IR syntax cleanup to regression test

Aug 16 2021, 5:30 AM · Restricted Project

Aug 10 2021

MattDevereau updated the diff for D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.

Changed the cost model by keeping the scalarised NEON costs for 128bit width vectors, but use the SVE costs for larger VLS sizes. Added a new regression test to assert the cost-model estimates depending on VLS width

Aug 10 2021, 5:29 AM · Restricted Project

Aug 6 2021

MattDevereau added inline comments to D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.
Aug 6 2021, 9:09 AM · Restricted Project
MattDevereau updated the diff for D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.

updated the diff to show more context

Aug 6 2021, 8:35 AM · Restricted Project
MattDevereau requested review of D107651: [AArch64][SVE] Teach cost model that masked loads/stores are cheap.
Aug 6 2021, 8:19 AM · Restricted Project