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[RISCV] Precommit testcase to show wrong result of make-compressible optimization
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Authored by kito-cheng on Jun 29 2022, 10:17 PM.

Details

Summary

Use following example to demo what happened now:

li      a1, 1
sd      a1, 800(a0)
sd      a0, 808(a0) # Store base address into base + offset
li      a1, 2
sd      a1, 816(a0)

Current will optimizate into:

li      a1, 1
addi    a2, a0, 768
sd      a1, 32(a2)
sd      a2, 40(a2) # Wrong replacement for the source register.
li      a1, 2
sd      a1, 48(a2)

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