Contributors:
Jay Foad <jay.foad@amd.com>
Dmitry Preobrazhensky <d-pre@mail.ru>
Patch 10/N for upstreaming of AMDGPU gfx11 architecture.
Depends on D125822
Details
Details
- Reviewers
foad dp arsenm - Group Reviewers
Restricted Project - Commits
- rG1a51ab766f47: [AMDGPU] gfx11 export instructions
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
| llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | ||
|---|---|---|
| 643–644 | Why not remove them then? I guess that would just move the handling from MI->MC from the pseudo | |
| llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | ||
|---|---|---|
| 643–644 | Probably just because I didn't know how to implement that. Is there a good place to do stuff like this when lowering from MI to MC? | |
| llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | ||
|---|---|---|
| 643–644 | It seems like there are 3 options: different pseudos between subtargets, handle this in MI->MC (I don't know if there are any examples of this?), and in the asm/disasm (quite common in AMDGPU). So is there anything to do here? | |
| llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | ||
|---|---|---|
| 643–644 | This looks as a small and acceptable hack to me. Other alternatives would require more changes without significant benefits. | |
Comment Actions
LGTM. I believe the issue with unused MCInst fields may be fixed by a separate patch (if this is really necessary).