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Differential D117131

[RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be experimental
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Authored by asb on Jan 12 2022, 10:44 AM.

Details

Reviewers
craig.topper
luismarques
Commits
rG33d008b169f3: [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be…
Summary

Agreed policy is that RISC-V extensions that have not yet been ratified should be marked as experimental, and enabling them requires the use of the -menable-experimental-extensions flag when using clang alongside the version number. These extensions have now been ratified, so this is no longer necessary, and the target feature names can be renamed to no longer be prefixed with "experimental-".

Diff Detail

Event Timeline

asb created this revision.Jan 12 2022, 10:44 AM
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence and 27 others. · View Herald TranscriptJan 12 2022, 10:44 AM
asb requested review of this revision.Jan 12 2022, 10:44 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptJan 12 2022, 10:44 AM
Herald added subscribers: cfe-commits, MaskRay. · View Herald Transcript
asb mentioned this in D117130: [RISCV] Move Zba/Zbb/Zbc/Zbs out of experimental since they have been ratified..Jan 12 2022, 10:50 AM
craig.topper accepted this revision.Jan 12 2022, 11:02 AM

LGTM

This revision is now accepted and ready to land.Jan 12 2022, 11:02 AM
This revision was landed with ongoing or failed builds.Jan 12 2022, 11:34 AM
Closed by commit rG33d008b169f3: [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be… (authored by asb). · Explain Why
This revision was automatically updated to reflect the committed changes.
asb added a commit: rG33d008b169f3: [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be….
Harbormaster completed remote builds in B142958: Diff 399381.Jan 12 2022, 11:50 AM

Revision Contents

PathSize
clang/
include/
clang/
Basic/
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test/
CodeGen/
RISCV/
rvb-intrinsics/
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Driver/
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Preprocessor/
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llvm/
lib/
Support/
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Target/
RISCV/
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test/
CodeGen/
RISCV/
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rvv/
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MC/
RISCV/
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Transforms/
ConstantHoisting/
RISCV/
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LoopIdiom/
RISCV/
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Diff 399398

clang/include/clang/Basic/BuiltinsRISCV.def

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// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#if defined(BUILTIN) && !defined(TARGET_BUILTIN) #if defined(BUILTIN) && !defined(TARGET_BUILTIN)
# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) # define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS)
#endif #endif
// Zbb extension // Zbb extension
TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "experimental-zbb") TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "zbb")
TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb,64bit") TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "zbb,64bit")
// Zbc extension // Zbc extension
TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "experimental-zbc") TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "zbc")
TARGET_BUILTIN(__builtin_riscv_clmulh, "LiLiLi", "nc", "experimental-zbc") TARGET_BUILTIN(__builtin_riscv_clmulh, "LiLiLi", "nc", "zbc")
TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "experimental-zbc") TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "zbc")
// Zbe extension // Zbe extension
TARGET_BUILTIN(__builtin_riscv_bcompress_32, "ZiZiZi", "nc", "experimental-zbe") TARGET_BUILTIN(__builtin_riscv_bcompress_32, "ZiZiZi", "nc", "experimental-zbe")
TARGET_BUILTIN(__builtin_riscv_bcompress_64, "WiWiWi", "nc", TARGET_BUILTIN(__builtin_riscv_bcompress_64, "WiWiWi", "nc",
"experimental-zbe,64bit") "experimental-zbe,64bit")
TARGET_BUILTIN(__builtin_riscv_bdecompress_32, "ZiZiZi", "nc", TARGET_BUILTIN(__builtin_riscv_bdecompress_32, "ZiZiZi", "nc",
"experimental-zbe") "experimental-zbe")
TARGET_BUILTIN(__builtin_riscv_bdecompress_64, "WiWiWi", "nc", TARGET_BUILTIN(__builtin_riscv_bdecompress_64, "WiWiWi", "nc",
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clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbb -verify %s -o - // RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -verify %s -o -
int orc_b_64(int a) { int orc_b_64(int a) {
return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires 'RV64' extension support to be enabled}} return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires 'RV64' extension support to be enabled}}
} }

clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbb -emit-llvm %s -o - \ // RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=RV32ZBB // RUN: | FileCheck %s -check-prefix=RV32ZBB
// RV32ZBB-LABEL: @orc_b_32( // RV32ZBB-LABEL: @orc_b_32(
// RV32ZBB-NEXT: entry: // RV32ZBB-NEXT: entry:
// RV32ZBB-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // RV32ZBB-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// RV32ZBB-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4 // RV32ZBB-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
// RV32ZBB-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 // RV32ZBB-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
// RV32ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[TMP0]]) // RV32ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[TMP0]])
// RV32ZBB-NEXT: ret i32 [[TMP1]] // RV32ZBB-NEXT: ret i32 [[TMP1]]
// //
int orc_b_32(int a) { int orc_b_32(int a) {
return __builtin_riscv_orc_b_32(a); return __builtin_riscv_orc_b_32(a);
} }

clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbc.c

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbc -emit-llvm %s -o - \ // RUN: %clang_cc1 -triple riscv32 -target-feature +zbc -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=RV32ZBC // RUN: | FileCheck %s -check-prefix=RV32ZBC
// RV32ZBC-LABEL: @clmul( // RV32ZBC-LABEL: @clmul(
// RV32ZBC-NEXT: entry: // RV32ZBC-NEXT: entry:
// RV32ZBC-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // RV32ZBC-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// RV32ZBC-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 // RV32ZBC-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// RV32ZBC-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4 // RV32ZBC-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
// RV32ZBC-NEXT: store i32 [[B:%.*]], i32* [[B_ADDR]], align 4 // RV32ZBC-NEXT: store i32 [[B:%.*]], i32* [[B_ADDR]], align 4
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clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zbb -emit-llvm %s -o - \ // RUN: %clang_cc1 -triple riscv64 -target-feature +zbb -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=RV64ZBB // RUN: | FileCheck %s -check-prefix=RV64ZBB
// RV64ZBB-LABEL: @orc_b_32( // RV64ZBB-LABEL: @orc_b_32(
// RV64ZBB-NEXT: entry: // RV64ZBB-NEXT: entry:
// RV64ZBB-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // RV64ZBB-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// RV64ZBB-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4 // RV64ZBB-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
// RV64ZBB-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 // RV64ZBB-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
// RV64ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[TMP0]]) // RV64ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[TMP0]])
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clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbc.c

// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zbc -emit-llvm %s -o - \ // RUN: %clang_cc1 -triple riscv64 -target-feature +zbc -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=RV64ZBC // RUN: | FileCheck %s -check-prefix=RV64ZBC
// RV64ZBC-LABEL: @clmul( // RV64ZBC-LABEL: @clmul(
// RV64ZBC-NEXT: entry: // RV64ZBC-NEXT: entry:
// RV64ZBC-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 // RV64ZBC-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// RV64ZBC-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 // RV64ZBC-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
// RV64ZBC-NEXT: store i64 [[A:%.*]], i64* [[A_ADDR]], align 8 // RV64ZBC-NEXT: store i64 [[A:%.*]], i64* [[A_ADDR]], align 8
// RV64ZBC-NEXT: store i64 [[B:%.*]], i64* [[B_ADDR]], align 8 // RV64ZBC-NEXT: store i64 [[B:%.*]], i64* [[B_ADDR]], align 8
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clang/test/Driver/riscv-arch.c

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// RV32-TARGET: "-triple" "riscv32-unknown-unknown-elf" // RV32-TARGET: "-triple" "riscv32-unknown-unknown-elf"
// RUN: %clang -target riscv32-unknown-elf -march=rv64i -### %s \ // RUN: %clang -target riscv32-unknown-elf -march=rv64i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64i -### %s \ // RUN: %clang -target riscv64-unknown-elf -march=rv64i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s
// RV64-TARGET: "-triple" "riscv64-unknown-unknown-elf" // RV64-TARGET: "-triple" "riscv64-unknown-unknown-elf"
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBB %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb -### %s \ // RUN: %clang -target riscv32-unknown-elf -march=rv32izbb -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-NOFLAG %s // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBB %s
// RV32-EXPERIMENTAL-ZBB-NOFLAG: error: invalid arch name 'rv32izbb' // RV32-ZBB: "-target-feature" "+zbb"
// RV32-EXPERIMENTAL-ZBB-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0 -menable-experimental-extensions -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB %s
// RV32-EXPERIMENTAL-ZBB: "-target-feature" "+experimental-zbb"
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0_zbp0p93 -menable-experimental-extensions -### %s \ // RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0_zbp0p93 -menable-experimental-extensions -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP %s // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP %s
// RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbb" // RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+zbb"
// RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbp" // RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbp"
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0zbp0p93 -menable-experimental-extensions -### %s \ // RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0zbp0p93 -menable-experimental-extensions -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE %s // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE %s
// RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE: error: invalid arch name 'rv32izbb1p0zbp0p93', unsupported version number 0.93 for extension 'zbb1p0zbp' // RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE: error: invalid arch name 'rv32izbb1p0zbp0p93', unsupported version number 0.93 for extension 'zbb1p0zbp'
// RUN: %clang -target riscv32-unknown-elf -march=rv32izba1p0 -menable-experimental-extensions -### %s \ // RUN: %clang -target riscv32-unknown-elf -march=rv32izba1p0 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBA %s // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBA %s
// RV32-EXPERIMENTAL-ZBA: "-target-feature" "+experimental-zba" // RUN: %clang -target riscv32-unknown-elf -march=rv32izba -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBA %s
// RV32-ZBA: "-target-feature" "+zba"
// RUN: %clang -target riscv32-unknown-elf -march=rv32iv -### %s -c 2>&1 | \ // RUN: %clang -target riscv32-unknown-elf -march=rv32iv -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOFLAG %s // RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOFLAG %s
// RV32-EXPERIMENTAL-V-NOFLAG: error: invalid arch name 'rv32iv' // RV32-EXPERIMENTAL-V-NOFLAG: error: invalid arch name 'rv32iv'
// RV32-EXPERIMENTAL-V-NOFLAG: requires '-menable-experimental-extensions' // RV32-EXPERIMENTAL-V-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32iv -menable-experimental-extensions -### %s -c 2>&1 | \ // RUN: %clang -target riscv32-unknown-elf -march=rv32iv -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOVERS %s // RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOVERS %s
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clang/test/Preprocessor/riscv-target-features.c

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// RUN: %clang -target riscv32-unknown-linux-gnu -march=rv32ic -x c -E -dM %s \ // RUN: %clang -target riscv32-unknown-linux-gnu -march=rv32ic -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-C-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-C-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -march=rv64ic -x c -E -dM %s \ // RUN: %clang -target riscv64-unknown-linux-gnu -march=rv64ic -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-C-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-C-EXT %s
// CHECK-C-EXT: __riscv_c 2000000 // CHECK-C-EXT: __riscv_c 2000000
// CHECK-C-EXT: __riscv_compressed 1 // CHECK-C-EXT: __riscv_compressed 1
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izba1p0 -x c -E -dM %s \ // RUN: -march=rv32izba1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izba -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izba1p0 -x c -E -dM %s \ // RUN: -march=rv64izba1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izba -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
// CHECK-ZBA-NOT: __riscv_b // CHECK-ZBA-NOT: __riscv_b
// CHECK-ZBA-EXT: __riscv_zba 1000000{{$}} // CHECK-ZBA-EXT: __riscv_zba 1000000{{$}}
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izbb1p0 -x c -E -dM %s \ // RUN: -march=rv32izbb1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izbb -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izbb1p0 -x c -E -dM %s \ // RUN: -march=rv64izbb1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izbb -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
// CHECK-ZBB-NOT: __riscv_b // CHECK-ZBB-NOT: __riscv_b
// CHECK-ZBB-EXT: __riscv_zbb 1000000{{$}} // CHECK-ZBB-EXT: __riscv_zbb 1000000{{$}}
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izbc1p0 -x c -E -dM %s \ // RUN: -march=rv32izbc1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izbc -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izbc1p0 -x c -E -dM %s \ // RUN: -march=rv64izbc1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izbc -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
// CHECK-ZBC-NOT: __riscv_b // CHECK-ZBC-NOT: __riscv_b
// CHECK-ZBC-EXT: __riscv_zbc 1000000{{$}} // CHECK-ZBC-EXT: __riscv_zbc 1000000{{$}}
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv32izbe0p93 -x c -E -dM %s \ // RUN: -march=rv32izbe0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBE-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBE-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv64izbe0p93 -x c -E -dM %s \ // RUN: -march=rv64izbe0p93 -x c -E -dM %s \
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// RUN: -march=rv32izbr0p93 -x c -E -dM %s \ // RUN: -march=rv32izbr0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBR-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBR-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv64izbr0p93 -x c -E -dM %s \ // RUN: -march=rv64izbr0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBR-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBR-EXT %s
// CHECK-ZBR-NOT: __riscv_b // CHECK-ZBR-NOT: __riscv_b
// CHECK-ZBR-EXT: __riscv_zbr 93000 // CHECK-ZBR-EXT: __riscv_zbr 93000
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izbs1p0 -x c -E -dM %s \ // RUN: -march=rv32izbs1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu \
// RUN: -march=rv32izbs -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izbs1p0 -x c -E -dM %s \ // RUN: -march=rv64izbs1p0 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu \
// RUN: -march=rv64izbs -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
// CHECK-ZBS-NOT: __riscv_b // CHECK-ZBS-NOT: __riscv_b
// CHECK-ZBS-EXT: __riscv_zbs 1000000{{$}} // CHECK-ZBS-EXT: __riscv_zbs 1000000{{$}}
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv32izbt0p93 -x c -E -dM %s \ // RUN: -march=rv32izbt0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBT-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBT-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv64izbt0p93 -x c -E -dM %s \ // RUN: -march=rv64izbt0p93 -x c -E -dM %s \
Show All 27 Lines

llvm/lib/Support/RISCVISAInfo.cpp

Show All 40 Lines
static const RISCVSupportedExtension SupportedExtensions[] = { static const RISCVSupportedExtension SupportedExtensions[] = {
{"i", RISCVExtensionVersion{2, 0}}, {"i", RISCVExtensionVersion{2, 0}},
{"e", RISCVExtensionVersion{1, 9}}, {"e", RISCVExtensionVersion{1, 9}},
{"m", RISCVExtensionVersion{2, 0}}, {"m", RISCVExtensionVersion{2, 0}},
{"a", RISCVExtensionVersion{2, 0}}, {"a", RISCVExtensionVersion{2, 0}},
{"f", RISCVExtensionVersion{2, 0}}, {"f", RISCVExtensionVersion{2, 0}},
{"d", RISCVExtensionVersion{2, 0}}, {"d", RISCVExtensionVersion{2, 0}},
{"c", RISCVExtensionVersion{2, 0}}, {"c", RISCVExtensionVersion{2, 0}},
};
static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
{"v", RISCVExtensionVersion{0, 10}},
{"zba", RISCVExtensionVersion{1, 0}}, {"zba", RISCVExtensionVersion{1, 0}},
{"zbb", RISCVExtensionVersion{1, 0}}, {"zbb", RISCVExtensionVersion{1, 0}},
{"zbc", RISCVExtensionVersion{1, 0}}, {"zbc", RISCVExtensionVersion{1, 0}},
{"zbs", RISCVExtensionVersion{1, 0}},
};
static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
{"v", RISCVExtensionVersion{0, 10}},
{"zbe", RISCVExtensionVersion{0, 93}}, {"zbe", RISCVExtensionVersion{0, 93}},
{"zbf", RISCVExtensionVersion{0, 93}}, {"zbf", RISCVExtensionVersion{0, 93}},
{"zbm", RISCVExtensionVersion{0, 93}}, {"zbm", RISCVExtensionVersion{0, 93}},
{"zbp", RISCVExtensionVersion{0, 93}}, {"zbp", RISCVExtensionVersion{0, 93}},
{"zbr", RISCVExtensionVersion{0, 93}}, {"zbr", RISCVExtensionVersion{0, 93}},
{"zbs", RISCVExtensionVersion{1, 0}},
{"zbt", RISCVExtensionVersion{0, 93}}, {"zbt", RISCVExtensionVersion{0, 93}},
{"zvlsseg", RISCVExtensionVersion{0, 10}}, {"zvlsseg", RISCVExtensionVersion{0, 10}},
{"zfhmin", RISCVExtensionVersion{0, 1}}, {"zfhmin", RISCVExtensionVersion{0, 1}},
{"zfh", RISCVExtensionVersion{0, 1}}, {"zfh", RISCVExtensionVersion{0, 1}},
}; };
▲ Show 20 Lines • Show All 690 Lines • Show Last 20 Lines

llvm/lib/Target/RISCV/RISCV.td

Show First 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
def FeatureStdExtC def FeatureStdExtC
: SubtargetFeature<"c", "HasStdExtC", "true", : SubtargetFeature<"c", "HasStdExtC", "true",
"'C' (Compressed Instructions)">; "'C' (Compressed Instructions)">;
def HasStdExtC : Predicate<"Subtarget->hasStdExtC()">, def HasStdExtC : Predicate<"Subtarget->hasStdExtC()">,
AssemblerPredicate<(all_of FeatureStdExtC), AssemblerPredicate<(all_of FeatureStdExtC),
"'C' (Compressed Instructions)">; "'C' (Compressed Instructions)">;
def FeatureStdExtZba def FeatureStdExtZba
: SubtargetFeature<"experimental-zba", "HasStdExtZba", "true", : SubtargetFeature<"zba", "HasStdExtZba", "true",
"'Zba' (Address calculation 'B' Instructions)">; "'Zba' (Address calculation 'B' Instructions)">;
def HasStdExtZba : Predicate<"Subtarget->hasStdExtZba()">, def HasStdExtZba : Predicate<"Subtarget->hasStdExtZba()">,
AssemblerPredicate<(all_of FeatureStdExtZba), AssemblerPredicate<(all_of FeatureStdExtZba),
"'Zba' (Address calculation 'B' Instructions)">; "'Zba' (Address calculation 'B' Instructions)">;
def NotHasStdExtZba : Predicate<"!Subtarget->hasStdExtZba()">; def NotHasStdExtZba : Predicate<"!Subtarget->hasStdExtZba()">;
def FeatureStdExtZbb def FeatureStdExtZbb
: SubtargetFeature<"experimental-zbb", "HasStdExtZbb", "true", : SubtargetFeature<"zbb", "HasStdExtZbb", "true",
"'Zbb' (Base 'B' Instructions)">; "'Zbb' (Base 'B' Instructions)">;
def HasStdExtZbb : Predicate<"Subtarget->hasStdExtZbb()">, def HasStdExtZbb : Predicate<"Subtarget->hasStdExtZbb()">,
AssemblerPredicate<(all_of FeatureStdExtZbb), AssemblerPredicate<(all_of FeatureStdExtZbb),
"'Zbb' (Base 'B' Instructions)">; "'Zbb' (Base 'B' Instructions)">;
def FeatureStdExtZbc def FeatureStdExtZbc
: SubtargetFeature<"experimental-zbc", "HasStdExtZbc", "true", : SubtargetFeature<"zbc", "HasStdExtZbc", "true",
"'Zbc' (Carry-Less 'B' Instructions)">; "'Zbc' (Carry-Less 'B' Instructions)">;
def HasStdExtZbc : Predicate<"Subtarget->hasStdExtZbc()">, def HasStdExtZbc : Predicate<"Subtarget->hasStdExtZbc()">,
AssemblerPredicate<(all_of FeatureStdExtZbc), AssemblerPredicate<(all_of FeatureStdExtZbc),
"'Zbc' (Carry-Less 'B' Instructions)">; "'Zbc' (Carry-Less 'B' Instructions)">;
def FeatureStdExtZbe def FeatureStdExtZbe
: SubtargetFeature<"experimental-zbe", "HasStdExtZbe", "true", : SubtargetFeature<"experimental-zbe", "HasStdExtZbe", "true",
"'Zbe' (Extract-Deposit 'B' Instructions)">; "'Zbe' (Extract-Deposit 'B' Instructions)">;
Show All 25 Lines
def FeatureStdExtZbr def FeatureStdExtZbr
: SubtargetFeature<"experimental-zbr", "HasStdExtZbr", "true", : SubtargetFeature<"experimental-zbr", "HasStdExtZbr", "true",
"'Zbr' (Polynomial Reduction 'B' Instructions)">; "'Zbr' (Polynomial Reduction 'B' Instructions)">;
def HasStdExtZbr : Predicate<"Subtarget->hasStdExtZbr()">, def HasStdExtZbr : Predicate<"Subtarget->hasStdExtZbr()">,
AssemblerPredicate<(all_of FeatureStdExtZbr), AssemblerPredicate<(all_of FeatureStdExtZbr),
"'Zbr' (Polynomial Reduction 'B' Instructions)">; "'Zbr' (Polynomial Reduction 'B' Instructions)">;
def FeatureStdExtZbs def FeatureStdExtZbs
: SubtargetFeature<"experimental-zbs", "HasStdExtZbs", "true", : SubtargetFeature<"zbs", "HasStdExtZbs", "true",
"'Zbs' (Single-Bit 'B' Instructions)">; "'Zbs' (Single-Bit 'B' Instructions)">;
def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">, def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">,
AssemblerPredicate<(all_of FeatureStdExtZbs), AssemblerPredicate<(all_of FeatureStdExtZbs),
"'Zbs' (Single-Bit 'B' Instructions)">; "'Zbs' (Single-Bit 'B' Instructions)">;
def FeatureStdExtZbt def FeatureStdExtZbt
: SubtargetFeature<"experimental-zbt", "HasStdExtZbt", "true", : SubtargetFeature<"experimental-zbt", "HasStdExtZbt", "true",
"'Zbt' (Ternary 'B' Instructions)">; "'Zbt' (Ternary 'B' Instructions)">;
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llvm/lib/Target/RISCV/RISCVInstrInfoZb.td

Show All 12 Lines
// Zbc - 1.0 // Zbc - 1.0
// Zbs - 1.0 // Zbs - 1.0
// Zbe - 0.93 // Zbe - 0.93
// Zbf - 0.93 // Zbf - 0.93
// Zbm - 0.93 // Zbm - 0.93
// Zbp - 0.93 // Zbp - 0.93
// Zbr - 0.93 // Zbr - 0.93
// Zbt - 0.93 // Zbt - 0.93
// This version is still experimental as the Bitmanip extensions haven't been //
// ratified yet. // Zba, Zbb, Zbc, and Zbs have been ratified and are considered stable. The
// other extensions are experimental as they have not yet been ratiied and are
// subject to change.
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Operand and SDNode transformation definitions. // Operand and SDNode transformation definitions.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def riscv_clzw : SDNode<"RISCVISD::CLZW", SDT_RISCVIntUnaryOpW>; def riscv_clzw : SDNode<"RISCVISD::CLZW", SDT_RISCVIntUnaryOpW>;
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llvm/test/CodeGen/RISCV/addimm-mulimm.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
;; Test that (mul (add x, c1), c2) can be transformed to ;; Test that (mul (add x, c1), c2) can be transformed to
;; (add (mul x, c2), c1*c2) if profitable. ;; (add (mul x, c2), c1*c2) if profitable.
; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV32IMB %s ; RUN: | FileCheck -check-prefix=RV32IMB %s
; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV64IMB %s ; RUN: | FileCheck -check-prefix=RV64IMB %s
define i32 @add_mul_combine_accept_a1(i32 %x) { define i32 @add_mul_combine_accept_a1(i32 %x) {
; RV32IMB-LABEL: add_mul_combine_accept_a1: ; RV32IMB-LABEL: add_mul_combine_accept_a1:
; RV32IMB: # %bb.0: ; RV32IMB: # %bb.0:
; RV32IMB-NEXT: li a1, 29 ; RV32IMB-NEXT: li a1, 29
; RV32IMB-NEXT: mul a0, a0, a1 ; RV32IMB-NEXT: mul a0, a0, a1
; RV32IMB-NEXT: addi a0, a0, 1073 ; RV32IMB-NEXT: addi a0, a0, 1073
▲ Show 20 Lines • Show All 859 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/attributes.ll

;; Generate ELF attributes from llc. ;; Generate ELF attributes from llc.
; RUN: llc -mtriple=riscv32 -mattr=+m %s -o - | FileCheck --check-prefix=RV32M %s ; RUN: llc -mtriple=riscv32 -mattr=+m %s -o - | FileCheck --check-prefix=RV32M %s
; RUN: llc -mtriple=riscv32 -mattr=+a %s -o - | FileCheck --check-prefix=RV32A %s ; RUN: llc -mtriple=riscv32 -mattr=+a %s -o - | FileCheck --check-prefix=RV32A %s
; RUN: llc -mtriple=riscv32 -mattr=+f %s -o - | FileCheck --check-prefix=RV32F %s ; RUN: llc -mtriple=riscv32 -mattr=+f %s -o - | FileCheck --check-prefix=RV32F %s
; RUN: llc -mtriple=riscv32 -mattr=+d %s -o - | FileCheck --check-prefix=RV32D %s ; RUN: llc -mtriple=riscv32 -mattr=+d %s -o - | FileCheck --check-prefix=RV32D %s
; RUN: llc -mtriple=riscv32 -mattr=+c %s -o - | FileCheck --check-prefix=RV32C %s ; RUN: llc -mtriple=riscv32 -mattr=+c %s -o - | FileCheck --check-prefix=RV32C %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV32ZFHMIN %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV32ZFHMIN %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV32ZFH %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV32ZFH %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zba %s -o - | FileCheck --check-prefix=RV32ZBA %s ; RUN: llc -mtriple=riscv32 -mattr=+zba %s -o - | FileCheck --check-prefix=RV32ZBA %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb %s -o - | FileCheck --check-prefix=RV32ZBB %s ; RUN: llc -mtriple=riscv32 -mattr=+zbb %s -o - | FileCheck --check-prefix=RV32ZBB %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbc %s -o - | FileCheck --check-prefix=RV32ZBC %s ; RUN: llc -mtriple=riscv32 -mattr=+zbc %s -o - | FileCheck --check-prefix=RV32ZBC %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV32ZBE %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV32ZBE %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV32ZBF %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV32ZBF %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV32ZBM %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV32ZBM %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV32ZBP %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV32ZBP %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV32ZBR %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV32ZBR %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s ; RUN: llc -mtriple=riscv32 -mattr=+zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV32ZBT %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV32ZBT %s
; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefix=RV64M %s ; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefix=RV64M %s
; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefix=RV64A %s ; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefix=RV64A %s
; RUN: llc -mtriple=riscv64 -mattr=+f %s -o - | FileCheck --check-prefix=RV64F %s ; RUN: llc -mtriple=riscv64 -mattr=+f %s -o - | FileCheck --check-prefix=RV64F %s
; RUN: llc -mtriple=riscv64 -mattr=+d %s -o - | FileCheck --check-prefix=RV64D %s ; RUN: llc -mtriple=riscv64 -mattr=+d %s -o - | FileCheck --check-prefix=RV64D %s
; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefix=RV64C %s ; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefix=RV64C %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV64ZFHMIN %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV64ZFHMIN %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV64ZFH %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV64ZFH %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zba %s -o - | FileCheck --check-prefix=RV64ZBA %s ; RUN: llc -mtriple=riscv64 -mattr=+zba %s -o - | FileCheck --check-prefix=RV64ZBA %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb %s -o - | FileCheck --check-prefix=RV64ZBB %s ; RUN: llc -mtriple=riscv64 -mattr=+zbb %s -o - | FileCheck --check-prefix=RV64ZBB %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbc %s -o - | FileCheck --check-prefix=RV64ZBC %s ; RUN: llc -mtriple=riscv64 -mattr=+zbc %s -o - | FileCheck --check-prefix=RV64ZBC %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV64ZBE %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV64ZBE %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV64ZBF %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV64ZBF %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV64ZBM %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV64ZBM %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV64ZBP %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV64ZBP %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV64ZBR %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV64ZBR %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s ; RUN: llc -mtriple=riscv64 -mattr=+zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV64ZBT %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV64ZBT %s
; RV32M: .attribute 5, "rv32i2p0_m2p0" ; RV32M: .attribute 5, "rv32i2p0_m2p0"
; RV32A: .attribute 5, "rv32i2p0_a2p0" ; RV32A: .attribute 5, "rv32i2p0_a2p0"
; RV32F: .attribute 5, "rv32i2p0_f2p0" ; RV32F: .attribute 5, "rv32i2p0_f2p0"
; RV32D: .attribute 5, "rv32i2p0_f2p0_d2p0" ; RV32D: .attribute 5, "rv32i2p0_f2p0_d2p0"
; RV32C: .attribute 5, "rv32i2p0_c2p0" ; RV32C: .attribute 5, "rv32i2p0_c2p0"
; RV32V: .attribute 5, "rv32i2p0_v0p10_zvlsseg0p10" ; RV32V: .attribute 5, "rv32i2p0_v0p10_zvlsseg0p10"
Show All 39 Lines

llvm/test/CodeGen/RISCV/div-by-constant.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=RV32,RV32IM %s ; RUN: | FileCheck -check-prefixes=RV32,RV32IM %s
; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-zba,+experimental-zbb \ ; RUN: llc -mtriple=riscv32 -mattr=+m,+zba,+zbb \
; RUN: -verify-machineinstrs < %s \ ; RUN: -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=RV32,RV32IMZB %s ; RUN: | FileCheck -check-prefixes=RV32,RV32IMZB %s
; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=RV64,RV64IM %s ; RUN: | FileCheck -check-prefixes=RV64,RV64IM %s
; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-zba,+experimental-zbb \ ; RUN: llc -mtriple=riscv64 -mattr=+m,+zba,+zbb \
; RUN: -verify-machineinstrs < %s \ ; RUN: -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=RV64,RV64IMZB %s ; RUN: | FileCheck -check-prefixes=RV64,RV64IMZB %s
; Test that there is a single shift after the mul and no addition. ; Test that there is a single shift after the mul and no addition.
define i32 @udiv_constant_no_add(i32 %a) nounwind { define i32 @udiv_constant_no_add(i32 %a) nounwind {
; RV32-LABEL: udiv_constant_no_add: ; RV32-LABEL: udiv_constant_no_add:
; RV32: # %bb.0: ; RV32: # %bb.0:
; RV32-NEXT: lui a1, 838861 ; RV32-NEXT: lui a1, 838861
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llvm/test/CodeGen/RISCV/imm.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I ; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I ; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+experimental-zba \ ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zba \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBA ; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBA
; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+experimental-zbb \ ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbb \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBB ; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBB
; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+experimental-zbs \ ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbs \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBS ; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBS
; Materializing constants ; Materializing constants
; TODO: It would be preferable if anyext constant returns were sign rather ; TODO: It would be preferable if anyext constant returns were sign rather
; than zero extended. See PR39092. For now, mark returns as explicitly signext ; than zero extended. See PR39092. For now, mark returns as explicitly signext
; (this matches what Clang would generate for equivalent C/C++ anyway). ; (this matches what Clang would generate for equivalent C/C++ anyway).
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llvm/test/CodeGen/RISCV/rv32zba.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I ; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBA ; RUN: | FileCheck %s -check-prefix=RV32ZBA
define signext i16 @sh1add(i64 %0, i16* %1) { define signext i16 @sh1add(i64 %0, i16* %1) {
; RV32I-LABEL: sh1add: ; RV32I-LABEL: sh1add:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: slli a0, a0, 1 ; RV32I-NEXT: slli a0, a0, 1
; RV32I-NEXT: add a0, a2, a0 ; RV32I-NEXT: add a0, a2, a0
; RV32I-NEXT: lh a0, 0(a0) ; RV32I-NEXT: lh a0, 0(a0)
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llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBB ; RUN: | FileCheck %s -check-prefix=RV32ZBB
declare i32 @llvm.riscv.orc.b.i32(i32) declare i32 @llvm.riscv.orc.b.i32(i32)
define i32 @orcb(i32 %a) nounwind { define i32 @orcb(i32 %a) nounwind {
; RV32ZBB-LABEL: orcb: ; RV32ZBB-LABEL: orcb:
; RV32ZBB: # %bb.0: ; RV32ZBB: # %bb.0:
; RV32ZBB-NEXT: orc.b a0, a0 ; RV32ZBB-NEXT: orc.b a0, a0
; RV32ZBB-NEXT: ret ; RV32ZBB-NEXT: ret
%tmp = call i32 @llvm.riscv.orc.b.i32(i32 %a) %tmp = call i32 @llvm.riscv.orc.b.i32(i32 %a)
ret i32 %tmp ret i32 %tmp
} }

llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I ; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBB ; RUN: | FileCheck %s -check-prefix=RV32ZBB
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBP ; RUN: | FileCheck %s -check-prefix=RV32ZBP
define i32 @andn_i32(i32 %a, i32 %b) nounwind { define i32 @andn_i32(i32 %a, i32 %b) nounwind {
; RV32I-LABEL: andn_i32: ; RV32I-LABEL: andn_i32:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: not a1, a1 ; RV32I-NEXT: not a1, a1
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llvm/test/CodeGen/RISCV/rv32zbb.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I ; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBB ; RUN: | FileCheck %s -check-prefix=RV32ZBB
declare i32 @llvm.ctlz.i32(i32, i1) declare i32 @llvm.ctlz.i32(i32, i1)
define i32 @ctlz_i32(i32 %a) nounwind { define i32 @ctlz_i32(i32 %a) nounwind {
; RV32I-LABEL: ctlz_i32: ; RV32I-LABEL: ctlz_i32:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: beqz a0, .LBB0_2 ; RV32I-NEXT: beqz a0, .LBB0_2
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llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbc -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+zbc -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBC ; RUN: | FileCheck %s -check-prefix=RV32ZBC
declare i32 @llvm.riscv.clmul.i32(i32 %a, i32 %b) declare i32 @llvm.riscv.clmul.i32(i32 %a, i32 %b)
define i32 @clmul32(i32 %a, i32 %b) nounwind { define i32 @clmul32(i32 %a, i32 %b) nounwind {
; RV32ZBC-LABEL: clmul32: ; RV32ZBC-LABEL: clmul32:
; RV32ZBC: # %bb.0: ; RV32ZBC: # %bb.0:
; RV32ZBC-NEXT: clmul a0, a0, a1 ; RV32ZBC-NEXT: clmul a0, a0, a1
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llvm/test/CodeGen/RISCV/rv32zbs.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32I ; RUN: | FileCheck %s -check-prefix=RV32I
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+zbs -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32ZBS ; RUN: | FileCheck %s -check-prefix=RV32ZBS
define i32 @bclr_i32(i32 %a, i32 %b) nounwind { define i32 @bclr_i32(i32 %a, i32 %b) nounwind {
; RV32I-LABEL: bclr_i32: ; RV32I-LABEL: bclr_i32:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: li a2, 1 ; RV32I-NEXT: li a2, 1
; RV32I-NEXT: sll a1, a2, a1 ; RV32I-NEXT: sll a1, a2, a1
; RV32I-NEXT: not a1, a1 ; RV32I-NEXT: not a1, a1
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llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefixes=RV64,RV64I ; RUN: | FileCheck %s -check-prefixes=RV64,RV64I
; RUN: llc -mtriple=riscv64 -verify-machineinstrs -mattr=+experimental-zba < %s \ ; RUN: llc -mtriple=riscv64 -verify-machineinstrs -mattr=+zba < %s \
; RUN: | FileCheck %s -check-prefixes=RV64,RV64ZBA ; RUN: | FileCheck %s -check-prefixes=RV64,RV64ZBA
; The patterns for the 'W' suffixed RV64I instructions have the potential of ; The patterns for the 'W' suffixed RV64I instructions have the potential of
; missing cases. This file checks all the variants of ; missing cases. This file checks all the variants of
; sign-extended/zero-extended/any-extended inputs and outputs. ; sign-extended/zero-extended/any-extended inputs and outputs.
; The 64-bit add instruction can safely be used when the result is anyext. ; The 64-bit add instruction can safely be used when the result is anyext.
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llvm/test/CodeGen/RISCV/rv64zba.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I ; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBA ; RUN: | FileCheck %s -check-prefix=RV64ZBA
define i64 @slliuw(i64 %a) nounwind { define i64 @slliuw(i64 %a) nounwind {
; RV64I-LABEL: slliuw: ; RV64I-LABEL: slliuw:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: slli a0, a0, 32 ; RV64I-NEXT: slli a0, a0, 32
; RV64I-NEXT: srli a0, a0, 31 ; RV64I-NEXT: srli a0, a0, 31
; RV64I-NEXT: ret ; RV64I-NEXT: ret
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llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBB ; RUN: | FileCheck %s -check-prefix=RV64ZBB
declare i32 @llvm.riscv.orc.b.i32(i32) declare i32 @llvm.riscv.orc.b.i32(i32)
define signext i32 @orcb32(i32 signext %a) nounwind { define signext i32 @orcb32(i32 signext %a) nounwind {
; RV64ZBB-LABEL: orcb32: ; RV64ZBB-LABEL: orcb32:
; RV64ZBB: # %bb.0: ; RV64ZBB: # %bb.0:
; RV64ZBB-NEXT: orc.b a0, a0 ; RV64ZBB-NEXT: orc.b a0, a0
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llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I ; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBB ; RUN: | FileCheck %s -check-prefix=RV64ZBB
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBP ; RUN: | FileCheck %s -check-prefix=RV64ZBP
define signext i32 @andn_i32(i32 signext %a, i32 signext %b) nounwind { define signext i32 @andn_i32(i32 signext %a, i32 signext %b) nounwind {
; RV64I-LABEL: andn_i32: ; RV64I-LABEL: andn_i32:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: not a1, a1 ; RV64I-NEXT: not a1, a1
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llvm/test/CodeGen/RISCV/rv64zbb.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I ; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBB ; RUN: | FileCheck %s -check-prefix=RV64ZBB
declare i32 @llvm.ctlz.i32(i32, i1) declare i32 @llvm.ctlz.i32(i32, i1)
define signext i32 @ctlz_i32(i32 signext %a) nounwind { define signext i32 @ctlz_i32(i32 signext %a) nounwind {
; RV64I-LABEL: ctlz_i32: ; RV64I-LABEL: ctlz_i32:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: beqz a0, .LBB0_2 ; RV64I-NEXT: beqz a0, .LBB0_2
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llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbc -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+zbc -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBC ; RUN: | FileCheck %s -check-prefix=RV64ZBC
declare i64 @llvm.riscv.clmul.i64(i64 %a, i64 %b) declare i64 @llvm.riscv.clmul.i64(i64 %a, i64 %b)
define i64 @clmul64(i64 %a, i64 %b) nounwind { define i64 @clmul64(i64 %a, i64 %b) nounwind {
; RV64ZBC-LABEL: clmul64: ; RV64ZBC-LABEL: clmul64:
; RV64ZBC: # %bb.0: ; RV64ZBC: # %bb.0:
; RV64ZBC-NEXT: clmul a0, a0, a1 ; RV64ZBC-NEXT: clmul a0, a0, a1
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llvm/test/CodeGen/RISCV/rv64zbs.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I ; RUN: | FileCheck %s -check-prefix=RV64I
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbs -verify-machineinstrs < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+zbs -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64ZBS ; RUN: | FileCheck %s -check-prefix=RV64ZBS
define signext i32 @bclr_i32(i32 signext %a, i32 signext %b) nounwind { define signext i32 @bclr_i32(i32 signext %a, i32 signext %b) nounwind {
; RV64I-LABEL: bclr_i32: ; RV64I-LABEL: bclr_i32:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: li a2, 1 ; RV64I-NEXT: li a2, 1
; RV64I-NEXT: sllw a1, a2, a1 ; RV64I-NEXT: sllw a1, a2, a1
; RV64I-NEXT: not a1, a1 ; RV64I-NEXT: not a1, a1
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv64 -mattr=+experimental-zbb,+experimental-v \ ; RUN: llc < %s -mtriple=riscv64 -mattr=+zbb,+experimental-v \
; RUN: -riscv-v-vector-bits-min=128 | FileCheck %s ; RUN: -riscv-v-vector-bits-min=128 | FileCheck %s
; This test loads to values and stores them in reversed order. This previously ; This test loads to values and stores them in reversed order. This previously
; asserted because part of DAGCombiner::tryStoreMerge thinks we can use an i64 ; asserted because part of DAGCombiner::tryStoreMerge thinks we can use an i64
; rotate, but the loads aren't sufficiently aligned. So then it tried to use ; rotate, but the loads aren't sufficiently aligned. So then it tried to use
; a vector type, but that can't handle the swapped case. ; a vector type, but that can't handle the swapped case.
@foo = global [2 x i32] zeroinitializer, align 4 @foo = global [2 x i32] zeroinitializer, align 4
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llvm/test/CodeGen/RISCV/sadd_sat.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
declare i4 @llvm.sadd.sat.i4(i4, i4) declare i4 @llvm.sadd.sat.i4(i4, i4)
declare i8 @llvm.sadd.sat.i8(i8, i8) declare i8 @llvm.sadd.sat.i8(i8, i8)
declare i16 @llvm.sadd.sat.i16(i16, i16) declare i16 @llvm.sadd.sat.i16(i16, i16)
declare i32 @llvm.sadd.sat.i32(i32, i32) declare i32 @llvm.sadd.sat.i32(i32, i32)
declare i64 @llvm.sadd.sat.i64(i64, i64) declare i64 @llvm.sadd.sat.i64(i64, i64)
define signext i32 @func(i32 signext %x, i32 signext %y) nounwind { define signext i32 @func(i32 signext %x, i32 signext %y) nounwind {
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llvm/test/CodeGen/RISCV/sadd_sat_plus.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
declare i4 @llvm.sadd.sat.i4(i4, i4) declare i4 @llvm.sadd.sat.i4(i4, i4)
declare i8 @llvm.sadd.sat.i8(i8, i8) declare i8 @llvm.sadd.sat.i8(i8, i8)
declare i16 @llvm.sadd.sat.i16(i16, i16) declare i16 @llvm.sadd.sat.i16(i16, i16)
declare i32 @llvm.sadd.sat.i32(i32, i32) declare i32 @llvm.sadd.sat.i32(i32, i32)
declare i64 @llvm.sadd.sat.i64(i64, i64) declare i64 @llvm.sadd.sat.i64(i64, i64)
define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind { define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
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llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 \ ; RUN: llc < %s -mtriple=riscv32 \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32I ; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32I
; RUN: llc < %s -mtriple=riscv64 \ ; RUN: llc < %s -mtriple=riscv64 \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64I ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+experimental-zbb \ ; RUN: llc < %s -mtriple=riscv32 -mattr=+zbb \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB ; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB
; RUN: llc < %s -mtriple=riscv64 -mattr=+experimental-zbb \ ; RUN: llc < %s -mtriple=riscv64 -mattr=+zbb \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB
; Compare if negative and select of constants where one constant is zero. ; Compare if negative and select of constants where one constant is zero.
define i32 @neg_sel_constants(i32 signext %a) { define i32 @neg_sel_constants(i32 signext %a) {
; RV32-LABEL: neg_sel_constants: ; RV32-LABEL: neg_sel_constants:
; RV32: # %bb.0: ; RV32: # %bb.0:
; RV32-NEXT: srai a0, a0, 31 ; RV32-NEXT: srai a0, a0, 31
; RV32-NEXT: andi a0, a0, 5 ; RV32-NEXT: andi a0, a0, 5
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llvm/test/CodeGen/RISCV/sextw-removal.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f \ ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV64I ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+f \ ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+f \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV64ZBB ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64ZBB
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+f \ ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+f \
; RUN: -riscv-disable-sextw-removal | FileCheck %s --check-prefix=NOREMOVAL ; RUN: -riscv-disable-sextw-removal | FileCheck %s --check-prefix=NOREMOVAL
define void @test1(i32 signext %arg, i32 signext %arg1) nounwind { define void @test1(i32 signext %arg, i32 signext %arg1) nounwind {
; CHECK-LABEL: test1: ; CHECK-LABEL: test1:
; CHECK: # %bb.0: # %bb ; CHECK: # %bb.0: # %bb
; CHECK-NEXT: addi sp, sp, -32 ; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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llvm/test/CodeGen/RISCV/ssub_sat.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
declare i4 @llvm.ssub.sat.i4(i4, i4) declare i4 @llvm.ssub.sat.i4(i4, i4)
declare i8 @llvm.ssub.sat.i8(i8, i8) declare i8 @llvm.ssub.sat.i8(i8, i8)
declare i16 @llvm.ssub.sat.i16(i16, i16) declare i16 @llvm.ssub.sat.i16(i16, i16)
declare i32 @llvm.ssub.sat.i32(i32, i32) declare i32 @llvm.ssub.sat.i32(i32, i32)
declare i64 @llvm.ssub.sat.i64(i64, i64) declare i64 @llvm.ssub.sat.i64(i64, i64)
define signext i32 @func(i32 signext %x, i32 signext %y) nounwind { define signext i32 @func(i32 signext %x, i32 signext %y) nounwind {
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llvm/test/CodeGen/RISCV/ssub_sat_plus.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
declare i4 @llvm.ssub.sat.i4(i4, i4) declare i4 @llvm.ssub.sat.i4(i4, i4)
declare i8 @llvm.ssub.sat.i8(i8, i8) declare i8 @llvm.ssub.sat.i8(i8, i8)
declare i16 @llvm.ssub.sat.i16(i16, i16) declare i16 @llvm.ssub.sat.i16(i16, i16)
declare i32 @llvm.ssub.sat.i32(i32, i32) declare i32 @llvm.ssub.sat.i32(i32, i32)
declare i64 @llvm.ssub.sat.i64(i64, i64) declare i64 @llvm.ssub.sat.i64(i64, i64)
define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind { define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
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llvm/test/CodeGen/RISCV/uadd_sat.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
declare i4 @llvm.uadd.sat.i4(i4, i4) declare i4 @llvm.uadd.sat.i4(i4, i4)
declare i8 @llvm.uadd.sat.i8(i8, i8) declare i8 @llvm.uadd.sat.i8(i8, i8)
declare i16 @llvm.uadd.sat.i16(i16, i16) declare i16 @llvm.uadd.sat.i16(i16, i16)
declare i32 @llvm.uadd.sat.i32(i32, i32) declare i32 @llvm.uadd.sat.i32(i32, i32)
declare i64 @llvm.uadd.sat.i64(i64, i64) declare i64 @llvm.uadd.sat.i64(i64, i64)
define signext i32 @func(i32 signext %x, i32 signext %y) nounwind { define signext i32 @func(i32 signext %x, i32 signext %y) nounwind {
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llvm/test/CodeGen/RISCV/uadd_sat_plus.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
declare i4 @llvm.uadd.sat.i4(i4, i4) declare i4 @llvm.uadd.sat.i4(i4, i4)
declare i8 @llvm.uadd.sat.i8(i8, i8) declare i8 @llvm.uadd.sat.i8(i8, i8)
declare i16 @llvm.uadd.sat.i16(i16, i16) declare i16 @llvm.uadd.sat.i16(i16, i16)
declare i32 @llvm.uadd.sat.i32(i32, i32) declare i32 @llvm.uadd.sat.i32(i32, i32)
declare i64 @llvm.uadd.sat.i64(i64, i64) declare i64 @llvm.uadd.sat.i64(i64, i64)
define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind { define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
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llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 < %s \ ; RUN: llc -mtriple=riscv32 < %s \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32I ; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32I
; RUN: llc -mtriple=riscv64 < %s \ ; RUN: llc -mtriple=riscv64 < %s \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64I ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64I
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb < %s \ ; RUN: llc -mtriple=riscv32 -mattr=+zbb < %s \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB ; RUN: | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb < %s \ ; RUN: llc -mtriple=riscv64 -mattr=+zbb < %s \
; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB ; RUN: | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB
; TODO: Should we convert these to X ^ ((X ^ Y) & M) form when Zbb isn't ; TODO: Should we convert these to X ^ ((X ^ Y) & M) form when Zbb isn't
; present? ; present?
define i8 @out8(i8 %x, i8 %y, i8 %mask) { define i8 @out8(i8 %x, i8 %y, i8 %mask) {
; RV32I-LABEL: out8: ; RV32I-LABEL: out8:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
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llvm/test/CodeGen/RISCV/usub_sat.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
declare i4 @llvm.usub.sat.i4(i4, i4) declare i4 @llvm.usub.sat.i4(i4, i4)
declare i8 @llvm.usub.sat.i8(i8, i8) declare i8 @llvm.usub.sat.i8(i8, i8)
declare i16 @llvm.usub.sat.i16(i16, i16) declare i16 @llvm.usub.sat.i16(i16, i16)
declare i32 @llvm.usub.sat.i32(i32, i32) declare i32 @llvm.usub.sat.i32(i32, i32)
declare i64 @llvm.usub.sat.i64(i64, i64) declare i64 @llvm.usub.sat.i64(i64, i64)
define signext i32 @func(i32 signext %x, i32 signext %y) nounwind { define signext i32 @func(i32 signext %x, i32 signext %y) nounwind {
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llvm/test/CodeGen/RISCV/usub_sat_plus.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
declare i4 @llvm.usub.sat.i4(i4, i4) declare i4 @llvm.usub.sat.i4(i4, i4)
declare i8 @llvm.usub.sat.i8(i8, i8) declare i8 @llvm.usub.sat.i8(i8, i8)
declare i16 @llvm.usub.sat.i16(i16, i16) declare i16 @llvm.usub.sat.i16(i16, i16)
declare i32 @llvm.usub.sat.i32(i32, i32) declare i32 @llvm.usub.sat.i32(i32, i32)
declare i64 @llvm.usub.sat.i64(i64, i64) declare i64 @llvm.usub.sat.i64(i64, i64)
define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind { define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
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llvm/test/CodeGen/RISCV/xaluo.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv32 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV32 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV32
; RUN: llc < %s -mtriple=riscv64 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV64 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV64
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zba -verify-machineinstrs | FileCheck %s --check-prefix=RV32ZBA ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs | FileCheck %s --check-prefix=RV32ZBA
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zba -verify-machineinstrs | FileCheck %s --check-prefix=RV64ZBA ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs | FileCheck %s --check-prefix=RV64ZBA
; ;
; Get the actual value of the overflow bit. ; Get the actual value of the overflow bit.
; ;
define zeroext i1 @saddo1.i32(i32 %v1, i32 %v2, i32* %res) { define zeroext i1 @saddo1.i32(i32 %v1, i32 %v2, i32* %res) {
; RV32-LABEL: saddo1.i32: ; RV32-LABEL: saddo1.i32:
; RV32: # %bb.0: # %entry ; RV32: # %bb.0: # %entry
; RV32-NEXT: add a3, a0, a1 ; RV32-NEXT: add a3, a0, a1
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llvm/test/MC/RISCV/attribute-arch-invalid.s

## Invalid arch string ## Invalid arch string
# RUN: not llvm-mc -triple riscv32 < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv32 < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -triple riscv64 < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv64 < %s 2>&1 | FileCheck %s
## Version strings are required for experimental extensions ## Version strings are required for experimental extensions
.attribute arch, "rv32iv" .attribute arch, "rv32iv"
# CHECK: error: invalid arch name 'rv32iv', experimental extension requires explicit version number `v` # CHECK: error: invalid arch name 'rv32iv', experimental extension requires explicit version number `v`
.attribute arch, "rv32izba"
# CHECK: error: invalid arch name 'rv32izba', experimental extension requires explicit version number `zba`
.attribute arch, "rv32izbb"
# CHECK: error: invalid arch name 'rv32izbb', experimental extension requires explicit version number `zbb`
.attribute arch, "rv32izbc"
# CHECK: error: invalid arch name 'rv32izbc', experimental extension requires explicit version number `zbc`
.attribute arch, "rv32izbe" .attribute arch, "rv32izbe"
# CHECK: error: invalid arch name 'rv32izbe', experimental extension requires explicit version number `zbe` # CHECK: error: invalid arch name 'rv32izbe', experimental extension requires explicit version number `zbe`
.attribute arch, "rv32izbf" .attribute arch, "rv32izbf"
# CHECK: error: invalid arch name 'rv32izbf', experimental extension requires explicit version number `zbf` # CHECK: error: invalid arch name 'rv32izbf', experimental extension requires explicit version number `zbf`
.attribute arch, "rv32izbm" .attribute arch, "rv32izbm"
# CHECK: error: invalid arch name 'rv32izbm', experimental extension requires explicit version number `zbm` # CHECK: error: invalid arch name 'rv32izbm', experimental extension requires explicit version number `zbm`
.attribute arch, "rv32izbp" .attribute arch, "rv32izbp"
# CHECK: error: invalid arch name 'rv32izbp', experimental extension requires explicit version number `zbp` # CHECK: error: invalid arch name 'rv32izbp', experimental extension requires explicit version number `zbp`
.attribute arch, "rv32izbr" .attribute arch, "rv32izbr"
# CHECK: error: invalid arch name 'rv32izbr', experimental extension requires explicit version number `zbr` # CHECK: error: invalid arch name 'rv32izbr', experimental extension requires explicit version number `zbr`
.attribute arch, "rv32izbs"
# CHECK: error: invalid arch name 'rv32izbs', experimental extension requires explicit version number `zbs`
.attribute arch, "rv32izbt" .attribute arch, "rv32izbt"
# CHECK: error: invalid arch name 'rv32izbt', experimental extension requires explicit version number `zbt` # CHECK: error: invalid arch name 'rv32izbt', experimental extension requires explicit version number `zbt`
.attribute arch, "rv32ifzfhmin" .attribute arch, "rv32ifzfhmin"
# CHECK: error: invalid arch name 'rv32ifzfhmin', experimental extension requires explicit version number `zfhmin` # CHECK: error: invalid arch name 'rv32ifzfhmin', experimental extension requires explicit version number `zfhmin`
.attribute arch, "rv32ifzfh" .attribute arch, "rv32ifzfh"
# CHECK: error: invalid arch name 'rv32ifzfh', experimental extension requires explicit version number `zfh` # CHECK: error: invalid arch name 'rv32ifzfh', experimental extension requires explicit version number `zfh`
.attribute arch, "rv32ivzvlsseg" .attribute arch, "rv32ivzvlsseg"
# CHECK: error: invalid arch name 'rv32ivzvlsseg', experimental extension requires explicit version number `v` # CHECK: error: invalid arch name 'rv32ivzvlsseg', experimental extension requires explicit version number `v`

llvm/test/MC/RISCV/rv32zba-invalid.s

# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zba < %s 2>&1 | FileCheck %s
# Too few operands # Too few operands
sh1add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction sh1add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
sh2add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction sh2add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
sh3add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction sh3add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
slli.uw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set slli.uw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sh1add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set sh1add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sh2add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set sh2add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
sh3add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set sh3add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

llvm/test/MC/RISCV/rv32zba-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zba -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zba -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zba -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zba < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zba < %s \
# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \ # RUN: | llvm-objdump --mattr=+zba -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zba < %s \
# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \ # RUN: | llvm-objdump --mattr=+zba -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: sh1add t0, t1, t2 # CHECK-ASM-AND-OBJ: sh1add t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x20] # CHECK-ASM: encoding: [0xb3,0x22,0x73,0x20]
sh1add t0, t1, t2 sh1add t0, t1, t2
# CHECK-ASM-AND-OBJ: sh2add t0, t1, t2 # CHECK-ASM-AND-OBJ: sh2add t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x20] # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x20]
sh2add t0, t1, t2 sh2add t0, t1, t2
# CHECK-ASM-AND-OBJ: sh3add t0, t1, t2 # CHECK-ASM-AND-OBJ: sh3add t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x20] # CHECK-ASM: encoding: [0xb3,0x62,0x73,0x20]
sh3add t0, t1, t2 sh3add t0, t1, t2

llvm/test/MC/RISCV/rv32zbb-aliases-valid.s

# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -riscv-no-aliases \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -riscv-no-aliases \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbb < %s \
# RUN: | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbb - \ # RUN: | llvm-objdump -d -r -M no-aliases --mattr=+zbb - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbb < %s \
# RUN: | llvm-objdump -d -r --mattr=+experimental-zbb - \ # RUN: | llvm-objdump -d -r --mattr=+zbb - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# The following check prefixes are used in this test: # The following check prefixes are used in this test:
# CHECK-S-OBJ Match both the .s and objdumped object output with # CHECK-S-OBJ Match both the .s and objdumped object output with
# aliases enabled # aliases enabled
# CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with # CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with
# aliases disabled # aliases disabled
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llvm/test/MC/RISCV/rv32zbb-invalid.s

# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbb < %s 2>&1 | FileCheck %s
# Too many operands # Too many operands
clz t0, t1, t2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction clz t0, t1, t2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
# Too many operands # Too many operands
ctz t0, t1, t2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction ctz t0, t1, t2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
# Too many operands # Too many operands
cpop t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction cpop t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
# Too many operands # Too many operands
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llvm/test/MC/RISCV/rv32zbb-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: clz t0, t1 # CHECK-ASM-AND-OBJ: clz t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x60] # CHECK-ASM: encoding: [0x93,0x12,0x03,0x60]
clz t0, t1 clz t0, t1
# CHECK-ASM-AND-OBJ: ctz t0, t1 # CHECK-ASM-AND-OBJ: ctz t0, t1
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x60] # CHECK-ASM: encoding: [0x93,0x12,0x13,0x60]
ctz t0, t1 ctz t0, t1
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llvm/test/MC/RISCV/rv32zbbp-invalid.s

# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbb,experimental-zbp < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbb,experimental-zbp < %s 2>&1 | FileCheck %s
# Too few operands # Too few operands
andn t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction andn t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
orn t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction orn t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
xnor t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction xnor t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
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llvm/test/MC/RISCV/rv32zbbp-only-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# With Bitmanip permutation extension: # With Bitmanip permutation extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbp -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbp -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbp < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbp < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \ # RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: zext.h t0, t1 # CHECK-ASM-AND-OBJ: zext.h t0, t1
# CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08] # CHECK-ASM: encoding: [0xb3,0x42,0x03,0x08]
zext.h t0, t1 zext.h t0, t1
# CHECK-ASM-AND-OBJ: rev8 t0, t1 # CHECK-ASM-AND-OBJ: rev8 t0, t1
# CHECK-ASM: encoding: [0x93,0x52,0x83,0x69] # CHECK-ASM: encoding: [0x93,0x52,0x83,0x69]
rev8 t0, t1 rev8 t0, t1

llvm/test/MC/RISCV/rv32zbbp-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# With Bitmanip permutation extension: # With Bitmanip permutation extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbp -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbp -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbp -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbp -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbp < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbp < %s \
Show All 30 Lines

llvm/test/MC/RISCV/rv32zbc-invalid.s

# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbc < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbc < %s 2>&1 | FileCheck %s
# Too few operands # Too few operands
clmul t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction clmul t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
clmulr t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction clmulr t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
clmulh t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction clmulh t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction

llvm/test/MC/RISCV/rv32zbc-valid.s

# With Bitmanip carry-less multiply extension: # With Bitmanip carry-less multiply extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbc -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbc -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbc -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbc -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbc < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbc < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbc -d -r - \ # RUN: | llvm-objdump --mattr=+zbc -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbc < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbc < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbc -d -r - \ # RUN: | llvm-objdump --mattr=+zbc -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: clmul t0, t1, t2 # CHECK-ASM-AND-OBJ: clmul t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x0a] # CHECK-ASM: encoding: [0xb3,0x12,0x73,0x0a]
clmul t0, t1, t2 clmul t0, t1, t2
# CHECK-ASM-AND-OBJ: clmulr t0, t1, t2 # CHECK-ASM-AND-OBJ: clmulr t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x0a] # CHECK-ASM: encoding: [0xb3,0x22,0x73,0x0a]
clmulr t0, t1, t2 clmulr t0, t1, t2
# CHECK-ASM-AND-OBJ: clmulh t0, t1, t2 # CHECK-ASM-AND-OBJ: clmulh t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x32,0x73,0x0a] # CHECK-ASM: encoding: [0xb3,0x32,0x73,0x0a]
clmulh t0, t1, t2 clmulh t0, t1, t2

llvm/test/MC/RISCV/rv32zbs-aliases-valid.s

# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbs -riscv-no-aliases \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbs -riscv-no-aliases \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbs \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbs \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbs < %s \ # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbs < %s \
# RUN: | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbs - \ # RUN: | llvm-objdump -d -r -M no-aliases --mattr=+zbs - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbs < %s \ # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbs < %s \
# RUN: | llvm-objdump -d -r --mattr=+experimental-zbs - \ # RUN: | llvm-objdump -d -r --mattr=+zbs - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# The following check prefixes are used in this test: # The following check prefixes are used in this test:
# CHECK-S-OBJ Match both the .s and objdumped object output with # CHECK-S-OBJ Match both the .s and objdumped object output with
# aliases enabled # aliases enabled
# CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with # CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with
# aliases disabled # aliases disabled
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llvm/test/MC/RISCV/rv32zbs-invalid.s

# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbs < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbs < %s 2>&1 | FileCheck %s
# Too few operands # Too few operands
bclr t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction bclr t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
bset t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction bset t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
binv t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction binv t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
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llvm/test/MC/RISCV/rv32zbs-valid.s

# With Bitmanip single bit extension: # With Bitmanip single bit extension:
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbs -show-encoding \ # RUN: llvm-mc %s -triple=riscv32 -mattr=+zbs -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbs -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbs -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbs < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbs < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbs -d -r - \ # RUN: | llvm-objdump --mattr=+zbs -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbs < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbs < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbs -d -r - \ # RUN: | llvm-objdump --mattr=+zbs -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: bclr t0, t1, t2 # CHECK-ASM-AND-OBJ: bclr t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x48] # CHECK-ASM: encoding: [0xb3,0x12,0x73,0x48]
bclr t0, t1, t2 bclr t0, t1, t2
# CHECK-ASM-AND-OBJ: bset t0, t1, t2 # CHECK-ASM-AND-OBJ: bset t0, t1, t2
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x28] # CHECK-ASM: encoding: [0xb3,0x12,0x73,0x28]
bset t0, t1, t2 bset t0, t1, t2
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llvm/test/MC/RISCV/rv64zba-aliases-valid.s

# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -riscv-no-aliases \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zba -riscv-no-aliases \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zba \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zba < %s \ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zba < %s \
# RUN: | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zba - \ # RUN: | llvm-objdump -d -r -M no-aliases --mattr=+zba - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zba < %s \ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zba < %s \
# RUN: | llvm-objdump -d -r --mattr=+experimental-zba - \ # RUN: | llvm-objdump -d -r --mattr=+zba - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# The following check prefixes are used in this test: # The following check prefixes are used in this test:
# CHECK-S-OBJ Match both the .s and objdumped object output with # CHECK-S-OBJ Match both the .s and objdumped object output with
# aliases enabled # aliases enabled
# CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with # CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with
# aliases disabled # aliases disabled
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llvm/test/MC/RISCV/rv64zba-invalid.s

# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,zba < %s 2>&1 | FileCheck %s
# Too few operands # Too few operands
slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Immediate operand out of range # Immediate operand out of range
slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63] slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63] slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
# Too few operands # Too few operands
add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
sh1add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction sh1add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
sh2add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction sh2add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
sh3add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction sh3add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction

llvm/test/MC/RISCV/rv64zba-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zba -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zba < %s \
# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \ # RUN: | llvm-objdump --mattr=+zba -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0 # CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08] # CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
slli.uw t0, t1, 0 slli.uw t0, t1, 0
# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2 # CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08] # CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
add.uw t0, t1, t2 add.uw t0, t1, t2
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llvm/test/MC/RISCV/rv64zbb-aliases-valid.s

# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -riscv-no-aliases \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -riscv-no-aliases \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbb < %s \
# RUN: | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbb - \ # RUN: | llvm-objdump -d -r -M no-aliases --mattr=+zbb - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbb < %s \
# RUN: | llvm-objdump -d -r --mattr=+experimental-zbb - \ # RUN: | llvm-objdump -d -r --mattr=+zbb - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# The following check prefixes are used in this test: # The following check prefixes are used in this test:
# CHECK-S-OBJ Match both the .s and objdumped object output with # CHECK-S-OBJ Match both the .s and objdumped object output with
# aliases enabled # aliases enabled
# CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with # CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with
# aliases disabled # aliases disabled
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llvm/test/MC/RISCV/rv64zbb-invalid.s

# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,zbb < %s 2>&1 | FileCheck %s
# Too many operands # Too many operands
clzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction clzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
# Too many operands # Too many operands
ctzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction ctzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
# Too many operands # Too many operands
cpopw t0, t1, t2 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction cpopw t0, t1, t2 # CHECK: :[[@LINE]]:15: error: invalid operand for instruction

llvm/test/MC/RISCV/rv64zbb-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: clzw t0, t1 # CHECK-ASM-AND-OBJ: clzw t0, t1
# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x60] # CHECK-ASM: encoding: [0x9b,0x12,0x03,0x60]
clzw t0, t1 clzw t0, t1
# CHECK-ASM-AND-OBJ: ctzw t0, t1 # CHECK-ASM-AND-OBJ: ctzw t0, t1
# CHECK-ASM: encoding: [0x9b,0x12,0x13,0x60] # CHECK-ASM: encoding: [0x9b,0x12,0x13,0x60]
ctzw t0, t1 ctzw t0, t1
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llvm/test/MC/RISCV/rv64zbbp-invalid.s

# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb,experimental-zbp < %s 2>&1 | FileCheck %s # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,zbb,experimental-zbp < %s 2>&1 | FileCheck %s
# Too few operands # Too few operands
rolw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction rolw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
rorw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction rorw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
roriw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction roriw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Immediate operand out of range # Immediate operand out of range
roriw t0, t1, 32 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31] roriw t0, t1, 32 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31]
roriw t0, t1, -1 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31] roriw t0, t1, -1 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31]
# Too few operands # Too few operands
packw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction packw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
# Too few operands # Too few operands
packuw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction packuw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction

llvm/test/MC/RISCV/rv64zbbp-valid.s

# With Bitmanip base extension: # With Bitmanip base extension:
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \ # RUN: | llvm-objdump --mattr=+zbb -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# With Bitmanip permutation extension: # With Bitmanip permutation extension:
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbp -show-encoding \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbp -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbp < %s \ # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbp < %s \
# RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \ # RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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llvm/test/MC/RISCV/rv64zbs-aliases-valid.s

# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbs -riscv-no-aliases \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbs -riscv-no-aliases \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbs \ # RUN: llvm-mc %s -triple=riscv64 -mattr=+zbs \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbs < %s \ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbs < %s \
# RUN: | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbs - \ # RUN: | llvm-objdump -d -r -M no-aliases --mattr=+zbs - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbs < %s \ # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbs < %s \
# RUN: | llvm-objdump -d -r --mattr=+experimental-zbs - \ # RUN: | llvm-objdump -d -r --mattr=+zbs - \
# RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s # RUN: | FileCheck -check-prefixes=CHECK-S-OBJ %s
# The following check prefixes are used in this test: # The following check prefixes are used in this test:
# CHECK-S-OBJ Match both the .s and objdumped object output with # CHECK-S-OBJ Match both the .s and objdumped object output with
# aliases enabled # aliases enabled
# CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with # CHECK-S-OBJ-NOALIAS Match both the .s and objdumped object output with
# aliases disabled # aliases disabled
▲ Show 20 Lines • Show All 63 Lines • Show Last 20 Lines

llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; CHECK-LABEL: test5 ; CHECK-LABEL: test5
; CHECK: %const = bitcast i32 65535 to i32 ; CHECK: %const = bitcast i32 65535 to i32
%1 = and i32 %a, 65535 %1 = and i32 %a, 65535
%2 = and i32 %1, 65535 %2 = and i32 %1, 65535
ret i32 %2 ret i32 %2
} }
; Check that we don't hoist zext.h with 65535 with Zbb. ; Check that we don't hoist zext.h with 65535 with Zbb.
define i32 @test6(i32 %a) nounwind "target-features"="+experimental-zbb" { define i32 @test6(i32 %a) nounwind "target-features"="+zbb" {
; CHECK-LABEL: test6 ; CHECK-LABEL: test6
; CHECK: and i32 %a, 65535 ; CHECK: and i32 %a, 65535
%1 = and i32 %a, 65535 %1 = and i32 %a, 65535
%2 = and i32 %1, 65535 %2 = and i32 %1, 65535
ret i32 %2 ret i32 %2
} }
; Check that we hoist zext.w without Zba. ; Check that we hoist zext.w without Zba.
define i64 @test7(i64 %a) nounwind { define i64 @test7(i64 %a) nounwind {
; CHECK-LABEL: test7 ; CHECK-LABEL: test7
; CHECK: %const = bitcast i64 4294967295 to i64 ; CHECK: %const = bitcast i64 4294967295 to i64
%1 = and i64 %a, 4294967295 %1 = and i64 %a, 4294967295
%2 = and i64 %1, 4294967295 %2 = and i64 %1, 4294967295
ret i64 %2 ret i64 %2
} }
; Check that we don't hoist zext.w with Zba. ; Check that we don't hoist zext.w with Zba.
define i64 @test8(i64 %a) nounwind "target-features"="+experimental-zbb" { define i64 @test8(i64 %a) nounwind "target-features"="+zbb" {
; CHECK-LABEL: test8 ; CHECK-LABEL: test8
; CHECK: and i64 %a, 4294967295 ; CHECK: and i64 %a, 4294967295
%1 = and i64 %a, 4294967295 %1 = and i64 %a, 4294967295
%2 = and i64 %1, 4294967295 %2 = and i64 %1, 4294967295
ret i64 %2 ret i64 %2
} }

llvm/test/Transforms/LoopIdiom/RISCV/popcnt.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -loop-idiom -mtriple=riscv32 -mattr=+experimental-zbb -S < %s | FileCheck %s --check-prefixes=CPOP ; RUN: opt -loop-idiom -mtriple=riscv32 -mattr=+zbb -S < %s | FileCheck %s --check-prefixes=CPOP
; RUN: opt -loop-idiom -mtriple=riscv64 -mattr=+experimental-zbb -S < %s | FileCheck %s --check-prefixes=CPOP ; RUN: opt -loop-idiom -mtriple=riscv64 -mattr=+zbb -S < %s | FileCheck %s --check-prefixes=CPOP
; RUN: opt -loop-idiom -mtriple=riscv32 -S < %s | FileCheck %s --check-prefixes=NOCPOP ; RUN: opt -loop-idiom -mtriple=riscv32 -S < %s | FileCheck %s --check-prefixes=NOCPOP
; RUN: opt -loop-idiom -mtriple=riscv64 -S < %s | FileCheck %s --check-prefixes=NOCPOP ; RUN: opt -loop-idiom -mtriple=riscv64 -S < %s | FileCheck %s --check-prefixes=NOCPOP
; Mostly copied from AMDGPU version. ; Mostly copied from AMDGPU version.
;To recognize this pattern: ;To recognize this pattern:
;int popcount(unsigned long long a) { ;int popcount(unsigned long long a) {
; int c = 0; ; int c = 0;
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