[RISCV] Fix reporting of incorrect commutable operand indices

[frasercrmck]

Summary

This patch fixes an issue where RISCV's findCommutedOpIndices would
incorrectly return the pseudo CommuteAnyOperandIndex as a commutable
operand index, rather than fixing a specific index.

[rogfer01]

I'm not super familiar with this mechanism. But reading the docs I think this is correct.

Also, strictly logically, that else if was trivially true (due to an earlier assignment) which was not probably the intent of the code.

Good catch @frasercrmck!

[craig.topper]

@frasercrmck should we backport this to llvm 13?

[frasercrmck]

In D108206#2958062, @craig.topper wrote:

@frasercrmck should we backport this to llvm 13?

Hey, sorry, I was on holiday and should have been more proactive about this before I left. I see you've taken this on in 51593 - thanks!

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

if (SrcOpIdx1 == CommuteAnyOperandIndex ||
         SrcOpIdx2 == CommuteAnyOperandIndex) {
       // At least one of operands to be commuted is not specified and
       // this method is free to choose appropriate commutable operands.
       unsigned CommutableOpIdx1 = SrcOpIdx1;
       if (SrcOpIdx1 == SrcOpIdx2) {
         // Both of operands are not fixed. Set one of commutable
         // operands to the tied source.
         CommutableOpIdx1 = 1;
-      } else if (SrcOpIdx1 == CommutableOpIdx1) {
+      } else if (SrcOpIdx1 == CommuteAnyOperandIndex) {
         // Only one of the operands is not fixed.
         CommutableOpIdx1 = SrcOpIdx2;
       }
 
       // CommutableOpIdx1 is well defined now. Let's choose another commutable
       // operand and assign its index to CommutableOpIdx2.
       unsigned CommutableOpIdx2;
       if (CommutableOpIdx1 != 1) {

llvm/test/CodeGen/RISCV/rvv/commuted-op-indices-regression.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=riscv64 -mattr=+experimental-v -run-pass=simple-register-coalescing %s -o - 2>&1 | FileCheck %s
+
+# This test used to crash in the register coalescer when the target would
+# return the out-of-bounds CommuteAnyOperandIndex for one of its commutable
+# operand indices.
+
+--- |
+  target triple = "riscv64"
+  target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
+
+  define void @commuted_op_indices() {
+    unreachable
+  }
+...
+---
+name:            commuted_op_indices
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr, preferred-register: '' }
+  - { id: 1, class: vrnov0, preferred-register: '' }
+  - { id: 2, class: vrnov0, preferred-register: '' }
+  - { id: 3, class: vr, preferred-register: '' }
+body:             |
+  bb.0:
+    liveins: $v0, $v1, $v2
+    ; CHECK-LABEL: name: commuted_op_indices
+    ; CHECK: liveins: $v0, $v1, $v2
+    ; CHECK: [[COPY:%[0-9]+]]:vr = COPY $v0
+    ; CHECK: [[COPY1:%[0-9]+]]:vrnov0 = COPY $v1
+    ; CHECK: [[COPY2:%[0-9]+]]:vrnov0 = COPY $v2
+    ; CHECK: [[PseudoVNMSUB_VV_M1_:%[0-9]+]]:vr = PseudoVNMSUB_VV_M1 [[PseudoVNMSUB_VV_M1_]], [[COPY1]], [[COPY2]], $x0, 6, 1, implicit $vl, implicit $vtype
+    ; CHECK: [[COPY2:%[0-9]+]]:vr = COPY [[PseudoVNMSUB_VV_M1_]]
+    ; CHECK: dead [[COPY2]]:vr = PseudoVSLL_VI_M1 [[COPY2]], 11, $noreg, 6, implicit $vl, implicit $vtype
+    ; CHECK: $v0 = COPY [[PseudoVNMSUB_VV_M1_]]
+    ; CHECK: PseudoRET implicit $v0
+    %0:vr = COPY $v0
+    %1:vrnov0 = COPY $v1
+    %2:vrnov0 = COPY $v2
+    %0:vr = PseudoVNMSUB_VV_M1 %0, %1, killed %2, $x0, 6, 1, implicit $vl, implicit $vtype
+    %3:vr = COPY %0
+    %3:vr = PseudoVSLL_VI_M1 %3, 11, $noreg, 6, implicit $vl, implicit $vtype
+    $v0 = COPY %0
+    PseudoRET implicit $v0
+...