[Attributor] Do not delete volatile stores to null/undef

[jdoerfert]

Summary

See D106309.

[arsenm]

Missing some AMDGPU test updates?

[jdoerfert]

Update AMDGPU test

[jdoerfert]

In D107906#2939482, @arsenm wrote:

Missing some AMDGPU test updates?

I run the 4 but there are 15 by now, my bad.

llvm/lib/Transforms/IPO/AttributorAttributes.cpp

struct AAUndefinedBehaviorImpl : public AAUndefinedBehavior {
 
   /// See AbstractAttribute::updateImpl(...).
   // through a pointer (i.e. also branches etc.)
   ChangeStatus updateImpl(Attributor &A) override {
     const size_t UBPrevSize = KnownUBInsts.size();
     const size_t NoUBPrevSize = AssumedNoUBInsts.size();
 
     auto InspectMemAccessInstForUB = [&](Instruction &I) {
+      // Lang ref now states volatile store is not UB, let's skip them.
+      if (I.isVolatile() && I.mayWriteToMemory())
+        return true;
+
       // Skip instructions that are already saved.
       if (AssumedNoUBInsts.count(&I) || KnownUBInsts.count(&I))
         return true;
 
       // If we reach here, we know we have an instruction
       // that accesses memory through a pointer operand,
       // for which getPointerOperand() should give it to us.
       Value *PtrOp =
if (!isAssumedSideEffectFree(A, I)) {
       if (!isa_and_nonnull<StoreInst>(I))
         indicatePessimisticFixpoint();
       else
         removeAssumedBits(HAS_NO_EFFECT);
     }
   }
 
   bool isDeadStore(Attributor &A, StoreInst &SI) {
+    // Lang ref now states volatile store is not UB/dead, let's skip them.
+    if (SI.isVolatile())
+      return false;
+
     bool UsedAssumedInformation = false;
     SmallSetVector<Value *, 4> PotentialCopies;
     if (!AA::getPotentialCopiesOfStoredValue(A, SI, PotentialCopies, *this,
                                              UsedAssumedInformation))
       return false;
     return llvm::all_of(PotentialCopies, [&](Value *V) {
       return A.isAssumedDead(IRPosition::value(*V), this, nullptr,
                              UsedAssumedInformation);

llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll

 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workitem_id_x
 ; AKF_HSA-SAME: () #[[ATTR1:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workitem_id_x
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1:[0-9]+]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i32 @llvm.amdgcn.workitem.id.x()
   store volatile i32 %val, i32 addrspace(1)* undef
   ret void
 }
 
 define void @use_workitem_id_y() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workitem_id_y
 ; AKF_HSA-SAME: () #[[ATTR2:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workitem_id_y
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i32 @llvm.amdgcn.workitem.id.y()
   store volatile i32 %val, i32 addrspace(1)* undef
   ret void
 }
 
 define void @use_workitem_id_z() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workitem_id_z
 ; AKF_HSA-SAME: () #[[ATTR3:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workitem_id_z
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i32 @llvm.amdgcn.workitem.id.z()
   store volatile i32 %val, i32 addrspace(1)* undef
   ret void
 }
 
 define void @use_workgroup_id_x() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_x
 ; AKF_HSA-SAME: () #[[ATTR4:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workgroup.id.x()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_x
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i32 @llvm.amdgcn.workgroup.id.x()
   store volatile i32 %val, i32 addrspace(1)* undef
   ret void
 }
 
 define void @use_workgroup_id_y() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_y
 ; AKF_HSA-SAME: () #[[ATTR5:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workgroup.id.y()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_y
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i32 @llvm.amdgcn.workgroup.id.y()
   store volatile i32 %val, i32 addrspace(1)* undef
   ret void
 }
 
 define void @use_workgroup_id_z() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_z
 ; AKF_HSA-SAME: () #[[ATTR6:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workgroup.id.z()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_z
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i32 @llvm.amdgcn.workgroup.id.z()
   store volatile i32 %val, i32 addrspace(1)* undef
   ret void
 }
 
 define void @use_dispatch_ptr() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_dispatch_ptr
 ; AKF_HSA-SAME: () #[[ATTR7:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[DISPATCH_PTR:%.*]] = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
 ; AKF_HSA-NEXT:    store volatile i8 addrspace(4)* [[DISPATCH_PTR]], i8 addrspace(4)* addrspace(1)* undef, align 8
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_dispatch_ptr
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i8 addrspace(4)* undef, i8 addrspace(4)* addrspace(1)* undef, align 8
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
   store volatile i8 addrspace(4)* %dispatch.ptr, i8 addrspace(4)* addrspace(1)* undef
   ret void
 }
 
 define void @use_queue_ptr() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_queue_ptr
 ; AKF_HSA-SAME: () #[[ATTR8:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[QUEUE_PTR:%.*]] = call i8 addrspace(4)* @llvm.amdgcn.queue.ptr()
 ; AKF_HSA-NEXT:    store volatile i8 addrspace(4)* [[QUEUE_PTR]], i8 addrspace(4)* addrspace(1)* undef, align 8
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_queue_ptr
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i8 addrspace(4)* undef, i8 addrspace(4)* addrspace(1)* undef, align 8
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %queue.ptr = call i8 addrspace(4)* @llvm.amdgcn.queue.ptr()
   store volatile i8 addrspace(4)* %queue.ptr, i8 addrspace(4)* addrspace(1)* undef
   ret void
 }
 
 define void @use_dispatch_id() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_dispatch_id
 ; AKF_HSA-SAME: () #[[ATTR9:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i64 @llvm.amdgcn.dispatch.id()
 ; AKF_HSA-NEXT:    store volatile i64 [[VAL]], i64 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_dispatch_id
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i64 undef, i64 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val = call i64 @llvm.amdgcn.dispatch.id()
   store volatile i64 %val, i64 addrspace(1)* undef
   ret void
 }
 
 define void @use_workgroup_id_y_workgroup_id_z() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_y_workgroup_id_z
 ; AKF_HSA-SAME: () #[[ATTR10:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[VAL0:%.*]] = call i32 @llvm.amdgcn.workgroup.id.y()
 ; AKF_HSA-NEXT:    [[VAL1:%.*]] = call i32 @llvm.amdgcn.workgroup.id.z()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL0]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL1]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_workgroup_id_y_workgroup_id_z
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
   %val1 = call i32 @llvm.amdgcn.workgroup.id.z()
   store volatile i32 %val0, i32 addrspace(1)* undef
   store volatile i32 %val1, i32 addrspace(1)* undef
   ret void
 }

 ; AKF_HSA-SAME: () #[[ATTR2]] {
 ; AKF_HSA-NEXT:    [[VAL:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()
 ; AKF_HSA-NEXT:    store volatile i32 [[VAL]], i32 addrspace(1)* undef, align 4
 ; AKF_HSA-NEXT:    call void @recursive_use_workitem_id_y()
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@recursive_use_workitem_id_y
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR3:[0-9]+]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i32 undef, i32 addrspace(1)* undef, align 4
 ; ATTRIBUTOR_HSA-NEXT:    call void @recursive_use_workitem_id_y() #[[ATTR11:[0-9]+]]
 ; ATTRIBUTOR_HSA-NEXT:    unreachable
 ;
   %val = call i32 @llvm.amdgcn.workitem.id.y()
   store volatile i32 %val, i32 addrspace(1)* undef
   call void @recursive_use_workitem_id_y()
   ret void
 }

 ; AKF_HSA-LABEL: define {{[^@]+}}@use_kernarg_segment_ptr
 ; AKF_HSA-SAME: () #[[ATTR14:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[KERNARG_SEGMENT_PTR:%.*]] = call i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
 ; AKF_HSA-NEXT:    store volatile i8 addrspace(4)* [[KERNARG_SEGMENT_PTR]], i8 addrspace(4)* addrspace(1)* undef, align 8
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_kernarg_segment_ptr
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i8 addrspace(4)* undef, i8 addrspace(4)* addrspace(1)* undef, align 8
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %kernarg.segment.ptr = call i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
   store volatile i8 addrspace(4)* %kernarg.segment.ptr, i8 addrspace(4)* addrspace(1)* undef
   ret void
 }
 define void @func_indirect_use_kernarg_segment_ptr() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@func_indirect_use_kernarg_segment_ptr

 ; AKF_HSA-LABEL: define {{[^@]+}}@kern_use_implicitarg_ptr
 ; AKF_HSA-SAME: () #[[ATTR15:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[IMPLICITARG_PTR:%.*]] = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
 ; AKF_HSA-NEXT:    store volatile i8 addrspace(4)* [[IMPLICITARG_PTR]], i8 addrspace(4)* addrspace(1)* undef, align 8
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_use_implicitarg_ptr
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i8 addrspace(4)* undef, i8 addrspace(4)* addrspace(1)* undef, align 8
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
   store volatile i8 addrspace(4)* %implicitarg.ptr, i8 addrspace(4)* addrspace(1)* undef
   ret void
 }
 
 define void @use_implicitarg_ptr() #1 {
 ; AKF_HSA-LABEL: define {{[^@]+}}@use_implicitarg_ptr
 ; AKF_HSA-SAME: () #[[ATTR16:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[IMPLICITARG_PTR:%.*]] = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
 ; AKF_HSA-NEXT:    store volatile i8 addrspace(4)* [[IMPLICITARG_PTR]], i8 addrspace(4)* addrspace(1)* undef, align 8
 ; AKF_HSA-NEXT:    ret void
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_implicitarg_ptr
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR1]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i8 addrspace(4)* undef, i8 addrspace(4)* addrspace(1)* undef, align 8
 ; ATTRIBUTOR_HSA-NEXT:    ret void
 ;
   %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
   store volatile i8 addrspace(4)* %implicitarg.ptr, i8 addrspace(4)* addrspace(1)* undef
   ret void
 }
 
 define void @func_indirect_use_implicitarg_ptr() #1 {

 ; AKF_HSA-LABEL: define {{[^@]+}}@use_dispatch_ptr_ret_type
 ; AKF_HSA-SAME: () #[[ATTR20:[0-9]+]] {
 ; AKF_HSA-NEXT:    [[DISPATCH_PTR:%.*]] = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
 ; AKF_HSA-NEXT:    store volatile i8 addrspace(4)* [[DISPATCH_PTR]], i8 addrspace(4)* addrspace(1)* undef, align 8
 ; AKF_HSA-NEXT:    ret i32 0
 ;
 ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@use_dispatch_ptr_ret_type
 ; ATTRIBUTOR_HSA-SAME: () #[[ATTR9:[0-9]+]] {
+; ATTRIBUTOR_HSA-NEXT:    store volatile i8 addrspace(4)* undef, i8 addrspace(4)* addrspace(1)* undef, align 8
 ; ATTRIBUTOR_HSA-NEXT:    ret i32 0
 ;
   %dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
   store volatile i8 addrspace(4)* %dispatch.ptr, i8 addrspace(4)* addrspace(1)* undef
   ret i32 0
 }
 
 define float @func_indirect_use_dispatch_ptr_constexpr_cast_func() #1 {

llvm/test/Transforms/Attributor/undefined_behavior.ll

 ; IS__CGSCC____-LABEL: define {{[^@]+}}@store_wholly_unreachable
 ; IS__CGSCC____-SAME: () #[[ATTR0]] {
 ; IS__CGSCC____-NEXT:    unreachable
 ;
   store i32 5, i32* null
   ret void
 }
 
+define void @store_wholly_unreachable_volatile() {
+; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
+; IS__TUNIT____-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile
+; IS__TUNIT____-SAME: () #[[ATTR2:[0-9]+]] {
+; IS__TUNIT____-NEXT:    store volatile i32 5, i32* null, align 536870912
+; IS__TUNIT____-NEXT:    ret void
+;
+; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
+; IS__CGSCC____-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile
+; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
+; IS__CGSCC____-NEXT:    store volatile i32 5, i32* null, align 536870912
+; IS__CGSCC____-NEXT:    ret void
+;
+  store volatile i32 5, i32* null
+  ret void
+}
+
 define void @store_single_bb_unreachable(i1 %cond) {
 ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@store_single_bb_unreachable
 ; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
 ; IS__TUNIT____-NEXT:    br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
 ; IS__TUNIT____:       t:
 ; IS__TUNIT____-NEXT:    unreachable
 ; IS__TUNIT____:       e:
t:
   br label %e
 e:
   ret void
 }
 
 define void @store_null_pointer_is_defined() null_pointer_is_valid {
 ; IS__TUNIT____: Function Attrs: nofree nosync nounwind null_pointer_is_valid willreturn writeonly
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@store_null_pointer_is_defined
-; IS__TUNIT____-SAME: () #[[ATTR2:[0-9]+]] {
+; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] {
 ; IS__TUNIT____-NEXT:    store i32 5, i32* null, align 536870912
 ; IS__TUNIT____-NEXT:    ret void
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@store_null_pointer_is_defined
-; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
+; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
 ; IS__CGSCC____-NEXT:    store i32 5, i32* null, align 536870912
 ; IS__CGSCC____-NEXT:    ret void
 ;
   store i32 5, i32* null
   ret void
 }
 
 define void @store_null_propagated() {
;
   ret void
 }
 
 ; -- AtomicRMW tests --
 
 define void @atomicrmw_wholly_unreachable() {
 ; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_wholly_unreachable
-; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] {
+; IS__TUNIT____-SAME: () #[[ATTR2]] {
 ; IS__TUNIT____-NEXT:    unreachable
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_wholly_unreachable
-; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
+; IS__CGSCC____-SAME: () #[[ATTR2]] {
 ; IS__CGSCC____-NEXT:    unreachable
 ;
   %a = atomicrmw add i32* null, i32 1 acquire
   ret void
 }
 
 define void @atomicrmw_single_bb_unreachable(i1 %cond) {
 ; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_single_bb_unreachable
-; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR3]] {
+; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
 ; IS__TUNIT____-NEXT:    br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
 ; IS__TUNIT____:       t:
 ; IS__TUNIT____-NEXT:    unreachable
 ; IS__TUNIT____:       e:
 ; IS__TUNIT____-NEXT:    ret void
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_single_bb_unreachable
-; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR3]] {
+; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
 ; IS__CGSCC____-NEXT:    br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
 ; IS__CGSCC____:       t:
 ; IS__CGSCC____-NEXT:    unreachable
 ; IS__CGSCC____:       e:
 ; IS__CGSCC____-NEXT:    ret void
 ;
   br i1 %cond, label %t, label %e
 t:

 }
 
 define void @atomicrmw_null_propagated() {
 ; ATTRIBUTOR-LABEL: @atomicrmw_null_propagated(
 ; ATTRIBUTOR-NEXT:    unreachable
 ;
 ; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_null_propagated
-; IS__TUNIT____-SAME: () #[[ATTR3]] {
+; IS__TUNIT____-SAME: () #[[ATTR2]] {
 ; IS__TUNIT____-NEXT:    unreachable
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_null_propagated
-; IS__CGSCC____-SAME: () #[[ATTR3]] {
+; IS__CGSCC____-SAME: () #[[ATTR2]] {
 ; IS__CGSCC____-NEXT:    unreachable
 ;
   %ptr = call i32* @ret_null()
   %a = atomicrmw add i32* %ptr, i32 1 acquire
   ret void
 }
 
 ; -- AtomicCmpXchg tests --
 
 define void @atomiccmpxchg_wholly_unreachable() {
 ; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_wholly_unreachable
-; IS__TUNIT____-SAME: () #[[ATTR3]] {
+; IS__TUNIT____-SAME: () #[[ATTR2]] {
 ; IS__TUNIT____-NEXT:    unreachable
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_wholly_unreachable
-; IS__CGSCC____-SAME: () #[[ATTR3]] {
+; IS__CGSCC____-SAME: () #[[ATTR2]] {
 ; IS__CGSCC____-NEXT:    unreachable
 ;
   %a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic
   ret void
 }
 
 define void @atomiccmpxchg_single_bb_unreachable(i1 %cond) {
 ; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_single_bb_unreachable
-; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR3]] {
+; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
 ; IS__TUNIT____-NEXT:    br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
 ; IS__TUNIT____:       t:
 ; IS__TUNIT____-NEXT:    unreachable
 ; IS__TUNIT____:       e:
 ; IS__TUNIT____-NEXT:    ret void
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_single_bb_unreachable
-; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR3]] {
+; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
 ; IS__CGSCC____-NEXT:    br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
 ; IS__CGSCC____:       t:
 ; IS__CGSCC____-NEXT:    unreachable
 ; IS__CGSCC____:       e:
 ; IS__CGSCC____-NEXT:    ret void
 ;
   br i1 %cond, label %t, label %e
 t:

 }
 
 define void @atomiccmpxchg_null_propagated() {
 ; ATTRIBUTOR-LABEL: @atomiccmpxchg_null_propagated(
 ; ATTRIBUTOR-NEXT:    unreachable
 ;
 ; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn
 ; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_propagated
-; IS__TUNIT____-SAME: () #[[ATTR3]] {
+; IS__TUNIT____-SAME: () #[[ATTR2]] {
 ; IS__TUNIT____-NEXT:    unreachable
 ;
 ; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
 ; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_propagated
-; IS__CGSCC____-SAME: () #[[ATTR3]] {
+; IS__CGSCC____-SAME: () #[[ATTR2]] {
 ; IS__CGSCC____-NEXT:    unreachable
 ;
   %ptr = call i32* @ret_null()
   %a = cmpxchg i32* %ptr, i32 2, i32 3 acq_rel monotonic
   ret void
 }
 
 ; -- Conditional branching tests --

 ; IS__CGSCC____-NEXT:    ret i32* undef
 ;
   %ret = call i32* @argument_noundef2(i32* undef)
   ret i32* %ret
 }
 ;.
 ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn }
 ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind null_pointer_is_valid readnone willreturn }
-; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind null_pointer_is_valid willreturn writeonly }
-; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nounwind readnone willreturn }
+; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nounwind readnone willreturn }
+; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind null_pointer_is_valid willreturn writeonly }
 ; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nounwind null_pointer_is_valid willreturn }
 ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree noreturn nosync nounwind readnone willreturn }
 ; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nofree nosync nounwind willreturn writeonly }
 ; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly }
 ;.
 ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
 ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
-; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly }
-; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nounwind readnone willreturn }
+; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nounwind readnone willreturn }
+; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly }
 ; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nounwind null_pointer_is_valid willreturn }
 ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
 ; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
 ; IS__CGSCC____: attributes #[[ATTR7]] = { nounwind willreturn writeonly }
 ;.