[x86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT

[xiangzhangllvm]

Summary

A bugfix for X86TargetLowering:
For INSERT_VECTOR_ELT, X86TargetLowering may try to generate illegal type, for example v2i64 in special 32-bits target.
Because this Lowering optimization is done after Type Legalization, so we can no longer convert illegal type to legal again.

The small reproduce case "vector_double2_insert.ll" will crash in X86TargetLowering::LowerINSERT_VECTOR_ELT

[RKSimon]

Nice catch!

llvm/test/CodeGen/X86/vector_double2_insert.ll

2 ↗

(On Diff #361573)

We'd probably be better off adding i686 triple coverage to llvm/test/CodeGen/X86/avx-insertelt.ll to get much better coverage:

; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx  | FileCheck %s --check-prefixes=ALL,AVX
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2,X64-AVX2
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2,X86-AVX2

[RKSimon]

llvm/test/CodeGen/X86/vector_double2_insert.ll

2 ↗

(On Diff #361573)

Sorry that should be llvm/test/CodeGen/X86/insertelement-var-index.ll - add at least one AVX2 or later RUN with i686 triple:

; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2   | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2,X64-AVX2
; RUN: llc < %s -mtriple=i686--   -mattr=+avx2   | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2,X86-AVX2

[xiangzhangllvm]

Thanks @RKSimon 's review, I remove my old test, add check x86avx2 in insertelement-var-index.ll (It also can reproduce the bug)

Because the 32bit output has a lot of difference with the 64, I independently use "check x86avx2" for it.

[xiangzhangllvm]

llvm/test/CodeGen/X86/vector_double2_insert.ll

2 ↗

(On Diff #361573)

There already "-mtriple=x86_64-- -mattr=+avx2 " here, so add "-mtriple=i686-- -mattr=+avx2" thanks!

[RKSimon]

LGTM with one minor change

llvm/test/CodeGen/X86/insertelement-var-index.ll

8

Can you make it --check-prefixes=ALL,X86AVX2 please?

[xiangzhangllvm]

llvm/test/CodeGen/X86/insertelement-var-index.ll

8

Of course, just need change "retq" to "ret", thanks a lot!

[xiangzhangllvm]

Refine test checks in insertelement-var-index.ll (other changes was auto modified by utils/update_llc_test_checks.py)

[pengfei]

In D106780#2906692, @xiangzhangllvm wrote:

Refine test checks in insertelement-var-index.ll (other changes was auto modified by utils/update_llc_test_checks.py)

I think this can be updated by the script.

[RKSimon]

llvm/test/CodeGen/X86/insertelement-var-index.ll

8

yup - the script should do that for you

[xiangzhangllvm]

Yes, It did it, let me commit it after the latest check-all testing, thanks!

llvm/lib/Target/X86/X86ISelLowering.cpp

if (!N2C) {
     // possible vector indices, and FP insertion has less gpr->simd traffic.
     if (!(Subtarget.hasBWI() ||
           (Subtarget.hasAVX512() && EltSizeInBits >= 32) ||
           (Subtarget.hasSSE41() && VT.isFloatingPoint())))
       return SDValue();
 
     MVT IdxSVT = MVT::getIntegerVT(EltSizeInBits);
     MVT IdxVT = MVT::getVectorVT(IdxSVT, NumElts);
+    if (!isTypeLegal(IdxSVT) || !isTypeLegal(IdxVT))
+      return SDValue();
+
     SDValue IdxExt = DAG.getZExtOrTrunc(N2, dl, IdxSVT);
     SDValue IdxSplat = DAG.getSplatBuildVector(IdxVT, dl, IdxExt);
     SDValue EltSplat = DAG.getSplatBuildVector(VT, dl, N1);
 
     SmallVector<SDValue, 16> RawIndices;
     for (unsigned I = 0; I != NumElts; ++I)
       RawIndices.push_back(DAG.getConstant(I, dl, IdxSVT));
     SDValue Indices = DAG.getBuildVector(IdxVT, dl, RawIndices);

llvm/test/CodeGen/X86/insertelement-var-index.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2   | FileCheck %s --check-prefixes=ALL,SSE,SSE2
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx    | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX1
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2   | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl  | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512F
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
+; RUN: llc < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,X86AVX2
 
 define <16 x i8> @undef_index(i8 %x) nounwind {
 ; ALL-LABEL: undef_index:
 ; ALL:       # %bb.0:
-; ALL-NEXT:    retq
+; ALL-NEXT:    ret{{[l|q]}}
   %ins = insertelement <16 x i8> undef, i8 %x, i64 undef
   ret <16 x i8> %ins
 }
 
 define <16 x i8> @undef_scalar(<16 x i8> %x, i32 %index) nounwind {
 ; ALL-LABEL: undef_scalar:
 ; ALL:       # %bb.0:
-; ALL-NEXT:    retq
+; ALL-NEXT:    ret{{[l|q]}}
   %ins = insertelement <16 x i8> %x, i8 undef, i32 %index
   ret <16 x i8> %ins
 }
 
 ;
 ; Insertion into undef vectors
 ;
 

 ; AVX512F-NEXT:    vmovd %edi, %xmm0
 ; AVX512F-NEXT:    vpbroadcastb %xmm0, %xmm0
 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i8_v16i8_undef:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastb %edi, %xmm0
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i8_v16i8_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vpbroadcastb {{[0-9]+}}(%esp), %xmm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <16 x i8> undef, i8 %x, i32 %y
   ret <16 x i8> %ins
 }
 
 define <8 x i16> @arg_i16_v8i16_undef(i16 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i16_v8i16_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    movd %edi, %xmm0

 ; AVX512F-NEXT:    vmovd %edi, %xmm0
 ; AVX512F-NEXT:    vpbroadcastw %xmm0, %xmm0
 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i16_v8i16_undef:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastw %edi, %xmm0
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i16_v8i16_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vpbroadcastw {{[0-9]+}}(%esp), %xmm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <8 x i16> undef, i16 %x, i32 %y
   ret <8 x i16> %ins
 }
 
 define <4 x i32> @arg_i32_v4i32_undef(i32 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i32_v4i32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    movd %edi, %xmm0

 ; AVX2-NEXT:    vmovd %edi, %xmm0
 ; AVX2-NEXT:    vpbroadcastd %xmm0, %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_i32_v4i32_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %edi, %xmm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i32_v4i32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %xmm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x i32> undef, i32 %x, i32 %y
   ret <4 x i32> %ins
 }
 
 define <2 x i64> @arg_i64_v2i64_undef(i64 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i64_v2i64_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    movq %rdi, %xmm0

 ; AVX2-NEXT:    vmovq %rdi, %xmm0
 ; AVX2-NEXT:    vpbroadcastq %xmm0, %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_i64_v2i64_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastq %rdi, %xmm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i64_v2i64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
+; X86AVX2-NEXT:    retl
   %ins = insertelement <2 x i64> undef, i64 %x, i32 %y
   ret <2 x i64> %ins
 }
 
 define <4 x float> @arg_f32_v4f32_undef(float %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_f32_v4f32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
 ; SSE-NEXT:    retq
 ;
 ; AVX1-LABEL: arg_f32_v4f32_undef:
 ; AVX1:       # %bb.0:
 ; AVX1-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
 ; AVX1-NEXT:    retq
 ;
 ; AVX2-LABEL: arg_f32_v4f32_undef:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vbroadcastss %xmm0, %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_f32_v4f32_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vbroadcastss %xmm0, %xmm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f32_v4f32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %xmm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x float> undef, float %x, i32 %y
   ret <4 x float> %ins
 }
 
 define <2 x double> @arg_f64_v2f64_undef(double %x, i32 %y) nounwind {
 ; SSE2-LABEL: arg_f64_v2f64_undef:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    movlhps {{.*#+}} xmm0 = xmm0[0,0]
 ; SSE2-NEXT:    retq
 ;
 ; SSE41-LABEL: arg_f64_v2f64_undef:
 ; SSE41:       # %bb.0:
 ; SSE41-NEXT:    movddup {{.*#+}} xmm0 = xmm0[0,0]
 ; SSE41-NEXT:    retq
 ;
 ; AVX-LABEL: arg_f64_v2f64_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f64_v2f64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
+; X86AVX2-NEXT:    retl
   %ins = insertelement <2 x double> undef, double %x, i32 %y
   ret <2 x double> %ins
 }
 
 define <16 x i8> @load_i8_v16i8_undef(i8* %p, i32 %y) nounwind {
 ; SSE2-LABEL: load_i8_v16i8_undef:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    movzbl (%rdi), %eax

 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpbroadcastb (%rdi), %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_i8_v16i8_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastb (%rdi), %xmm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i8_v16i8_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vpbroadcastb (%eax), %xmm0
+; X86AVX2-NEXT:    retl
   %x = load i8, i8* %p
   %ins = insertelement <16 x i8> undef, i8 %x, i32 %y
   ret <16 x i8> %ins
 }
 
 define <8 x i16> @load_i16_v8i16_undef(i16* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i16_v8i16_undef:
 ; SSE:       # %bb.0:

 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpbroadcastw (%rdi), %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_i16_v8i16_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastw (%rdi), %xmm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i16_v8i16_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vpbroadcastw (%eax), %xmm0
+; X86AVX2-NEXT:    retl
   %x = load i16, i16* %p
   %ins = insertelement <8 x i16> undef, i16 %x, i32 %y
   ret <8 x i16> %ins
 }
 
 define <4 x i32> @load_i32_v4i32_undef(i32* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i32_v4i32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
 ; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_i32_v4i32_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vbroadcastss (%rdi), %xmm0
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i32_v4i32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vbroadcastss (%eax), %xmm0
+; X86AVX2-NEXT:    retl
   %x = load i32, i32* %p
   %ins = insertelement <4 x i32> undef, i32 %x, i32 %y
   ret <4 x i32> %ins
 }
 
 define <2 x i64> @load_i64_v2i64_undef(i64* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i64_v2i64_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
 ; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_i64_v2i64_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i64_v2i64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
+; X86AVX2-NEXT:    retl
   %x = load i64, i64* %p
   %ins = insertelement <2 x i64> undef, i64 %x, i32 %y
   ret <2 x i64> %ins
 }
 
 define <4 x float> @load_f32_v4f32_undef(float* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_f32_v4f32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
 ; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_f32_v4f32_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vbroadcastss (%rdi), %xmm0
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f32_v4f32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vbroadcastss (%eax), %xmm0
+; X86AVX2-NEXT:    retl
   %x = load float, float* %p
   %ins = insertelement <4 x float> undef, float %x, i32 %y
   ret <4 x float> %ins
 }
 
 define <2 x double> @load_f64_v2f64_undef(double* %p, i32 %y) nounwind {
 ; SSE2-LABEL: load_f64_v2f64_undef:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
 ; SSE2-NEXT:    movlhps {{.*#+}} xmm0 = xmm0[0,0]
 ; SSE2-NEXT:    retq
 ;
 ; SSE41-LABEL: load_f64_v2f64_undef:
 ; SSE41:       # %bb.0:
 ; SSE41-NEXT:    movddup {{.*#+}} xmm0 = mem[0,0]
 ; SSE41-NEXT:    retq
 ;
 ; AVX-LABEL: load_f64_v2f64_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f64_v2f64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
+; X86AVX2-NEXT:    retl
   %x = load double, double* %p
   %ins = insertelement <2 x double> undef, double %x, i32 %y
   ret <2 x double> %ins
 }
 
 define <32 x i8> @arg_i8_v32i8_undef(i8 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i8_v32i8_undef:
 ; SSE:       # %bb.0:

 ; AVX512F-NEXT:    vmovd %edi, %xmm0
 ; AVX512F-NEXT:    vpbroadcastb %xmm0, %ymm0
 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i8_v32i8_undef:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastb %edi, %ymm0
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i8_v32i8_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vpbroadcastb {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <32 x i8> undef, i8 %x, i32 %y
   ret <32 x i8> %ins
 }
 
 define <16 x i16> @arg_i16_v16i16_undef(i16 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i16_v16i16_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX512F-NEXT:    vmovd %edi, %xmm0
 ; AVX512F-NEXT:    vpbroadcastw %xmm0, %ymm0
 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i16_v16i16_undef:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastw %edi, %ymm0
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i16_v16i16_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vpbroadcastw {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <16 x i16> undef, i16 %x, i32 %y
   ret <16 x i16> %ins
 }
 
 define <8 x i32> @arg_i32_v8i32_undef(i32 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i32_v8i32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX2-NEXT:    vmovd %edi, %xmm0
 ; AVX2-NEXT:    vpbroadcastd %xmm0, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_i32_v8i32_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %edi, %ymm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i32_v8i32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <8 x i32> undef, i32 %x, i32 %y
   ret <8 x i32> %ins
 }
 
 define <4 x i64> @arg_i64_v4i64_undef(i64 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i64_v4i64_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX2-NEXT:    vmovq %rdi, %xmm0
 ; AVX2-NEXT:    vpbroadcastq %xmm0, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_i64_v4i64_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastq %rdi, %ymm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i64_v4i64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vbroadcastsd {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x i64> undef, i64 %x, i32 %y
   ret <4 x i64> %ins
 }
 
 define <8 x float> @arg_f32_v8f32_undef(float %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_f32_v8f32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $edi killed $edi def $rdi

 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vbroadcastss %xmm0, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_f32_v8f32_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vbroadcastss %xmm0, %ymm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f32_v8f32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <8 x float> undef, float %x, i32 %y
   ret <8 x float> %ins
 }
 
 define <4 x double> @arg_f64_v4f64_undef(double %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_f64_v4f64_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $edi killed $edi def $rdi

 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vbroadcastsd %xmm0, %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_f64_v4f64_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vbroadcastsd %xmm0, %ymm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f64_v4f64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vbroadcastsd {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x double> undef, double %x, i32 %y
   ret <4 x double> %ins
 }
 
 define <32 x i8> @load_i8_v32i8_undef(i8* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i8_v32i8_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpbroadcastb (%rdi), %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_i8_v32i8_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastb (%rdi), %ymm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i8_v32i8_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vpbroadcastb (%eax), %ymm0
+; X86AVX2-NEXT:    retl
   %x = load i8, i8* %p
   %ins = insertelement <32 x i8> undef, i8 %x, i32 %y
   ret <32 x i8> %ins
 }
 
 define <16 x i16> @load_i16_v16i16_undef(i16* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i16_v16i16_undef:
 ; SSE:       # %bb.0:

 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    vpbroadcastw (%rdi), %ymm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_i16_v16i16_undef:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastw (%rdi), %ymm0
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i16_v16i16_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vpbroadcastw (%eax), %ymm0
+; X86AVX2-NEXT:    retl
   %x = load i16, i16* %p
   %ins = insertelement <16 x i16> undef, i16 %x, i32 %y
   ret <16 x i16> %ins
 }
 
 define <8 x i32> @load_i32_v8i32_undef(i32* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i32_v8i32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi
 ; SSE-NEXT:    movl (%rdi), %eax
 ; SSE-NEXT:    andl $7, %esi
 ; SSE-NEXT:    movl %eax, -40(%rsp,%rsi,4)
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm0
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm1
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_i32_v8i32_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vbroadcastss (%rdi), %ymm0
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i32_v8i32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vbroadcastss (%eax), %ymm0
+; X86AVX2-NEXT:    retl
   %x = load i32, i32* %p
   %ins = insertelement <8 x i32> undef, i32 %x, i32 %y
   ret <8 x i32> %ins
 }
 
 define <4 x i64> @load_i64_v4i64_undef(i64* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i64_v4i64_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi
 ; SSE-NEXT:    movq (%rdi), %rax
 ; SSE-NEXT:    andl $3, %esi
 ; SSE-NEXT:    movq %rax, -40(%rsp,%rsi,8)
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm0
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm1
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_i64_v4i64_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vbroadcastsd (%rdi), %ymm0
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i64_v4i64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vbroadcastsd (%eax), %ymm0
+; X86AVX2-NEXT:    retl
   %x = load i64, i64* %p
   %ins = insertelement <4 x i64> undef, i64 %x, i32 %y
   ret <4 x i64> %ins
 }
 
 define <8 x float> @load_f32_v8f32_undef(float* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_f32_v8f32_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi
 ; SSE-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
 ; SSE-NEXT:    andl $7, %esi
 ; SSE-NEXT:    movss %xmm0, -40(%rsp,%rsi,4)
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm0
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm1
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_f32_v8f32_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vbroadcastss (%rdi), %ymm0
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f32_v8f32_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vbroadcastss (%eax), %ymm0
+; X86AVX2-NEXT:    retl
   %x = load float, float* %p
   %ins = insertelement <8 x float> undef, float %x, i32 %y
   ret <8 x float> %ins
 }
 
 define <4 x double> @load_f64_v4f64_undef(double* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_f64_v4f64_undef:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi
 ; SSE-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
 ; SSE-NEXT:    andl $3, %esi
 ; SSE-NEXT:    movsd %xmm0, -40(%rsp,%rsi,8)
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm0
 ; SSE-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm1
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: load_f64_v4f64_undef:
 ; AVX:       # %bb.0:
 ; AVX-NEXT:    vbroadcastsd (%rdi), %ymm0
 ; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f64_v4f64_undef:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vbroadcastsd (%eax), %ymm0
+; X86AVX2-NEXT:    retl
   %x = load double, double* %p
   %ins = insertelement <4 x double> undef, double %x, i32 %y
   ret <4 x double> %ins
 }
 
 ;
 ; Insertion into arg vectors
 ;

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i8_v16i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastb %esi, %xmm1
 ; AVX512BW-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastb %edi, %xmm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i8_v16i8:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $15, %eax
+; X86AVX2-NEXT:    movb 8(%ebp), %cl
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    movb %cl, (%esp,%eax)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <16 x i8> %v, i8 %x, i32 %y
   ret <16 x i8> %ins
 }
 
 define <8 x i16> @arg_i16_v8i16(<8 x i16> %v, i16 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i16_v8i16:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i16_v8i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastw %esi, %xmm1
 ; AVX512BW-NEXT:    vpcmpeqw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastw %edi, %xmm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i16_v8i16:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $7, %eax
+; X86AVX2-NEXT:    movzwl 8(%ebp), %ecx
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    movw %cx, (%esp,%eax,2)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <8 x i16> %v, i16 %x, i32 %y
   ret <8 x i16> %ins
 }
 
 define <4 x i32> @arg_i32_v4i32(<4 x i32> %v, i32 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i32_v4i32:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX1OR2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_i32_v4i32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %esi, %xmm1
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512-NEXT:    vpbroadcastd %edi, %xmm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i32_v4i32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $3, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    movl %ecx, (%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x i32> %v, i32 %x, i32 %y
   ret <4 x i32> %ins
 }
 
 define <2 x i64> @arg_i64_v2i64(<2 x i64> %v, i64 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i64_v2i64:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ;
 ; AVX512-LABEL: arg_i64_v2i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %esi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %xmm1
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512-NEXT:    vpbroadcastq %rdi, %xmm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i64_v2i64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    pushl %esi
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $48, %esp
+; X86AVX2-NEXT:    movl 8(%ebp), %eax
+; X86AVX2-NEXT:    movl 12(%ebp), %ecx
+; X86AVX2-NEXT:    movl 16(%ebp), %edx
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    leal (%edx,%edx), %esi
+; X86AVX2-NEXT:    andl $3, %esi
+; X86AVX2-NEXT:    movl %eax, (%esp,%esi,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    vmovaps %xmm0, {{[0-9]+}}(%esp)
+; X86AVX2-NEXT:    leal 1(%edx,%edx), %eax
+; X86AVX2-NEXT:    andl $3, %eax
+; X86AVX2-NEXT:    movl %ecx, 16(%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps {{[0-9]+}}(%esp), %xmm0
+; X86AVX2-NEXT:    leal -4(%ebp), %esp
+; X86AVX2-NEXT:    popl %esi
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <2 x i64> %v, i64 %x, i32 %y
   ret <2 x i64> %ins
 }
 
 define <4 x float> @arg_f32_v4f32(<4 x float> %v, float %x, i32 %y) nounwind {
 ; SSE2-LABEL: arg_f32_v4f32:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    # kill: def $edi killed $edi def $rdi

 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_f32_v4f32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %edi, %xmm2
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %k1
 ; AVX512-NEXT:    vbroadcastss %xmm1, %xmm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f32_v4f32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vpbroadcastd {{[0-9]+}}(%esp), %xmm1
+; X86AVX2-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm1
+; X86AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %xmm2
+; X86AVX2-NEXT:    vblendvps %xmm1, %xmm2, %xmm0, %xmm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x float> %v, float %x, i32 %y
   ret <4 x float> %ins
 }
 
 define <2 x double> @arg_f64_v2f64(<2 x double> %v, double %x, i32 %y) nounwind {
 ; SSE2-LABEL: arg_f64_v2f64:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    # kill: def $edi killed $edi def $rdi

 ;
 ; AVX512-LABEL: arg_f64_v2f64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %edi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %xmm2
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %k1
 ; AVX512-NEXT:    vmovddup {{.*#+}} xmm0 {%k1} = xmm1[0,0]
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f64_v2f64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 16(%ebp), %eax
+; X86AVX2-NEXT:    andl $1, %eax
+; X86AVX2-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    vmovsd %xmm1, (%esp,%eax,8)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <2 x double> %v, double %x, i32 %y
   ret <2 x double> %ins
 }
 
 define <16 x i8> @load_i8_v16i8(<16 x i8> %v, i8* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i8_v16i8:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: load_i8_v16i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastb %esi, %xmm1
 ; AVX512BW-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastb (%rdi), %xmm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i8_v16i8:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $15, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movb (%ecx), %cl
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    movb %cl, (%esp,%eax)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i8, i8* %p
   %ins = insertelement <16 x i8> %v, i8 %x, i32 %y
   ret <16 x i8> %ins
 }
 
 define <8 x i16> @load_i16_v8i16(<8 x i16> %v, i16* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i16_v8i16:
 ; SSE:       # %bb.0:

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: load_i16_v8i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastw %esi, %xmm1
 ; AVX512BW-NEXT:    vpcmpeqw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastw (%rdi), %xmm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i16_v8i16:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $7, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movzwl (%ecx), %ecx
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    movw %cx, (%esp,%eax,2)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i16, i16* %p
   %ins = insertelement <8 x i16> %v, i16 %x, i32 %y
   ret <8 x i16> %ins
 }
 
 define <4 x i32> @load_i32_v4i32(<4 x i32> %v, i32* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i32_v4i32:
 ; SSE:       # %bb.0:

 ; AVX1OR2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_i32_v4i32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %esi, %xmm1
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512-NEXT:    vpbroadcastd (%rdi), %xmm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i32_v4i32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $3, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movl (%ecx), %ecx
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    movl %ecx, (%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i32, i32* %p
   %ins = insertelement <4 x i32> %v, i32 %x, i32 %y
   ret <4 x i32> %ins
 }
 
 define <2 x i64> @load_i64_v2i64(<2 x i64> %v, i64* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i64_v2i64:
 ; SSE:       # %bb.0:

 ;
 ; AVX512-LABEL: load_i64_v2i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %esi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %xmm1
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512-NEXT:    vpbroadcastq (%rdi), %xmm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i64_v2i64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    pushl %esi
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $48, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movl (%ecx), %edx
+; X86AVX2-NEXT:    movl 4(%ecx), %ecx
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    leal (%eax,%eax), %esi
+; X86AVX2-NEXT:    andl $3, %esi
+; X86AVX2-NEXT:    movl %edx, (%esp,%esi,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    vmovaps %xmm0, {{[0-9]+}}(%esp)
+; X86AVX2-NEXT:    leal 1(%eax,%eax), %eax
+; X86AVX2-NEXT:    andl $3, %eax
+; X86AVX2-NEXT:    movl %ecx, 16(%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps {{[0-9]+}}(%esp), %xmm0
+; X86AVX2-NEXT:    leal -4(%ebp), %esp
+; X86AVX2-NEXT:    popl %esi
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i64, i64* %p
   %ins = insertelement <2 x i64> %v, i64 %x, i32 %y
   ret <2 x i64> %ins
 }
 
 define <4 x float> @load_f32_v4f32(<4 x float> %v, float* %p, i32 %y) nounwind {
 ; SSE2-LABEL: load_f32_v4f32:
 ; SSE2:       # %bb.0:

 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_f32_v4f32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %esi, %xmm1
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512-NEXT:    vbroadcastss (%rdi), %xmm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f32_v4f32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vpbroadcastd {{[0-9]+}}(%esp), %xmm1
+; X86AVX2-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1, %xmm1
+; X86AVX2-NEXT:    vbroadcastss (%eax), %xmm2
+; X86AVX2-NEXT:    vblendvps %xmm1, %xmm2, %xmm0, %xmm0
+; X86AVX2-NEXT:    retl
   %x = load float, float* %p
   %ins = insertelement <4 x float> %v, float %x, i32 %y
   ret <4 x float> %ins
 }
 
 define <2 x double> @load_f64_v2f64(<2 x double> %v, double* %p, i32 %y) nounwind {
 ; SSE2-LABEL: load_f64_v2f64:
 ; SSE2:       # %bb.0:

 ;
 ; AVX512-LABEL: load_f64_v2f64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %esi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %xmm1
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
 ; AVX512-NEXT:    vmovddup {{.*#+}} xmm0 {%k1} = mem[0,0]
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f64_v2f64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-16, %esp
+; X86AVX2-NEXT:    subl $32, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $1, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
+; X86AVX2-NEXT:    vmovaps %xmm0, (%esp)
+; X86AVX2-NEXT:    vmovsd %xmm1, (%esp,%eax,8)
+; X86AVX2-NEXT:    vmovaps (%esp), %xmm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load double, double* %p
   %ins = insertelement <2 x double> %v, double %x, i32 %y
   ret <2 x double> %ins
 }
 
 define <32 x i8> @arg_i8_v32i8(<32 x i8> %v, i8 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i8_v32i8:
 ; SSE:       # %bb.0:

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i8_v32i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastb %esi, %ymm1
 ; AVX512BW-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastb %edi, %ymm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i8_v32i8:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $31, %eax
+; X86AVX2-NEXT:    movb 8(%ebp), %cl
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    movb %cl, (%esp,%eax)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <32 x i8> %v, i8 %x, i32 %y
   ret <32 x i8> %ins
 }
 
 define <16 x i16> @arg_i16_v16i16(<16 x i16> %v, i16 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i16_v16i16:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: arg_i16_v16i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastw %esi, %ymm1
 ; AVX512BW-NEXT:    vpcmpeqw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastw %edi, %ymm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i16_v16i16:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $15, %eax
+; X86AVX2-NEXT:    movzwl 8(%ebp), %ecx
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    movw %cx, (%esp,%eax,2)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <16 x i16> %v, i16 %x, i32 %y
   ret <16 x i16> %ins
 }
 
 define <8 x i32> @arg_i32_v8i32(<8 x i32> %v, i32 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i32_v8i32:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX1OR2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_i32_v8i32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %esi, %ymm1
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512-NEXT:    vpbroadcastd %edi, %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i32_v8i32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $7, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    movl %ecx, (%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <8 x i32> %v, i32 %x, i32 %y
   ret <8 x i32> %ins
 }
 
 define <4 x i64> @arg_i64_v4i64(<4 x i64> %v, i64 %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_i64_v4i64:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ;
 ; AVX512-LABEL: arg_i64_v4i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %esi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %ymm1
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512-NEXT:    vpbroadcastq %rdi, %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_i64_v4i64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    pushl %esi
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $96, %esp
+; X86AVX2-NEXT:    movl 8(%ebp), %eax
+; X86AVX2-NEXT:    movl 12(%ebp), %ecx
+; X86AVX2-NEXT:    movl 16(%ebp), %edx
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    leal (%edx,%edx), %esi
+; X86AVX2-NEXT:    andl $7, %esi
+; X86AVX2-NEXT:    movl %eax, (%esp,%esi,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    vmovaps %ymm0, {{[0-9]+}}(%esp)
+; X86AVX2-NEXT:    leal 1(%edx,%edx), %eax
+; X86AVX2-NEXT:    andl $7, %eax
+; X86AVX2-NEXT:    movl %ecx, 32(%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    leal -4(%ebp), %esp
+; X86AVX2-NEXT:    popl %esi
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x i64> %v, i64 %x, i32 %y
   ret <4 x i64> %ins
 }
 
 define <8 x float> @arg_f32_v8f32(<8 x float> %v, float %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_f32_v8f32:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $edi killed $edi def $rdi

 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: arg_f32_v8f32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %edi, %ymm2
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %k1
 ; AVX512-NEXT:    vbroadcastss %xmm1, %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f32_v8f32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    vpbroadcastd {{[0-9]+}}(%esp), %ymm1
+; X86AVX2-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}, %ymm1, %ymm1
+; X86AVX2-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm2
+; X86AVX2-NEXT:    vblendvps %ymm1, %ymm2, %ymm0, %ymm0
+; X86AVX2-NEXT:    retl
   %ins = insertelement <8 x float> %v, float %x, i32 %y
   ret <8 x float> %ins
 }
 
 define <4 x double> @arg_f64_v4f64(<4 x double> %v, double %x, i32 %y) nounwind {
 ; SSE-LABEL: arg_f64_v4f64:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $edi killed $edi def $rdi

 ;
 ; AVX512-LABEL: arg_f64_v4f64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %edi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %ymm2
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %k1
 ; AVX512-NEXT:    vbroadcastsd %xmm1, %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: arg_f64_v4f64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 16(%ebp), %eax
+; X86AVX2-NEXT:    andl $3, %eax
+; X86AVX2-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    vmovsd %xmm1, (%esp,%eax,8)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %ins = insertelement <4 x double> %v, double %x, i32 %y
   ret <4 x double> %ins
 }
 
 define <32 x i8> @load_i8_v32i8(<32 x i8> %v, i8* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i8_v32i8:
 ; SSE:       # %bb.0:
 ; SSE-NEXT:    # kill: def $esi killed $esi def $rsi

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: load_i8_v32i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastb %esi, %ymm1
 ; AVX512BW-NEXT:    vpcmpeqb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastb (%rdi), %ymm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i8_v32i8:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $31, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movb (%ecx), %cl
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    movb %cl, (%esp,%eax)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i8, i8* %p
   %ins = insertelement <32 x i8> %v, i8 %x, i32 %y
   ret <32 x i8> %ins
 }
 
 define <16 x i16> @load_i16_v16i16(<16 x i16> %v, i16* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i16_v16i16:
 ; SSE:       # %bb.0:

 ; AVX512F-NEXT:    retq
 ;
 ; AVX512BW-LABEL: load_i16_v16i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    vpbroadcastw %esi, %ymm1
 ; AVX512BW-NEXT:    vpcmpeqw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512BW-NEXT:    vpbroadcastw (%rdi), %ymm0 {%k1}
 ; AVX512BW-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i16_v16i16:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $15, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movzwl (%ecx), %ecx
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    movw %cx, (%esp,%eax,2)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i16, i16* %p
   %ins = insertelement <16 x i16> %v, i16 %x, i32 %y
   ret <16 x i16> %ins
 }
 
 define <8 x i32> @load_i32_v8i32(<8 x i32> %v, i32* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i32_v8i32:
 ; SSE:       # %bb.0:

 ; AVX1OR2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_i32_v8i32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %esi, %ymm1
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512-NEXT:    vpbroadcastd (%rdi), %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i32_v8i32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $7, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movl (%ecx), %ecx
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    movl %ecx, (%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i32, i32* %p
   %ins = insertelement <8 x i32> %v, i32 %x, i32 %y
   ret <8 x i32> %ins
 }
 
 define <4 x i64> @load_i64_v4i64(<4 x i64> %v, i64* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_i64_v4i64:
 ; SSE:       # %bb.0:

 ;
 ; AVX512-LABEL: load_i64_v4i64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %esi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %ymm1
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512-NEXT:    vpbroadcastq (%rdi), %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_i64_v4i64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    pushl %esi
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $96, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    movl (%ecx), %edx
+; X86AVX2-NEXT:    movl 4(%ecx), %ecx
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    leal (%eax,%eax), %esi
+; X86AVX2-NEXT:    andl $7, %esi
+; X86AVX2-NEXT:    movl %edx, (%esp,%esi,4)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    vmovaps %ymm0, {{[0-9]+}}(%esp)
+; X86AVX2-NEXT:    leal 1(%eax,%eax), %eax
+; X86AVX2-NEXT:    andl $7, %eax
+; X86AVX2-NEXT:    movl %ecx, 32(%esp,%eax,4)
+; X86AVX2-NEXT:    vmovaps {{[0-9]+}}(%esp), %ymm0
+; X86AVX2-NEXT:    leal -4(%ebp), %esp
+; X86AVX2-NEXT:    popl %esi
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load i64, i64* %p
   %ins = insertelement <4 x i64> %v, i64 %x, i32 %y
   ret <4 x i64> %ins
 }
 
 define <8 x float> @load_f32_v8f32(<8 x float> %v, float* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_f32_v8f32:
 ; SSE:       # %bb.0:

 ; AVX2-NEXT:    retq
 ;
 ; AVX512-LABEL: load_f32_v8f32:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    vpbroadcastd %esi, %ymm1
 ; AVX512-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512-NEXT:    vbroadcastss (%rdi), %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f32_v8f32:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    vpbroadcastd {{[0-9]+}}(%esp), %ymm1
+; X86AVX2-NEXT:    vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}, %ymm1, %ymm1
+; X86AVX2-NEXT:    vbroadcastss (%eax), %ymm2
+; X86AVX2-NEXT:    vblendvps %ymm1, %ymm2, %ymm0, %ymm0
+; X86AVX2-NEXT:    retl
   %x = load float, float* %p
   %ins = insertelement <8 x float> %v, float %x, i32 %y
   ret <8 x float> %ins
 }
 
 define <4 x double> @load_f64_v4f64(<4 x double> %v, double* %p, i32 %y) nounwind {
 ; SSE-LABEL: load_f64_v4f64:
 ; SSE:       # %bb.0:

 ;
 ; AVX512-LABEL: load_f64_v4f64:
 ; AVX512:       # %bb.0:
 ; AVX512-NEXT:    movslq %esi, %rax
 ; AVX512-NEXT:    vpbroadcastq %rax, %ymm1
 ; AVX512-NEXT:    vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %k1
 ; AVX512-NEXT:    vbroadcastsd (%rdi), %ymm0 {%k1}
 ; AVX512-NEXT:    retq
+;
+; X86AVX2-LABEL: load_f64_v4f64:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    pushl %ebp
+; X86AVX2-NEXT:    movl %esp, %ebp
+; X86AVX2-NEXT:    andl $-32, %esp
+; X86AVX2-NEXT:    subl $64, %esp
+; X86AVX2-NEXT:    movl 12(%ebp), %eax
+; X86AVX2-NEXT:    andl $3, %eax
+; X86AVX2-NEXT:    movl 8(%ebp), %ecx
+; X86AVX2-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
+; X86AVX2-NEXT:    vmovaps %ymm0, (%esp)
+; X86AVX2-NEXT:    vmovsd %xmm1, (%esp,%eax,8)
+; X86AVX2-NEXT:    vmovaps (%esp), %ymm0
+; X86AVX2-NEXT:    movl %ebp, %esp
+; X86AVX2-NEXT:    popl %ebp
+; X86AVX2-NEXT:    retl
   %x = load double, double* %p
   %ins = insertelement <4 x double> %v, double %x, i32 %y
   ret <4 x double> %ins
 }
 
 ; Don't die trying to insert to an invalid index.
 
 define i32 @PR44139(<16 x i64>* %p) {
-; ALL-LABEL: PR44139:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movl (%rdi), %eax
-; ALL-NEXT:    leal 2147483647(%rax), %ecx
-; ALL-NEXT:    testl %eax, %eax
-; ALL-NEXT:    cmovnsl %eax, %ecx
-; ALL-NEXT:    andl $-2147483648, %ecx # imm = 0x80000000
-; ALL-NEXT:    addl %eax, %ecx
-; ALL-NEXT:    # kill: def $eax killed $eax killed $rax
-; ALL-NEXT:    xorl %edx, %edx
-; ALL-NEXT:    divl %ecx
-; ALL-NEXT:    retq
+; SSE-LABEL: PR44139:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movl (%rdi), %eax
+; SSE-NEXT:    leal 2147483647(%rax), %ecx
+; SSE-NEXT:    testl %eax, %eax
+; SSE-NEXT:    cmovnsl %eax, %ecx
+; SSE-NEXT:    andl $-2147483648, %ecx # imm = 0x80000000
+; SSE-NEXT:    addl %eax, %ecx
+; SSE-NEXT:    # kill: def $eax killed $eax killed $rax
+; SSE-NEXT:    xorl %edx, %edx
+; SSE-NEXT:    divl %ecx
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: PR44139:
+; AVX:       # %bb.0:
+; AVX-NEXT:    movl (%rdi), %eax
+; AVX-NEXT:    leal 2147483647(%rax), %ecx
+; AVX-NEXT:    testl %eax, %eax
+; AVX-NEXT:    cmovnsl %eax, %ecx
+; AVX-NEXT:    andl $-2147483648, %ecx # imm = 0x80000000
+; AVX-NEXT:    addl %eax, %ecx
+; AVX-NEXT:    # kill: def $eax killed $eax killed $rax
+; AVX-NEXT:    xorl %edx, %edx
+; AVX-NEXT:    divl %ecx
+; AVX-NEXT:    retq
+;
+; X86AVX2-LABEL: PR44139:
+; X86AVX2:       # %bb.0:
+; X86AVX2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86AVX2-NEXT:    movl (%eax), %eax
+; X86AVX2-NEXT:    leal 2147483647(%eax), %ecx
+; X86AVX2-NEXT:    testl %eax, %eax
+; X86AVX2-NEXT:    cmovnsl %eax, %ecx
+; X86AVX2-NEXT:    andl $-2147483648, %ecx # imm = 0x80000000
+; X86AVX2-NEXT:    addl %eax, %ecx
+; X86AVX2-NEXT:    xorl %edx, %edx
+; X86AVX2-NEXT:    divl %ecx
+; X86AVX2-NEXT:    retl
   %L = load <16 x i64>, <16 x i64>* %p
   %E1 = extractelement <16 x i64> %L, i64 0
   %tempvector = insertelement <16 x i64> undef, i64 %E1, i32 0
   %vector = shufflevector <16 x i64> %tempvector, <16 x i64> undef, <16 x i32> zeroinitializer
   %C3 = icmp sgt i64 9223372036854775807, -9223372036854775808
   %t0 = trunc <16 x i64> %vector to <16 x i32>
   %I4 = insertelement <16 x i64> %vector, i64 %E1, i1 %C3
   store <16 x i64> %I4, <16 x i64>* %p
   %elt = extractelement <16 x i32> %t0, i32 0
   %B = srem i32 %elt, -2147483648
   %B9 = udiv i32 %elt, %B
   ret i32 %B9
 }