[AIX][XCOFF] Add support for 64-bit TLS fixup kind

[MaryamBen]

Summary

Support relocation fixup kind for tls 64-bit

[jhenderson]

llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll

34

Should any of these checks be -NEXT?

[MaryamBen]

Update tests based on a9854045f6b6

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

case FK_Data_4:
     case MCSymbolRefExpr::VK_PPC_AIX_TLSGD:
       return {XCOFF::RelocationType::R_TLS, EncodedSignednessIndicator | 31};
     case MCSymbolRefExpr::VK_PPC_AIX_TLSGDM:
       return {XCOFF::RelocationType::R_TLSM, EncodedSignednessIndicator | 31};
     case MCSymbolRefExpr::VK_None:
       return {XCOFF::RelocationType::R_POS, EncodedSignednessIndicator | 31};
     }
   case FK_Data_8:
+    switch (Modifier) {
+    default:
+      report_fatal_error("Unsupported modifier");
+    case MCSymbolRefExpr::VK_PPC_AIX_TLSGD:
+      return {XCOFF::RelocationType::R_TLS, EncodedSignednessIndicator | 63};
+    case MCSymbolRefExpr::VK_PPC_AIX_TLSGDM:
+      return {XCOFF::RelocationType::R_TLSM, EncodedSignednessIndicator | 63};
+    case MCSymbolRefExpr::VK_None:
       return {XCOFF::RelocationType::R_POS, EncodedSignednessIndicator | 63};
     }
   }
+}

llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll

 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
 ; RUN:     -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefixes=RELOC,RELOC32 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM32 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefixes=DIS,DIS32 %s
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false --code-model=large -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefixes=RELOC,RELOC64 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM64 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefixes=DIS,DIS64 %s
 
 @GInit = global double 1.000000e+00, align 8
 @TIInit = internal thread_local global i64 1, align 8
 @TWInit = weak thread_local global double 1.000000e+00, align 8
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define void @storesTIInit(i64 %Val) #0 {
 entry:
   store i64 %Val, i64* @TIInit, align 8
   ret void
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define double @loadsTWInit() #1 {
 entry:
   %0 = load double, double* @TWInit, align 8
   %1 = load double, double* @GInit, align 8
   %add = fadd double %0, %1
   ret double %add
 }
 
-; RELOC:      File: {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o
-; RELOC-NEXT: Format: aixcoff-rs6000
-; RELOC-NEXT: Arch: powerpc
-; RELOC-NEXT: AddressSize: 32bit
-; RELOC-NEXT: Relocations [
-; RELOC-NEXT:   Section (index: 1) .text {
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x16
-; RELOC-NEXT:     Symbol: .TIInit (17)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCU (0x30)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x1A
-; RELOC-NEXT:     Symbol: TIInit (19)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCU (0x30)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x1E
-; RELOC-NEXT:     Symbol: .TIInit (17)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCL (0x31)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x22
-; RELOC-NEXT:     Symbol: TIInit (19)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCL (0x31)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x24
-; RELOC-NEXT:     Symbol: .__tls_get_addr (1)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 26
-; RELOC-NEXT:     Type: R_RBA (0x18)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x4E
-; RELOC-NEXT:     Symbol: .TWInit (21)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCU (0x30)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x52
-; RELOC-NEXT:     Symbol: TWInit (23)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCU (0x30)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x56
-; RELOC-NEXT:     Symbol: .TWInit (21)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCL (0x31)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x5A
-; RELOC-NEXT:     Symbol: TWInit (23)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCL (0x31)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x5C
-; RELOC-NEXT:     Symbol: .__tls_get_addr (1)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 26
-; RELOC-NEXT:     Type: R_RBA (0x18)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x66
-; RELOC-NEXT:     Symbol: GInit (25)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCU (0x30)
-; RELOC-NEXT:   }
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x6A
-; RELOC-NEXT:     Symbol: GInit (25)
-; RELOC-NEXT:     IsSigned: No
-; RELOC-NEXT:     FixupBitValue: 0
-; RELOC-NEXT:     Length: 16
-; RELOC-NEXT:     Type: R_TOCL (0x31)
-; RELOC-NEXT:   }
-; RELOC-NEXT: }
-; RELOC-NEXT: Section (index: 2) .data {
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0x90
-; RELOC-NEXT:   Symbol: .storesTIInit (5)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_POS (0x0)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0x94
-; RELOC-NEXT:   Symbol: TOC (15)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_POS (0x0)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0x9C
-; RELOC-NEXT:   Symbol: .loadsTWInit (7)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_POS (0x0)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0xA0
-; RELOC-NEXT:   Symbol: TOC (15)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_POS (0x0)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0xA8
-; RELOC-NEXT:   Symbol: TIInit (27)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_TLSM (0x24)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0xAC
-; RELOC-NEXT:   Symbol: TIInit (27)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_TLS (0x20)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0xB0
-; RELOC-NEXT:   Symbol: TWInit (29)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_TLSM (0x24)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0xB4
-; RELOC-NEXT:   Symbol: TWInit (29)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_TLS (0x20)
-; RELOC-NEXT: }
-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0xB8
-; RELOC-NEXT:   Symbol: GInit (9)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_POS (0x0)
-; RELOC-NEXT: }
-; RELOC-NEXT: }
-; RELOC-NEXT: ]
+; RELOC:        File: {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o
+; RELOC32-NEXT: Format: aixcoff-rs6000
+; RELOC32-NEXT: Arch: powerpc
+; RELOC32-NEXT: AddressSize: 32bit
+; RELOC64-NEXT: Format: aix5coff64-rs6000
+; RELOC64-NEXT: Arch: powerpc64
+; RELOC64-NEXT: AddressSize: 64bit
+; RELOC-NEXT:   Relocations [
+; RELOC-NEXT:     Section (index: 1) .text {
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x16
+; RELOC64-NEXT:       Virtual Address: 0x12
+; RELOC-NEXT:         Symbol: .TIInit (17)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCU (0x30)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x1A
+; RELOC64-NEXT:       Virtual Address: 0x16
+; RELOC-NEXT:         Symbol: TIInit (19)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCU (0x30)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x1E
+; RELOC64-NEXT:       Virtual Address: 0x1A
+; RELOC-NEXT:         Symbol: .TIInit (17)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCL (0x31)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x22
+; RELOC64-NEXT:       Virtual Address: 0x1E
+; RELOC-NEXT:         Symbol: TIInit (19)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCL (0x31)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x24
+; RELOC64-NEXT:       Virtual Address: 0x20
+; RELOC-NEXT:         Symbol: .__tls_get_addr (1)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 26
+; RELOC-NEXT:         Type: R_RBA (0x18)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x4E
+; RELOC-NEXT:         Symbol: .TWInit (21)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCU (0x30)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x52
+; RELOC-NEXT:         Symbol: TWInit (23)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCU (0x30)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x56
+; RELOC-NEXT:         Symbol: .TWInit (21)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCL (0x31)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x5A
+; RELOC-NEXT:         Symbol: TWInit (23)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCL (0x31)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x5C
+; RELOC-NEXT:         Symbol: .__tls_get_addr (1)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 26
+; RELOC-NEXT:         Type: R_RBA (0x18)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x66
+; RELOC64-NEXT:       Virtual Address: 0x62
+; RELOC-NEXT:         Symbol: GInit (25)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCU (0x30)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x6A
+; RELOC-NEXT:         Symbol: GInit (25)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC-NEXT:         Length: 16
+; RELOC-NEXT:         Type: R_TOCL (0x31)
+; RELOC-NEXT:       }
+; RELOC-NEXT:     }
+; RELOC-NEXT:     Section (index: 2) .data {
+; RELOC-NEXT:       Relocation {
+; RELOC-NEXT:         Virtual Address: 0x90
+; RELOC-NEXT:         Symbol: .storesTIInit (5)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x94
+; RELOC64-NEXT:       Virtual Address: 0x98
+; RELOC-NEXT:         Symbol: TOC (15)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x9C
+; RELOC64-NEXT:       Virtual Address: 0xA8
+; RELOC-NEXT:         Symbol: .loadsTWInit (7)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0xA0
+; RELOC64-NEXT:       Virtual Address: 0xB0
+; RELOC-NEXT:         Symbol: TOC (15)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0xA8
+; RELOC64-NEXT:       Virtual Address: 0xC0
+; RELOC-NEXT:         Symbol: TIInit (27)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLSM (0x24)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0xAC
+; RELOC64-NEXT:       Virtual Address: 0xC8
+; RELOC-NEXT:         Symbol: TIInit (27)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLS (0x20)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0xB0
+; RELOC64-NEXT:       Virtual Address: 0xD0
+; RELOC-NEXT:         Symbol: TWInit (29)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLSM (0x24)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0xB4
+; RELOC64-NEXT:       Virtual Address: 0xD8
+; RELOC-NEXT:         Symbol: TWInit (29)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLS (0x20)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0xB8
+; RELOC64-NEXT:       Virtual Address: 0xE0
+; RELOC-NEXT:         Symbol: GInit (9)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
+; RELOC-NEXT:       }
+; RELOC-NEXT:     }
+; RELOC-NEXT:   ]
 
-; SYM:      File: {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o
-; SYM-NEXT: Format: aixcoff-rs6000
-; SYM-NEXT: Arch: powerpc
-; SYM-NEXT: AddressSize: 32bit
-; SYM-NEXT: Symbols [
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 0
-; SYM-NEXT:     Name: .file
-; SYM-NEXT:     Value (SymbolTableIndex): 0x0
-; SYM-NEXT:     Section: N_DEBUG
-; SYM-NEXT:     Source Language ID: TB_C (0x0)
-; SYM-NEXT:     CPU Version ID: 0x0
-; SYM-NEXT:     StorageClass: C_FILE (0x67)
-; SYM-NEXT:     NumberOfAuxEntries: 0
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 1
-; SYM-NEXT:     Name: .__tls_get_addr
-; SYM-NEXT:     Value (RelocatableAddress): 0x0
-; SYM-NEXT:     Section: N_UNDEF
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_EXT (0x2)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 2
-; SYM-NEXT:       SectionLen: 0
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 0
-; SYM-NEXT:       SymbolType: XTY_ER (0x0)
-; SYM-NEXT:       StorageMappingClass: XMC_PR (0x0)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 3
-; SYM-NEXT:     Name: .text
-; SYM-NEXT:     Value (RelocatableAddress): 0x0
-; SYM-NEXT:     Section: .text
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 4
-; SYM-NEXT:       SectionLen: 132
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 4
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_PR (0x0)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 5
-; SYM-NEXT:     Name: .storesTIInit
-; SYM-NEXT:     Value (RelocatableAddress): 0x0
-; SYM-NEXT:     Section: .text
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_EXT (0x2)
-; SYM-NEXT:     NumberOfAuxEntries: 1
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-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
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-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
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-; SYM-NEXT:       TypeChkSectNum: 0x0
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-; SYM-NEXT:       StorageMappingClass: XMC_TL (0x14)
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-; SYM-NEXT:   Symbol {
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-; SYM-NEXT:     NumberOfAuxEntries: 1
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-; SYM-NEXT:       SectionLen: 8
-; SYM-NEXT:       ParameterHashIndex: 0x0
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-; SYM-NEXT:       SymbolAlignmentLog2: 3
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-; SYM-NEXT:       StorageMappingClass: XMC_TL (0x14)
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-; SYM-NEXT:       StabSectNum: 0x0
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-; SYM-NEXT:   }
-; SYM-NEXT: ]
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+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TE (0x16)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 21
+; SYM-NEXT:       Name: .TWInit
+; SYM32-NEXT:     Value (RelocatableAddress): 0xB0
+; SYM64-NEXT:     Value (RelocatableAddress): 0xD0
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 22
+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TE (0x16)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 23
+; SYM-NEXT:       Name: TWInit
+; SYM32-NEXT:     Value (RelocatableAddress): 0xB4
+; SYM64-NEXT:     Value (RelocatableAddress): 0xD8
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 24
+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TE (0x16)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 25
+; SYM-NEXT:       Name: GInit
+; SYM32-NEXT:     Value (RelocatableAddress): 0xB8
+; SYM64-NEXT:     Value (RelocatableAddress): 0xE0
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 26
+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TE (0x16)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 27
+; SYM-NEXT:       Name: TIInit
+; SYM-NEXT:       Value (RelocatableAddress): 0x0
+; SYM-NEXT:       Section: .tdata
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 28
+; SYM-NEXT:         SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TL (0x14)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 29
+; SYM-NEXT:       Name: TWInit
+; SYM-NEXT:       Value (RelocatableAddress): 0x8
+; SYM-NEXT:       Section: .tdata
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_WEAKEXT (0x6F)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 30
+; SYM-NEXT:         SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TL (0x14)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:   ]
 
-; DIS:      {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o: file format aixcoff-rs6000
-; DIS:      Disassembly of section .text:
-; DIS:      00000000 (idx: 5) .storesTIInit:
-; DIS-NEXT:                                       mflr 0
-; DIS-NEXT:                                       stw 0, 8(1)
-; DIS-NEXT:                                       stwu 1, -32(1)
-; DIS-NEXT:                                       mr 6, 4
-; DIS-NEXT:                                       mr 7, 3
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 17) .TIInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 19) TIInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 3, 0(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 17) .TIInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 4, 4(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 19) TIInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA  (idx: 1)      .__tls_get_addr[PR]
-; DIS-NEXT:                                       stw 6, 4(3)
-; DIS-NEXT:                                       stw 7, 0(3)
-; DIS-NEXT:                                       addi 1, 1, 32
-; DIS-NEXT:                                       lwz 0, 8(1)
-; DIS-NEXT:                                       mtlr 0
-; DIS-NEXT:                                       blr
-; DIS:      00000040 (idx: 7) .loadsTWInit:
-; DIS-NEXT:                                       mflr 0
-; DIS-NEXT:                                       stw 0, 8(1)
-; DIS-NEXT:                                       stwu 1, -32(1)
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 21) .TWInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 23) TWInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 3, 8(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 21) .TWInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 4, 12(4)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 23) TWInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA  (idx: 1)      .__tls_get_addr[PR]
-; DIS-NEXT:                                       lfd 0, 0(3)
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 25) GInit[TE]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 3, 16(3)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 25) GInit[TE]
-; DIS-NEXT:                                       lfd 1, 0(3)
-; DIS-NEXT:                                       fadd 1, 0, 1
-; DIS-NEXT:                                       addi 1, 1, 32
-; DIS-NEXT:                                       lwz 0, 8(1)
-; DIS-NEXT:                                       mtlr 0
-; DIS-NEXT:                                       blr
+; DIS32:      {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o: file format aixcoff-rs6000
+; DIS64:      {{.*}}aix-tls-xcoff-reloc-large.ll.tmp.o: file format aix5coff64-rs6000
+; DIS:        Disassembly of section .text:
+; DIS:        00000000 (idx: 5) .storesTIInit:
+; DIS-NEXT:                                         mflr 0
+; DIS32-NEXT:                                       stw 0, 8(1)
+; DIS32-NEXT:                                       stwu 1, -32(1)
+; DIS32-NEXT:                                       mr 6, 4
+; DIS32-NEXT:                                       mr 7, 3
+; DIS64-NEXT:                                       std 0, 16(1)
+; DIS64-NEXT:                                       stdu 1, -48(1)
+; DIS64-NEXT:                                       mr 6, 3
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 17) .TIInit[TE]
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 19) TIInit[TE]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 3, 0(3)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 3, 0(3)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 17) .TIInit[TE]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 4, 4(4)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 4, 8(4)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 19) TIInit[TE]
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}                bla 0
+; DIS-NEXT:   {{0*}}[[#ADDR]]: R_RBA  (idx: 1)      .__tls_get_addr[PR]
+; DIS32-NEXT:                                       stw 6, 4(3)
+; DIS32-NEXT:                                       stw 7, 0(3)
+; DIS32-NEXT:                                       addi 1, 1, 32
+; DIS32-NEXT:                                       lwz 0, 8(1)
+; DIS64-NEXT:                                       std 6, 0(3)
+; DIS64-NEXT:                                       addi 1, 1, 48
+; DIS64-NEXT:                                       ld 0, 16(1)
+; DIS-NEXT:                                         mtlr 0
+; DIS-NEXT:                                         blr
+; DIS:        00000040 (idx: 7) .loadsTWInit:
+; DIS-NEXT:                                         mflr 0
+; DIS32-NEXT:                                       stw 0, 8(1)
+; DIS32-NEXT:                                       stwu 1, -32(1)
+; DIS64-NEXT:                                       std 0, 16(1)
+; DIS64-NEXT:                                       stdu 1, -48(1)
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 21) .TWInit[TE]
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 23) TWInit[TE]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 3, 8(3)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 3, 16(3)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 21) .TWInit[TE]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 4, 12(4)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 4, 24(4)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 23) TWInit[TE]
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}                bla 0
+; DIS-NEXT:   {{0*}}[[#ADDR]]: R_RBA  (idx: 1)      .__tls_get_addr[PR]
+; DIS32-NEXT:                                       lfd 0, 0(3)
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 3, 2, 0
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}                addis 4, 2, 0
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCU (idx: 25) GInit[TE]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}                lwz 3, 16(3)
+; DIS64-NEXT:                                       lfd 0, 0(3)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}                ld 3, 32(4)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOCL (idx: 25) GInit[TE]
+; DIS-NEXT:                                         lfd 1, 0(3)
+; DIS-NEXT:                                         fadd 1, 0, 1
+; DIS32-NEXT:                                       addi 1, 1, 32
+; DIS32-NEXT:                                       lwz 0, 8(1)
+; DIS64-NEXT:                                       addi 1, 1, 48
+; DIS64-NEXT:                                       ld 0, 16(1)
+; DIS-NEXT:                                         mtlr 0
+; DIS-NEXT:                                         blr
 
-; DIS:      Disassembly of section .data:
-; DIS:      00000088  (idx: 9) GInit[RW]:
-; DIS-NEXT:       88: 3f f0 00 00
-; DIS-NEXT:       8c: 00 00 00 00
-; DIS:      00000090  (idx: 11) storesTIInit[DS]:
-; DIS-NEXT:       90: 00 00 00 00
-; DIS-NEXT: 00000090: R_POS (idx: 5) .storesTIInit
-; DIS-NEXT:       94: 00 00 00 a8
-; DIS-NEXT: 00000094: R_POS (idx: 15) TOC[TC0]
-; DIS-NEXT:       98: 00 00 00 00
-; DIS:      0000009c  (idx: 13) loadsTWInit[DS]:
-; DIS-NEXT:       9c: 00 00 00 40
-; DIS-NEXT: 0000009c: R_POS (idx: 7) .loadsTWInit
-; DIS-NEXT:       a0: 00 00 00 a8
-; DIS-NEXT: 000000a0: R_POS (idx: 15) TOC[TC0]
-; DIS-NEXT:       a4: 00 00 00 00
-; DIS:      000000a8  (idx: 17) .TIInit[TE]:
-; DIS-NEXT:       a8: 00 00 00 00
-; DIS-NEXT: 000000a8: R_TLSM (idx: 27) TIInit[TL]
-; DIS:      000000ac  (idx: 19) TIInit[TE]:
-; DIS-NEXT:       ac: 00 00 00 00
-; DIS-NEXT: 000000ac: R_TLS (idx: 27) TIInit[TL]
-; DIS:      000000b0  (idx: 21) .TWInit[TE]:
-; DIS-NEXT:       b0: 00 00 00 00
-; DIS-NEXT: 000000b0: R_TLSM (idx: 29) TWInit[TL]
-; DIS:      000000b4  (idx: 23) TWInit[TE]:
-; DIS-NEXT:       b4: 00 00 00 08
-; DIS-NEXT: 000000b4: R_TLS (idx: 29) TWInit[TL]
-; DIS:      000000b8  (idx: 25) GInit[TE]:
-; DIS-NEXT:       b8: 00 00 00 88
-; DIS-NEXT: 000000b8: R_POS (idx: 9) GInit[RW]
+; DIS:        Disassembly of section .data:
+; DIS:        00000088  (idx: 9) GInit[RW]:
+; DIS-NEXT:         88: 3f f0 00 00
+; DIS-NEXT:         8c: 00 00 00 00
+; DIS:        00000090  (idx: 11) storesTIInit[DS]:
+; DIS-NEXT:         90: 00 00 00 00
+; DIS-NEXT:   00000090: R_POS (idx: 5) .storesTIInit
+; DIS32:            94: 00 00 00 a8
+; DIS32-NEXT: 00000094: R_POS (idx: 15) TOC[TC0]
+; DIS32-NEXT:       98: 00 00 00 00
+; DIS32:      0000009c  (idx: 13) loadsTWInit[DS]:
+; DIS32-NEXT:       9c: 00 00 00 40
+; DIS32-NEXT: 0000009c: R_POS (idx: 7) .loadsTWInit
+; DIS32-NEXT:       a0: 00 00 00 a8
+; DIS32-NEXT: 000000a0: R_POS (idx: 15) TOC[TC0]
+; DIS32-NEXT:       a4: 00 00 00 00
+; DIS32:      000000a8  (idx: 17) .TIInit[TE]:
+; DIS32-NEXT:       a8: 00 00 00 00
+; DIS32-NEXT: 000000a8: R_TLSM (idx: 27) TIInit[TL]
+; DIS32:      000000ac  (idx: 19) TIInit[TE]:
+; DIS32-NEXT:       ac: 00 00 00 00
+; DIS32-NEXT: 000000ac: R_TLS (idx: 27) TIInit[TL]
+; DIS32:      000000b0  (idx: 21) .TWInit[TE]:
+; DIS32-NEXT:       b0: 00 00 00 00
+; DIS32-NEXT: 000000b0: R_TLSM (idx: 29) TWInit[TL]
+; DIS32:      000000b4  (idx: 23) TWInit[TE]:
+; DIS32-NEXT:       b4: 00 00 00 08
+; DIS32-NEXT: 000000b4: R_TLS (idx: 29) TWInit[TL]
+; DIS32:      000000b8  (idx: 25) GInit[TE]:
+; DIS32-NEXT:       b8: 00 00 00 88
+; DIS32-NEXT: 000000b8: R_POS (idx: 9) GInit[RW]
+; DIS64:            94: 00 00 00 00
+; DIS64-NEXT:       98: 00 00 00 00
+; DIS64-NEXT: 00000098: R_POS (idx: 15) TOC[TC0]
+; DIS64-NEXT:       9c: 00 00 00 c0
+; DIS64:      000000a8  (idx: 13) loadsTWInit[DS]:
+; DIS64-NEXT:       a8: 00 00 00 00
+; DIS64-NEXT: 000000a8: R_POS (idx: 7) .loadsTWInit
+; DIS64-NEXT:       ac: 00 00 00 40
+; DIS64-NEXT:       b0: 00 00 00 00
+; DIS64-NEXT: 000000b0: R_POS (idx: 15) TOC[TC0]
+; DIS64-NEXT:       b4: 00 00 00 c0
+; DIS64:      000000c0  (idx: 17) .TIInit[TE]:
+; DIS64-NEXT:       c0: 00 00 00 00
+; DIS64-NEXT: 000000c0: R_TLSM (idx: 27) TIInit[TL]
+; DIS64-NEXT:       c4: 00 00 00 00
+; DIS64:      000000c8  (idx: 19) TIInit[TE]:
+; DIS64-NEXT:       c8: 00 00 00 00
+; DIS64-NEXT: 000000c8: R_TLS (idx: 27) TIInit[TL]
+; DIS64-NEXT:       cc: 00 00 00 00
+; DIS64:      000000d0  (idx: 21) .TWInit[TE]:
+; DIS64-NEXT:       d0: 00 00 00 00
+; DIS64-NEXT: 000000d0: R_TLSM (idx: 29) TWInit[TL]
+; DIS64-NEXT:       d4: 00 00 00 00
+; DIS64:      000000d8  (idx: 23) TWInit[TE]:
+; DIS64-NEXT:       d8: 00 00 00 00
+; DIS64-NEXT: 000000d8: R_TLS (idx: 29) TWInit[TL]
+; DIS64-NEXT:       dc: 00 00 00 08
+; DIS64:      000000e0  (idx: 25) GInit[TE]:
+; DIS64-NEXT:       e0: 00 00 00 00
+; DIS64-NEXT: 000000e0: R_POS (idx: 9) GInit[RW]
+; DIS64-NEXT:       e4: 00 00 00 88
+
 
 ; DIS:      Disassembly of section .tdata:
 ; DIS:      00000000  (idx: 27) TIInit[TL]:
 ; DIS-NEXT:        0: 00 00 00 00
 ; DIS-NEXT:        4: 00 00 00 01
 ; DIS:      00000008  (idx: 29) TWInit[TL]:
 ; DIS-NEXT:        8: 3f f0 00 00
 ; DIS-NEXT:        c: 00 00 00 00
 
 attributes #0 = { nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }
 attributes #1 = { norecurse nounwind readonly willreturn "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }

llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll

 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
 ; RUN:     -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
-; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefix=DIS %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefixes=RELOC,RELOC32 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM32 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefixes=DIS,DIS32 %s
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
+; RUN:     -xcoff-traceback-table=false -data-sections=false -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefixes=RELOC,RELOC64 %s
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefixes=SYM,SYM64 %s
+; RUN: llvm-objdump -D -r --symbol-description %t.o | FileCheck --check-prefixes=DIS,DIS64 %s
 
 @const_ivar = constant i32 6, align 4
 @GInit = global i32 1, align 4
 @TGInit = thread_local global i32 1, align 4
 @TIUninit = internal thread_local global i32 0, align 4
 
 ; Function Attrs: nofree norecurse nounwind willreturn writeonly
 define void @storesTIUninit(i32 %Val) #0 {
 entry:
   store i32 %Val, i32* @TIUninit, align 4
   ret void
 }
 
 ; Function Attrs: norecurse nounwind readonly willreturn
 define i32 @loadsTGInit() #1 {
 entry:
   %0 = load i32, i32* @TGInit, align 4
   %1 = load i32, i32* @GInit, align 4
   %add = add nsw i32 %1, %0
   ret i32 %add
 }
 
-; RELOC:      File: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o
-; RELOC-NEXT: Format: aixcoff-rs6000
-; RELOC-NEXT: Arch: powerpc
-; RELOC-NEXT: AddressSize: 32bit
-; RELOC-NEXT: Relocations [
-; RELOC-NEXT:   Section (index: 1) .text {
-; RELOC-NEXT:   Relocation {
-; RELOC-NEXT:     Virtual Address: 0x12
-; RELOC-NEXT:     Symbol: .TIUninit (23)
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-; RELOC-NEXT:   Symbol: TIUninit (37)
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-; RELOC-NEXT:   Length: 32
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-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0x8C
-; RELOC-NEXT:   Symbol: TIUninit (37)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_TLS (0x20)
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-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0x90
-; RELOC-NEXT:   Symbol: TGInit (35)
-; RELOC-NEXT:   IsSigned: No
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-; RELOC-NEXT:   Length: 32
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-; RELOC-NEXT: Relocation {
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-; RELOC-NEXT:   Symbol: TGInit (35)
-; RELOC-NEXT:   IsSigned: No
-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_TLS (0x20)
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-; RELOC-NEXT: Relocation {
-; RELOC-NEXT:   Virtual Address: 0x98
-; RELOC-NEXT:   Symbol: GInit (15)
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-; RELOC-NEXT:   FixupBitValue: 0
-; RELOC-NEXT:   Length: 32
-; RELOC-NEXT:   Type: R_POS (0x0)
-; RELOC-NEXT: }
-; RELOC-NEXT: }
-; RELOC-NEXT: ]
+; RELOC:        File: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o
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+; RELOC32-NEXT: AddressSize: 32bit
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+; RELOC64-NEXT: Arch: powerpc64
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+; RELOC-NEXT:       Relocation {
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+; RELOC-NEXT:         Symbol: .storesTIUninit (5)
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+; RELOC-NEXT:       Relocation {
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+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
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+; RELOC-NEXT:       Relocation {
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+; RELOC64-NEXT:       Virtual Address: 0x88
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+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
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+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x80
+; RELOC64-NEXT:       Virtual Address: 0x90
+; RELOC-NEXT:         Symbol: TOC (21)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
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+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x88
+; RELOC64-NEXT:       Virtual Address: 0xA0
+; RELOC-NEXT:         Symbol: TIUninit (37)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLSM (0x24)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x8C
+; RELOC64-NEXT:       Virtual Address: 0xA8
+; RELOC-NEXT:         Symbol: TIUninit (37)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLS (0x20)
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+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x90
+; RELOC64-NEXT:       Virtual Address: 0xB0
+; RELOC-NEXT:         Symbol: TGInit (35)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLSM (0x24)
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+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x94
+; RELOC64-NEXT:       Virtual Address: 0xB8
+; RELOC-NEXT:         Symbol: TGInit (35)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_TLS (0x20)
+; RELOC-NEXT:       }
+; RELOC-NEXT:       Relocation {
+; RELOC32-NEXT:       Virtual Address: 0x98
+; RELOC64-NEXT:       Virtual Address: 0xC0
+; RELOC-NEXT:         Symbol: GInit (15)
+; RELOC-NEXT:         IsSigned: No
+; RELOC-NEXT:         FixupBitValue: 0
+; RELOC32-NEXT:       Length: 32
+; RELOC64-NEXT:       Length: 64
+; RELOC-NEXT:         Type: R_POS (0x0)
+; RELOC-NEXT:       }
+; RELOC-NEXT:     }
+; RELOC-NEXT:   ]
 
-; SYM:      File: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o
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-; SYM-NEXT:       SectionLen: 0
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TC0 (0xF)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
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-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 23
-; SYM-NEXT:     Name: .TIUninit
-; SYM-NEXT:     Value (RelocatableAddress): 0x88
-; SYM-NEXT:     Section: .data
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 24
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 25
-; SYM-NEXT:     Name: TIUninit
-; SYM-NEXT:     Value (RelocatableAddress): 0x8C
-; SYM-NEXT:     Section: .data
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 26
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 27
-; SYM-NEXT:     Name: .TGInit
-; SYM-NEXT:     Value (RelocatableAddress): 0x90
-; SYM-NEXT:     Section: .data
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 28
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 29
-; SYM-NEXT:     Name: TGInit
-; SYM-NEXT:     Value (RelocatableAddress): 0x94
-; SYM-NEXT:     Section: .data
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 30
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 31
-; SYM-NEXT:     Name: GInit
-; SYM-NEXT:     Value (RelocatableAddress): 0x98
-; SYM-NEXT:     Section: .data
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 32
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 33
-; SYM-NEXT:     Name: .tdata
-; SYM-NEXT:     Value (RelocatableAddress): 0x0
-; SYM-NEXT:     Section: .tdata
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 34
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_SD (0x1)
-; SYM-NEXT:       StorageMappingClass: XMC_TL (0x14)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 35
-; SYM-NEXT:     Name: TGInit
-; SYM-NEXT:     Value (RelocatableAddress): 0x0
-; SYM-NEXT:     Section: .tdata
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_EXT (0x2)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 36
-; SYM-NEXT:       ContainingCsectSymbolIndex: 33
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 0
-; SYM-NEXT:       SymbolType: XTY_LD (0x2)
-; SYM-NEXT:       StorageMappingClass: XMC_TL (0x14)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT:   Symbol {
-; SYM-NEXT:     Index: 37
-; SYM-NEXT:     Name: TIUninit
-; SYM-NEXT:     Value (RelocatableAddress): 0x4
-; SYM-NEXT:     Section: .tbss
-; SYM-NEXT:     Type: 0x0
-; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
-; SYM-NEXT:     NumberOfAuxEntries: 1
-; SYM-NEXT:     CSECT Auxiliary Entry {
-; SYM-NEXT:       Index: 38
-; SYM-NEXT:       SectionLen: 4
-; SYM-NEXT:       ParameterHashIndex: 0x0
-; SYM-NEXT:       TypeChkSectNum: 0x0
-; SYM-NEXT:       SymbolAlignmentLog2: 2
-; SYM-NEXT:       SymbolType: XTY_CM (0x3)
-; SYM-NEXT:       StorageMappingClass: XMC_UL (0x15)
-; SYM-NEXT:       StabInfoIndex: 0x0
-; SYM-NEXT:       StabSectNum: 0x0
-; SYM-NEXT:     }
-; SYM-NEXT:   }
-; SYM-NEXT: ]
+; SYM:        File: {{.*}}aix-tls-xcoff-reloc.ll.tmp.o
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+; SYM32-NEXT: Arch: powerpc
+; SYM32-NEXT: AddressSize: 32bit
+; SYM64-NEXT: Format: aix5coff64-rs6000
+; SYM64-NEXT: Arch: powerpc64
+; SYM64-NEXT: AddressSize: 64bit
+; SYM-NEXT:   Symbols [
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 0
+; SYM-NEXT:       Name: .file
+; SYM-NEXT:       Value (SymbolTableIndex): 0x0
+; SYM-NEXT:       Section: N_DEBUG
+; SYM-NEXT:       Source Language ID: TB_C (0x0)
+; SYM-NEXT:       CPU Version ID: 0x0
+; SYM-NEXT:       StorageClass: C_FILE (0x67)
+; SYM-NEXT:       NumberOfAuxEntries: 0
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Name: .__tls_get_addr
+; SYM-NEXT:       Value (RelocatableAddress): 0x0
+; SYM-NEXT:       Section: N_UNDEF
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 2
+; SYM-NEXT:         SectionLen: 0
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 0
+; SYM-NEXT:         SymbolType: XTY_ER (0x0)
+; SYM-NEXT:         StorageMappingClass: XMC_PR (0x0)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Name: .text
+; SYM-NEXT:       Value (RelocatableAddress): 0x0
+; SYM-NEXT:       Section: .text
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 4
+; SYM-NEXT:         SectionLen: 104
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 4
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_PR (0x0)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 5
+; SYM-NEXT:       Name: .storesTIUninit
+; SYM-NEXT:       Value (RelocatableAddress): 0x0
+; SYM-NEXT:       Section: .text
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 6
+; SYM-NEXT:         ContainingCsectSymbolIndex: 3
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 0
+; SYM-NEXT:         SymbolType: XTY_LD (0x2)
+; SYM-NEXT:         StorageMappingClass: XMC_PR (0x0)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 7
+; SYM-NEXT:       Name: .loadsTGInit
+; SYM-NEXT:       Value (RelocatableAddress): 0x30
+; SYM-NEXT:       Section: .text
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 8
+; SYM-NEXT:         ContainingCsectSymbolIndex: 3
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 0
+; SYM-NEXT:         SymbolType: XTY_LD (0x2)
+; SYM-NEXT:         StorageMappingClass: XMC_PR (0x0)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Value (RelocatableAddress): 0x68
+; SYM-NEXT:       Section: .text
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 10
+; SYM-NEXT:         SectionLen: 4
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 2
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_RO (0x1)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Name: const_ivar
+; SYM-NEXT:       Value (RelocatableAddress): 0x68
+; SYM-NEXT:       Section: .text
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 12
+; SYM-NEXT:         ContainingCsectSymbolIndex: 9
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 0
+; SYM-NEXT:         SymbolType: XTY_LD (0x2)
+; SYM-NEXT:         StorageMappingClass: XMC_RO (0x1)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 13
+; SYM-NEXT:       Name: .data
+; SYM-NEXT:       Value (RelocatableAddress): 0x6C
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 14
+; SYM-NEXT:         SectionLen: 4
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 2
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_RW (0x5)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Name: GInit
+; SYM-NEXT:       Value (RelocatableAddress): 0x6C
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 16
+; SYM-NEXT:         ContainingCsectSymbolIndex: 13
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
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+; SYM-NEXT:         SymbolType: XTY_LD (0x2)
+; SYM-NEXT:         StorageMappingClass: XMC_RW (0x5)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 17
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+; SYM-NEXT:       Value (RelocatableAddress): 0x70
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 18
+; SYM32-NEXT:       SectionLen: 12
+; SYM64-NEXT:       SectionLen: 24
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_DS (0xA)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
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+; SYM-NEXT:     Symbol {
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+; SYM64-NEXT:     Value (RelocatableAddress): 0x88
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
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+; SYM32-NEXT:       SectionLen: 12
+; SYM64-NEXT:       SectionLen: 24
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_DS (0xA)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
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+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
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+; SYM64-NEXT:     Value (RelocatableAddress): 0xA0
+; SYM-NEXT:       Section: .data
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+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
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+; SYM-NEXT:         TypeChkSectNum: 0x0
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+; SYM-NEXT:         StorageMappingClass: XMC_TC0 (0xF)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
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+; SYM-NEXT:     Symbol {
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+; SYM64-NEXT:     Value (RelocatableAddress): 0xA0
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
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+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TC (0x3)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
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+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Name: TIUninit
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+; SYM64-NEXT:     Value (RelocatableAddress): 0xA8
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
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+; SYM-NEXT:       CSECT Auxiliary Entry {
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+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
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+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
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+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
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+; SYM-NEXT:     Symbol {
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+; SYM-NEXT:       Name: .TGInit
+; SYM32-NEXT:     Value (RelocatableAddress): 0x90
+; SYM64-NEXT:     Value (RelocatableAddress): 0xB0
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 28
+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TC (0x3)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 29
+; SYM-NEXT:       Name: TGInit
+; SYM32-NEXT:     Value (RelocatableAddress): 0x94
+; SYM64-NEXT:     Value (RelocatableAddress): 0xB8
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 30
+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TC (0x3)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 31
+; SYM-NEXT:       Name: GInit
+; SYM32-NEXT:     Value (RelocatableAddress): 0x98
+; SYM64-NEXT:     Value (RelocatableAddress): 0xC0
+; SYM-NEXT:       Section: .data
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 32
+; SYM32-NEXT:       SectionLen: 4
+; SYM64-NEXT:       SectionLen: 8
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM32-NEXT:       SymbolAlignmentLog2: 2
+; SYM64-NEXT:       SymbolAlignmentLog2: 3
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TC (0x3)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 33
+; SYM-NEXT:       Name: .tdata
+; SYM-NEXT:       Value (RelocatableAddress): 0x0
+; SYM-NEXT:       Section: .tdata
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 34
+; SYM-NEXT:         SectionLen: 4
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 2
+; SYM-NEXT:         SymbolType: XTY_SD (0x1)
+; SYM-NEXT:         StorageMappingClass: XMC_TL (0x14)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 35
+; SYM-NEXT:       Name: TGInit
+; SYM-NEXT:       Value (RelocatableAddress): 0x0
+; SYM-NEXT:       Section: .tdata
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_EXT (0x2)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 36
+; SYM-NEXT:         ContainingCsectSymbolIndex: 33
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 0
+; SYM-NEXT:         SymbolType: XTY_LD (0x2)
+; SYM-NEXT:         StorageMappingClass: XMC_TL (0x14)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:     Symbol {
+; SYM-NEXT:       Index: 37
+; SYM-NEXT:       Name: TIUninit
+; SYM-NEXT:       Value (RelocatableAddress): 0x4
+; SYM-NEXT:       Section: .tbss
+; SYM-NEXT:       Type: 0x0
+; SYM-NEXT:       StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:       NumberOfAuxEntries: 1
+; SYM-NEXT:       CSECT Auxiliary Entry {
+; SYM-NEXT:         Index: 38
+; SYM-NEXT:         SectionLen: 4
+; SYM-NEXT:         ParameterHashIndex: 0x0
+; SYM-NEXT:         TypeChkSectNum: 0x0
+; SYM-NEXT:         SymbolAlignmentLog2: 2
+; SYM-NEXT:         SymbolType: XTY_CM (0x3)
+; SYM-NEXT:         StorageMappingClass: XMC_UL (0x15)
+; SYM32-NEXT:       StabInfoIndex: 0x0
+; SYM32-NEXT:       StabSectNum: 0x0
+; SYM64-NEXT:       Auxiliary Type: AUX_CSECT (0xFB)
+; SYM-NEXT:       }
+; SYM-NEXT:     }
+; SYM-NEXT:   ]
 
-; DIS:      {{.*}}aix-tls-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
-; DIS:      Disassembly of section .text:
-; DIS:      00000000 (idx: 5) .storesTIUninit:
-; DIS-NEXT:                                      mflr 0
-; DIS-NEXT:                                      stw 0, 8(1)
-; DIS-NEXT:                                      stwu 1, -32(1)
-; DIS-NEXT:                                      mr 6, 3
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 3, 0(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) .TIUninit[TC]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 4, 4(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 25) TIUninit[TC]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1)      .__tls_get_addr[PR]
-; DIS-NEXT:                                      stw 6, 0(3)
-; DIS-NEXT:                                      addi 1, 1, 32
-; DIS-NEXT:                                      lwz 0, 8(1)
-; DIS-NEXT:                                      mtlr 0
-; DIS-NEXT:                                      blr
-; DIS:      00000030 (idx: 7) .loadsTGInit:
-; DIS-NEXT:                                      mflr 0
-; DIS-NEXT:                                      stw 0, 8(1)
-; DIS-NEXT:                                      stwu 1, -32(1)
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 3, 8(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 27) .TGInit[TC]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 4, 12(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 29) TGInit[TC]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               bla 0
-; DIS-NEXT: {{0*}}[[#ADDR]]: R_RBA (idx: 1)      .__tls_get_addr[PR]
-; DIS-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 4, 16(2)
-; DIS-NEXT: {{0*}}[[#ADDR + 2]]: R_TOC (idx: 31) GInit[TC]
-; DIS-NEXT:                                      lwz 3, 0(3)
-; DIS-NEXT:                                      lwz 4, 0(4)
-; DIS-NEXT:                                      add 3, 4, 3
-; DIS-NEXT:                                      addi 1, 1, 32
-; DIS-NEXT:                                      lwz 0, 8(1)
-; DIS-NEXT:                                      mtlr 0
-; DIS-NEXT:                                      blr
-; DIS:      00000068 (idx: 11) const_ivar:
-; DIS-NEXT:       68: 00 00 00 06
+; DIS32:      {{.*}}aix-tls-xcoff-reloc.ll.tmp.o: file format aixcoff-rs6000
+; DIS64:      {{.*}}aix-tls-xcoff-reloc.ll.tmp.o: file format aix5coff64-rs6000
+; DIS:        Disassembly of section .text:
+; DIS:        00000000 (idx: 5) .storesTIUninit:
+; DIS-NEXT:                                        mflr 0
+; DIS32-NEXT:                                      stw 0, 8(1)
+; DIS32-NEXT:                                      stwu 1, -32(1)
+; DIS64-NEXT:                                      std 0, 16(1)
+; DIS64-NEXT:                                      stdu 1, -48(1)
+; DIS-NEXT:                                        mr 6, 3
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 3, 0(2)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}               ld 3, 0(2)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOC (idx: 23) .TIUninit[TC]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 4, 4(2)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}               ld 4, 8(2)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOC (idx: 25) TIUninit[TC]
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}               bla 0
+; DIS-NEXT:   {{0*}}[[#ADDR]]: R_RBA (idx: 1)      .__tls_get_addr[PR]
+; DIS-NEXT:                                        stw 6, 0(3)
+; DIS32-NEXT:                                      addi 1, 1, 32
+; DIS32-NEXT:                                      lwz 0, 8(1)
+; DIS64-NEXT:                                      addi 1, 1, 48
+; DIS64-NEXT:                                      ld 0, 16(1)
+; DIS-NEXT:                                        mtlr 0
+; DIS-NEXT:                                        blr
+; DIS:        00000030 (idx: 7) .loadsTGInit:
+; DIS-NEXT:                                        mflr 0
+; DIS32-NEXT:                                      stw 0, 8(1)
+; DIS32-NEXT:                                      stwu 1, -32(1)
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 3, 8(2)
+; DIS64-NEXT:                                      std 0, 16(1)
+; DIS64-NEXT:                                      stdu 1, -48(1)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}               ld 3, 16(2)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOC (idx: 27) .TGInit[TC]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 4, 12(2)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}               ld 4, 24(2)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOC (idx: 29) TGInit[TC]
+; DIS-NEXT:   [[#%x, ADDR:]]: {{.*}}               bla 0
+; DIS-NEXT:   {{0*}}[[#ADDR]]: R_RBA (idx: 1)      .__tls_get_addr[PR]
+; DIS32-NEXT: [[#%x, ADDR:]]: {{.*}}               lwz 4, 16(2)
+; DIS64-NEXT: [[#%x, ADDR:]]: {{.*}}               ld 4, 32(2)
+; DIS-NEXT:   {{0*}}[[#ADDR + 2]]: R_TOC (idx: 31) GInit[TC]
+; DIS-NEXT:                                        lwz 3, 0(3)
+; DIS-NEXT:                                        lwz 4, 0(4)
+; DIS-NEXT:                                        add 3, 4, 3
+; DIS32-NEXT:                                      addi 1, 1, 32
+; DIS32-NEXT:                                      lwz 0, 8(1)
+; DIS64-NEXT:                                      addi 1, 1, 48
+; DIS64-NEXT:                                      ld 0, 16(1)
+; DIS-NEXT:                                        mtlr 0
+; DIS-NEXT:                                        blr
+; DIS:        00000068 (idx: 11) const_ivar:
+; DIS-NEXT:         68: 00 00 00 06
 
-; DIS:      Disassembly of section .data:
-; DIS:      0000006c  (idx: 15) GInit:
-; DIS-NEXT:       6c: 00 00 00 01
-; DIS:      00000070  (idx: 17) storesTIUninit[DS]:
-; DIS-NEXT:       70: 00 00 00 00
-; DIS-NEXT: 00000070: R_POS (idx: 5) .storesTIUninit
-; DIS-NEXT:       74: 00 00 00 88
-; DIS-NEXT: 00000074: R_POS (idx: 21) TOC[TC0]
-; DIS-NEXT:       78: 00 00 00 00
-; DIS:      0000007c  (idx: 19) loadsTGInit[DS]:
-; DIS-NEXT:       7c: 00 00 00 30
-; DIS-NEXT: 0000007c: R_POS (idx: 7) .loadsTGInit
-; DIS-NEXT:       80: 00 00 00 88
-; DIS-NEXT: 00000080: R_POS (idx: 21) TOC[TC0]
-; DIS-NEXT:       84: 00 00 00 00
-; DIS:      00000088  (idx: 23) .TIUninit[TC]:
-; DIS-NEXT:       88: 00 00 00 00
-; DIS-NEXT: 00000088: R_TLSM (idx: 37) TIUninit[UL]
-; DIS:      0000008c  (idx: 25) TIUninit[TC]:
-; DIS-NEXT:       8c: 00 00 00 04
-; DIS-NEXT: 0000008c: R_TLS (idx: 37) TIUninit[UL]
-; DIS:      00000090  (idx: 27) .TGInit[TC]:
-; DIS-NEXT:       90: 00 00 00 00
-; DIS-NEXT: 00000090: R_TLSM (idx: 35) TGInit
-; DIS:      00000094  (idx: 29) TGInit[TC]:
-; DIS-NEXT:       94: 00 00 00 00
-; DIS-NEXT: 00000094: R_TLS (idx: 35) TGInit
-; DIS:      00000098  (idx: 31) GInit[TC]:
-; DIS-NEXT:       98: 00 00 00 6c
-; DIS-NEXT: 00000098: R_POS (idx: 15) GInit
+; DIS:        Disassembly of section .data:
+; DIS:        0000006c  (idx: 15) GInit:
+; DIS-NEXT:         6c: 00 00 00 01
+; DIS:        00000070  (idx: 17) storesTIUninit[DS]:
+; DIS-NEXT:         70: 00 00 00 00
+; DIS-NEXT:   00000070: R_POS (idx: 5) .storesTIUninit
+; DIS32-NEXT:       74: 00 00 00 88
+; DIS32-NEXT: 00000074: R_POS (idx: 21) TOC[TC0]
+; DIS32-NEXT:       78: 00 00 00 00
+; DIS32:      0000007c  (idx: 19) loadsTGInit[DS]:
+; DIS32-NEXT:       7c: 00 00 00 30
+; DIS32-NEXT: 0000007c: R_POS (idx: 7) .loadsTGInit
+; DIS32-NEXT:       80: 00 00 00 88
+; DIS32-NEXT: 00000080: R_POS (idx: 21) TOC[TC0]
+; DIS32-NEXT:       84: 00 00 00 00
+; DIS32:      00000088  (idx: 23) .TIUninit[TC]:
+; DIS32-NEXT:       88: 00 00 00 00
+; DIS32-NEXT: 00000088: R_TLSM (idx: 37) TIUninit[UL]
+; DIS32:      0000008c  (idx: 25) TIUninit[TC]:
+; DIS32-NEXT:       8c: 00 00 00 04
+; DIS32-NEXT: 0000008c: R_TLS (idx: 37) TIUninit[UL]
+; DIS32:      00000090  (idx: 27) .TGInit[TC]:
+; DIS32-NEXT:       90: 00 00 00 00
+; DIS32-NEXT: 00000090: R_TLSM (idx: 35) TGInit
+; DIS32:      00000094  (idx: 29) TGInit[TC]:
+; DIS32-NEXT:       94: 00 00 00 00
+; DIS32-NEXT: 00000094: R_TLS (idx: 35) TGInit
+; DIS32:      00000098  (idx: 31) GInit[TC]:
+; DIS32-NEXT:       98: 00 00 00 6c
+; DIS32-NEXT: 00000098: R_POS (idx: 15) GInit
+; DIS64-NEXT:       74: 00 00 00 00
+; DIS64-NEXT:       78: 00 00 00 00
+; DIS64-NEXT: 00000078: R_POS (idx: 21) TOC[TC0]
+; DIS64-NEXT:       7c: 00 00 00 a0
+; DIS64:      00000088  (idx: 19) loadsTGInit[DS]:
+; DIS64-NEXT:       88: 00 00 00 00
+; DIS64-NEXT: 00000088: R_POS (idx: 7) .loadsTGInit
+; DIS64-NEXT:       8c: 00 00 00 30
+; DIS64-NEXT:       90: 00 00 00 00
+; DIS64-NEXT: 00000090: R_POS (idx: 21) TOC[TC0]
+; DIS64-NEXT:       94: 00 00 00 a0
+; DIS64:      000000a0  (idx: 23) .TIUninit[TC]:
+; DIS64-NEXT:       a0: 00 00 00 00
+; DIS64-NEXT: 000000a0: R_TLSM (idx: 37) TIUninit[UL]
+; DIS64-NEXT:       a4: 00 00 00 00
+; DIS64:      000000a8  (idx: 25) TIUninit[TC]:
+; DIS64-NEXT:       a8: 00 00 00 00
+; DIS64-NEXT: 000000a8: R_TLS (idx: 37) TIUninit[UL]
+; DIS64-NEXT:       ac: 00 00 00 04
+; DIS64:      000000b0  (idx: 27) .TGInit[TC]:
+; DIS64-NEXT:       b0: 00 00 00 00
+; DIS64-NEXT: 000000b0: R_TLSM (idx: 35) TGInit
+; DIS64-NEXT:       b4: 00 00 00 00
+; DIS64:      000000b8  (idx: 29) TGInit[TC]:
+; DIS64-NEXT:       b8: 00 00 00 00
+; DIS64-NEXT: 000000b8: R_TLS (idx: 35) TGInit
+; DIS64-NEXT:       bc: 00 00 00 00
+; DIS64:      000000c0  (idx: 31) GInit[TC]:
+; DIS64-NEXT:       c0: 00 00 00 00
+; DIS64-NEXT: 000000c0: R_POS (idx: 15) GInit
+; DIS64-NEXT:       c4: 00 00 00 6c
 
 ; DIS:      Disassembly of section .tdata:
 ; DIS:      00000000 (idx: 35) TGInit:
 ; DIS-NEXT:        0: 00 00 00 01
 
 ; DIS:      Disassembly of section .tbss:
 ; DIS:      00000004 (idx: 37) TIUninit[UL]:
 ; DIS-NEXT: ...
 
 attributes #0 = { nofree norecurse nounwind willreturn writeonly "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }
 attributes #1 = { norecurse nounwind readonly willreturn "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pwr4" "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-float128,-htm,-mma,-paired-vector-memops,-power10-vector,-power8-vector,-power9-vector,-rop-protection,-spe,-vsx" }