[X86] Canonicalize SGT/UGT compares with constants to use SGE/UGE to reduce the number of EFLAGs reads. (PR48760)

[RKSimon]

Summary

This demonstrates a possible fix for PR48760 - for compares with constants, canonicalize the SGT/UGT condition code to use SGE/UGE which should reduce the number of EFLAGs bits we need to read.

As discussed on PR48760, some EFLAG bits are treated independently which can require additional uops to merge together for certain CMOVcc/SETcc/etc. modes.

I've limited this to cases where the constant increment doesn't result in a larger encoding or additional i64 constant materializations.

[RKSimon]

Address the atomic flags regressions by implementing a similar CC tweak in combineSetCCAtomicArith - I'm happy to pull the atomic change out into another patch although not all paths would be tested until this patch had landed.

[RKSimon]

rebase

[RKSimon]

ping?

[lebedev.ri]

Some thoughts.

Some min/max-like patterns lose out because the comparison constant is now different from the select value - do we have any opinions on how critical this is?

This does seem not ideal. Can we even check that the cmp has a select with such an operand by now?

llvm/lib/Target/X86/X86ISelLowering.cpp

23462–23463

Why do we handle inverse case of decrementing in combineSetCCAtomicArith() but not here?

23465–23470

This comment reads as-if it's about the previous condition.
I'd suggest adding something like "note that we can't change GT to GE for tautological comparisons,
where incrementing the limit would cause an overflow" before if (!Op1Val.isNullValue() &&

llvm/test/CodeGen/X86/sdiv_fix_sat.ll

474–480

This is the clamp regression i guess?

632–633

same elesewhere in the file

[craig.topper]

In D101074#2722222, @lebedev.ri wrote:

Some thoughts.

Some min/max-like patterns lose out because the comparison constant is now different from the select value - do we have any opinions on how critical this is?

This does seem not ideal. Can we even check that the cmp has a select with such an operand by now?

Can we fix that in combineSelect where we canonicalize min/max patterns to use sign flag?

[RKSimon]

Add SETLT/SETULT handling

[lebedev.ri]

In D101074#2819404, @RKSimon wrote:

Add SETLT/SETULT handling

Thanks.
I think this looks ok to me.
What about the regressions?

llvm/lib/Target/X86/X86ISelLowering.cpp

42074

APInt::isMinValue()?

[pengfei]

llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll

601–602

Is it possible that we happen to exceed IMM16?

[RKSimon]

Use APInt::isMinValue() for consistency

Added fold for select(seteq(X,Y),A,select(setgt(X,Y), A, B)) -> select(setge(X,Y), A, B) folds for SETCC after type legalization - this could be added separately if required.

This just leaves a few regressions where we create 2 64-bit constants instead of 1

[RKSimon]

llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll

601–602

No - we check for min/max values before decrementing/incrementing to ensure we don't wrap the value.

[RKSimon]

llvm/test/CodeGen/X86/ctpop-combine.ll

45

Regression - we go from a CF read to CF+ZF reads - it looks in most cases the LT->LE conversions are going to cause this - I think I'm going to just handle the GT->GE cases initially.

[RKSimon]

The equivalent less-than fold to reduce EFLAGS dependency is SLE/ULE -> SLT/ULT - which we don't typically need to do because TargetLowering.SimplifySetCC already canonicalizes to that - sorry I was on automatic when was asked to support SLT/ULT (and it'd been far too long since I looked at the patch...)

[pengfei]

llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll

601–602

I just saw you check int8 and int32. But I cannot create a case for the int16 boundary value due to its promoted to int32.

[RKSimon]

llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll

601–602

Yes i8 and i32 immediates are special cases because the width of the immediate might not match the width of the operand type - but if we're using an i16 immediate on i32/i64 it will always be extended to i32 immediate.

[RKSimon]

Remove the unnecessary SLT/ULT handling + avoid the remaining i64 immediate comparison regressions.

[RKSimon]

llvm/lib/Target/X86/X86ISelLowering.cpp

41898

This can be pushed first which should give us most of the sdiv_fix_sat.ll + udiv_fix_sat.ll codegen improvements

[craig.topper]

llvm/lib/Target/X86/X86ISelLowering.cpp

23472

Should this be inside emitFlagsForSetcc? That way setcc+brcond works. LowerBRCOND doesn't call LowerSETCC.

[RKSimon]

llvm/lib/Target/X86/X86ISelLowering.cpp

23472

Yes, I was hoping to move it inside TranslateX86CC later (see TODO) - as it felt like this caused far too many diffs as an initial patch - I'll can try again now that the SLT/ULT handling has been dropped.

[RKSimon]

llvm/lib/Target/X86/X86ISelLowering.cpp

23472

Yes there's a huge amount of test case churn that I'd prefer to do as a follow up patch for review - and just stick with the TODO while we handle the select/cmov cases first.

[craig.topper]

llvm/lib/Target/X86/X86ISelLowering.cpp

23472

Ok.

[RKSimon]

Does anyone have any more comments?

[lebedev.ri]

What about the case where the active bit width decreases, e.g. -129 is i9, incremented it is -128, which is i8.

llvm/test/CodeGen/X86/sdiv_fix_sat.ll

474–480

And it's still here. Do we believe that the addition materialization cost is hidden
by the cmp improvement?
Can't we not do this if the SETCC is used by a SELECT with one hand matching the unchanged immediate?

[RKSimon]

rebase and permit reduction from i32 to i8 immediate encoding

[lebedev.ri]

llvm/lib/Target/X86/X86ISelLowering.cpp

23476

Comment maybe needs updatind.

23486–23487

I've spent way too much time trying to understand this block,
which means this is too compilcated and may or may not be incorrect.
I would suggest something like

if(Op1ValPlusOne.isSignedIntN(32) && (!Op1Val.isSignedIntN(8) || Op1ValPlusOne.isSignedIntN(8))

(isSignedIntN(N+1) guarantees that isSignedIntN(N))

[lebedev.ri]

llvm/lib/Target/X86/X86ISelLowering.cpp

23481

Actually, what about: -2147483649 is i33, incremented it is -2147483648, i32.

[RKSimon]

Cleaned up the isSignedIntN logic

[RKSimon]

llvm/lib/Target/X86/X86ISelLowering.cpp

23481

Sorry - missed this when I was getting back to speed - I'll add a test

[RKSimon]

rebase with the sgt i33 -> sge i32 test

[lebedev.ri]

LGTM, thank you, sorry for so many back and forth here.
Any other comments?

llvm/lib/Target/X86/X86ISelLowering.cpp

23476

Still needs updating

[spatel]

llvm/lib/Target/X86/X86ISelLowering.cpp

23473

I didn't make the connection from SGT -> SGE to SETG -> SETGE to ZF/OF/SF or SETA -> SETAE to ZF/CF and then to an actual perf difference until re-reading the comments in PR48760 and opening the x86 manual...and I'm still not entirely clear about it. :) This deserves more explanation in the code comment.

Maybe something like:
The "GE" conditions map to less EFLAGS bits than their "GT" counterparts. Specifically, the GE conditions don't read the ZF. This may translate to less uops depending on uarch implementation.

llvm/lib/Target/X86/X86ISelLowering.cpp

 
   // Handle f128 first, since one possible outcome is a normal integer
   // comparison which gets handled by emitFlagsForSetcc.
   if (Op0.getValueType() == MVT::f128) {
     softenSetCCOperands(DAG, MVT::f128, Op0, Op1, CC, dl, Op0, Op1, Chain,
                         Op.getOpcode() == ISD::STRICT_FSETCCS);
 
     // If softenSetCCOperands returned a scalar, use it.
     if (!Op1.getNode()) {
       assert(Op0.getValueType() == Op.getValueType() &&
              "Unexpected setcc expansion!");
       if (IsStrict)
         return DAG.getMergeValues({Op0, Chain}, dl);
       return Op0;
     }
   }
 
   if (Op0.getSimpleValueType().isInteger()) {
+    // Attempt to canonicalize SGT/UGT or SLT/ULT compares with constants to use
+    // SGE/UGE or SLE/ULE instead - which reduces the number of EFLAGs reads.
+    // NOTE: Only do this if incrementing the constant doesn't increase the bit
+    // encoding size - so it must stay either an i8 or i32 immediate.
+    // TODO: Can we move this to TranslateX86CC to handle jumps/branches too?
+    if (auto *Op1C = dyn_cast<ConstantSDNode>(Op1)) {
+      const APInt &Op1Val = Op1C->getAPIntValue();
+      if (!Op1Val.isNullValue()) {
+        // Ensure the constant +/-1 doesn't overflow.
+        if ((CC == ISD::CondCode::SETGT && !Op1Val.isMaxSignedValue()) ||
+            (CC == ISD::CondCode::SETUGT && !Op1Val.isMaxValue())) {
+          APInt Op1ValPlusOne = Op1Val + 1;
+          if ((Op1Val.isSignedIntN(8) == Op1ValPlusOne.isSignedIntN(8)) &&
+              (Op1Val.isSignedIntN(32) == Op1ValPlusOne.isSignedIntN(32))) {
+            Op1 = DAG.getConstant(Op1ValPlusOne, dl, Op0.getValueType());
+            CC = CC == ISD::CondCode::SETGT ? ISD::CondCode::SETGE
+                                            : ISD::CondCode::SETUGE;
+          }
+        } else if ((CC == ISD::CondCode::SETLT && !Op1Val.isMinSignedValue()) ||
+                   (CC == ISD::CondCode::SETULT && !Op1Val.isMinValue())) {
+          APInt Op1ValMinusOne = Op1Val - 1;
+          if ((Op1Val.isSignedIntN(8) == Op1ValMinusOne.isSignedIntN(8)) &&
+              (Op1Val.isSignedIntN(32) == Op1ValMinusOne.isSignedIntN(32))) {
+            Op1 = DAG.getConstant(Op1ValMinusOne, dl, Op0.getValueType());
+            CC = CC == ISD::CondCode::SETLT ? ISD::CondCode::SETLE
+                                            : ISD::CondCode::SETULE;
+          }
+        }
+      }
+    }
+
     SDValue X86CC;
     SDValue EFLAGS = emitFlagsForSetcc(Op0, Op1, CC, dl, DAG, X86CC);
     SDValue Res = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, X86CC, EFLAGS);
     return IsStrict ? DAG.getMergeValues({Res, Chain}, dl) : Res;
   }
 
   // Handle floating point.
   X86::CondCode CondCode = TranslateX86CC(CC, dl, /*IsFP*/ true, Op0, Op1, DAG);

         return DAG.getSelect(DL, VT, Cond, LHS, RHS);
       }
       if (CC == ISD::SETUGT && isOneConstant(RHS)) {
         ISD::CondCode NewCC = ISD::SETUGE;
         Cond = DAG.getSetCC(SDLoc(Cond), CondVT, Cond0, Cond1, NewCC);
         return DAG.getSelect(DL, VT, Cond, LHS, RHS);
       }
     }
+
+    // Similar to DAGCombine's select(or(CC0,CC1),X,Y) fold but for legal types.
+    // fold eq + gt/lt nested selects into ge/le selects
+    // select (cmpeq Cond0, Cond1), LHS, (select (cmpugt Cond0, Cond1), LHS, Y)
+    // --> (select (cmpuge Cond0, Cond1), LHS, Y)
+    // select (cmpslt Cond0, Cond1), LHS, (select (cmpeq Cond0, Cond1), LHS, Y)
+    // --> (select (cmpsle Cond0, Cond1), LHS, Y)
+    // .. etc ..
+    // TODO: Generalize this further to cover more permutations/commutations.
+    if (RHS.getOpcode() == ISD::SELECT && RHS.getOperand(1) == LHS &&
+        RHS.getOperand(0).getOpcode() == ISD::SETCC) {
+      SDValue InnerSetCC = RHS.getOperand(0);
+      ISD::CondCode InnerCC =
+          cast<CondCodeSDNode>(InnerSetCC.getOperand(2))->get();
+      if ((CC == ISD::SETEQ || InnerCC == ISD::SETEQ) &&
+          Cond0 == InnerSetCC.getOperand(0) &&
+          Cond1 == InnerSetCC.getOperand(1)) {
+        ISD::CondCode NewCC;
+        switch (CC == ISD::SETEQ ? InnerCC : CC) {
+        case ISD::SETGT:  NewCC = ISD::SETGE; break;
+        case ISD::SETLT:  NewCC = ISD::SETLE; break;
+        case ISD::SETUGT: NewCC = ISD::SETUGE; break;
+        case ISD::SETULT: NewCC = ISD::SETULE; break;
+        default: NewCC = ISD::SETCC_INVALID; break;
+        }
+        if (NewCC != ISD::SETCC_INVALID) {
+          Cond = DAG.getSetCC(DL, CondVT, Cond0, Cond1, NewCC);
+          return DAG.getSelect(DL, VT, Cond, LHS, RHS.getOperand(2));
+        }
+      }
+    }
   }
 
   // Check if the first operand is all zeros and Cond type is vXi1.
   // If this an avx512 target we can improve the use of zero masking by
   // swapping the operands and inverting the condition.
   if (N->getOpcode() == ISD::VSELECT && Cond.hasOneUse() &&
        Subtarget.hasAVX512() && CondVT.getVectorElementType() == MVT::i1 &&
       ISD::isBuildVectorAllZeros(LHS.getNode()) &&

   unsigned Opc = CmpLHS.getOpcode();
   if (Opc != ISD::ATOMIC_LOAD_ADD && Opc != ISD::ATOMIC_LOAD_SUB)
     return SDValue();
 
   SDValue OpRHS = CmpLHS.getOperand(2);
   auto *OpRHSC = dyn_cast<ConstantSDNode>(OpRHS);
   if (!OpRHSC)
     return SDValue();
 
   APInt Addend = OpRHSC->getAPIntValue();
   if (Opc == ISD::ATOMIC_LOAD_SUB)
     Addend = -Addend;
 
   auto *CmpRHSC = dyn_cast<ConstantSDNode>(CmpRHS);
   if (!CmpRHSC)
     return SDValue();
 
   APInt Comparison = CmpRHSC->getAPIntValue();
   APInt NegAddend = -Addend;
 
+  // See if we can adjust the CC to make the comparison match the negated
+  // addend.
+  if (Comparison != NegAddend) {
+    APInt IncComparison = Comparison + 1;
+    if (IncComparison == NegAddend) {
+      if (CC == X86::COND_A && !Comparison.isMaxValue()) {
+        Comparison = IncComparison;
+        CC = X86::COND_AE;
+      } else if (CC == X86::COND_LE && !Comparison.isMaxSignedValue()) {
+        Comparison = IncComparison;
+        CC = X86::COND_L;
+      }
+    }
+    APInt DecComparison = Comparison - 1;
+    if (DecComparison == NegAddend) {
+      if (CC == X86::COND_AE && !Comparison.isNullValue()) {
+        Comparison = DecComparison;
+        CC = X86::COND_A;
+      } else if (CC == X86::COND_L && !Comparison.isMinSignedValue()) {
+        Comparison = DecComparison;
+        CC = X86::COND_LE;
+      }
+    }
+  }
+
   // If the addend is the negation of the comparison value, then we can do
   // a full comparison by emitting the atomic arithmetic as a locked sub.
   if (Comparison == NegAddend) {
     // The CC is fine, but we need to rewrite the LHS of the comparison as an
     // atomic sub.
     auto *AN = cast<AtomicSDNode>(CmpLHS.getNode());
     auto AtomicSub = DAG.getAtomic(
         ISD::ATOMIC_LOAD_SUB, SDLoc(CmpLHS), CmpVT,

llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686--
 ; RUN: llc -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
 ; PR2748
 
 @g_73 = external dso_local global i32
 @g_5 = external dso_local global i32
 
 define i32 @func_44(i16 signext %p_46) nounwind {
 ; SOURCE-SCHED-LABEL: func_44:
 ; SOURCE-SCHED:       # %bb.0: # %entry
 ; SOURCE-SCHED-NEXT:    subl $12, %esp
 ; SOURCE-SCHED-NEXT:    movl g_5, %eax
 ; SOURCE-SCHED-NEXT:    sarl %eax
 ; SOURCE-SCHED-NEXT:    xorl %ecx, %ecx
-; SOURCE-SCHED-NEXT:    cmpl $1, %eax
-; SOURCE-SCHED-NEXT:    setg %cl
+; SOURCE-SCHED-NEXT:    cmpl $2, %eax
+; SOURCE-SCHED-NEXT:    setge %cl
 ; SOURCE-SCHED-NEXT:    movb g_73, %dl
 ; SOURCE-SCHED-NEXT:    xorl %eax, %eax
 ; SOURCE-SCHED-NEXT:    subb {{[0-9]+}}(%esp), %al
 ; SOURCE-SCHED-NEXT:    testb %dl, %dl
 ; SOURCE-SCHED-NEXT:    jne .LBB0_2
 ; SOURCE-SCHED-NEXT:  # %bb.1: # %bb11
 ; SOURCE-SCHED-NEXT:    movzbl %al, %eax
 ; SOURCE-SCHED-NEXT:    divb %dl

llvm/test/CodeGen/X86/atomic-eflags-reuse.ll

 ; FASTINCDEC-NEXT:    movl %esi, %eax
 ; FASTINCDEC-NEXT:    lock decq (%rdi)
 ; FASTINCDEC-NEXT:    cmovgel %edx, %eax
 ; FASTINCDEC-NEXT:    retq
 ;
 ; SLOWINCDEC-LABEL: test_sub_1_cmov_sle:
 ; SLOWINCDEC:       # %bb.0: # %entry
 ; SLOWINCDEC-NEXT:    movl %esi, %eax
-; SLOWINCDEC-NEXT:    lock addq $-1, (%rdi)
+; SLOWINCDEC-NEXT:    lock subq $1, (%rdi)
 ; SLOWINCDEC-NEXT:    cmovgel %edx, %eax
 ; SLOWINCDEC-NEXT:    retq
 entry:
   %tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
   %tmp1 = icmp sle i64 %tmp0, 0
   %tmp2 = select i1 %tmp1, i32 %a0, i32 %a1
   ret i32 %tmp2
 }

 ; CHECK-NEXT:    retq
 entry:
   %tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
   %tmp1 = icmp ugt i64 %tmp0, 1
   %tmp2 = zext i1 %tmp1 to i8
   ret i8 %tmp2
 }
 
-; FIXME: This test canonicalizes in a way that hides the fact that the
-; comparison can be folded into the atomic subtract.
 define i8 @test_sub_1_cmp_1_setcc_sle(i64* %p) #0 {
-; CHECK-LABEL: test_sub_1_cmp_1_setcc_sle:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movq $-1, %rax
-; CHECK-NEXT:    lock xaddq %rax, (%rdi)
-; CHECK-NEXT:    cmpq $2, %rax
-; CHECK-NEXT:    setl %al
-; CHECK-NEXT:    retq
+; FASTINCDEC-LABEL: test_sub_1_cmp_1_setcc_sle:
+; FASTINCDEC:       # %bb.0: # %entry
+; FASTINCDEC-NEXT:    lock decq (%rdi)
+; FASTINCDEC-NEXT:    setle %al
+; FASTINCDEC-NEXT:    retq
+;
+; SLOWINCDEC-LABEL: test_sub_1_cmp_1_setcc_sle:
+; SLOWINCDEC:       # %bb.0: # %entry
+; SLOWINCDEC-NEXT:    lock subq $1, (%rdi)
+; SLOWINCDEC-NEXT:    setle %al
+; SLOWINCDEC-NEXT:    retq
 entry:
   %tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
   %tmp1 = icmp sle i64 %tmp0, 1
   %tmp2 = zext i1 %tmp1 to i8
   ret i8 %tmp2
 }
 
 define i8 @test_sub_3_cmp_3_setcc_eq(i64* %p) #0 {
 ; CHECK-LABEL: test_sub_3_cmp_3_setcc_eq:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    lock subq $3, (%rdi)
 ; CHECK-NEXT:    sete %al
 ; CHECK-NEXT:    retq
 entry:
   %tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst
   %tmp1 = icmp eq i64 %tmp0, 3
   %tmp2 = zext i1 %tmp1 to i8
   ret i8 %tmp2
 }
 
-; FIXME: This test canonicalizes in a way that hides the fact that the
-; comparison can be folded into the atomic subtract.
 define i8 @test_sub_3_cmp_3_setcc_uge(i64* %p) #0 {
 ; CHECK-LABEL: test_sub_3_cmp_3_setcc_uge:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movq $-3, %rax
-; CHECK-NEXT:    lock xaddq %rax, (%rdi)
-; CHECK-NEXT:    cmpq $2, %rax
-; CHECK-NEXT:    seta %al
+; CHECK-NEXT:    lock subq $3, (%rdi)
+; CHECK-NEXT:    setae %al
 ; CHECK-NEXT:    retq
 entry:
   %tmp0 = atomicrmw sub i64* %p, i64 3 seq_cst
   %tmp1 = icmp uge i64 %tmp0, 3
   %tmp2 = zext i1 %tmp1 to i8
   ret i8 %tmp2
 }
 
 attributes #0 = { nounwind }

llvm/test/CodeGen/X86/cmov.ll

 
 
 ; Should compile to setcc | -2.
 ; rdar://6668608
 define i32 @test5(i32* nocapture %P) nounwind readonly {
 ; CHECK-LABEL: test5:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $41, (%rdi)
-; CHECK-NEXT:    setg %al
+; CHECK-NEXT:    cmpl $42, (%rdi)
+; CHECK-NEXT:    setge %al
 ; CHECK-NEXT:    orl $-2, %eax
 ; CHECK-NEXT:    retq
 entry:
   %0 = load i32, i32* %P, align 4
   %1 = icmp sgt i32 %0, 41
   %iftmp.0.0 = select i1 %1, i32 -1, i32 -2
   ret i32 %iftmp.0.0
 }
 
 define i32 @test6(i32* nocapture %P) nounwind readonly {
 ; CHECK-LABEL: test6:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $42, (%rdi)
-; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    cmpl $41, (%rdi)
+; CHECK-NEXT:    setle %al
 ; CHECK-NEXT:    leal 4(%rax,%rax,8), %eax
 ; CHECK-NEXT:    retq
 entry:
   %0 = load i32, i32* %P, align 4
   %1 = icmp sgt i32 %0, 41
   %iftmp.0.0 = select i1 %1, i32 4, i32 13
   ret i32 %iftmp.0.0
 }

llvm/test/CodeGen/X86/cmp.ll

entry:
   ret i32 %lnot.ext
 }
 
 define dso_local i32 @test8(i64 %res) nounwind {
 ; CHECK-LABEL: test8:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20]
 ; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT:    cmpl $3, %edi # encoding: [0x83,0xff,0x03]
-; CHECK-NEXT:    setb %al # encoding: [0x0f,0x92,0xc0]
+; CHECK-NEXT:    cmpl $2, %edi # encoding: [0x83,0xff,0x02]
+; CHECK-NEXT:    setbe %al # encoding: [0x0f,0x96,0xc0]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
   %lnot = icmp ult i64 %res, 12884901888
   %lnot.ext = zext i1 %lnot to i32
   ret i32 %lnot.ext
 }
 
 define dso_local i32 @test9(i64 %res) nounwind {

llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll

 ; CHECK-LABEL: illegal_type:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    addl $29, %edi
 ; CHECK-NEXT:    movw %di, (%rsi)
 ; CHECK-NEXT:    andl $131071, %edi # imm = 0x1FFFF
 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    shrl $16, %eax
 ; CHECK-NEXT:    movb %al, 2(%rsi)
-; CHECK-NEXT:    cmpl $29, %edi
-; CHECK-NEXT:    setb %al
+; CHECK-NEXT:    cmpl $28, %edi
+; CHECK-NEXT:    setbe %al
 ; CHECK-NEXT:    retq
   %a = add i17 %x, 29
   store i17 %a, i17* %p
   %ov = icmp ult i17 %a, 29
   ret i1 %ov
 }
 
 ; The overflow check may be against the input rather than the sum.

llvm/test/CodeGen/X86/ctpop-combine.ll

 }
 
 define i32 @test3(i64 %x) nounwind readnone {
 ; POPCOUNT-LABEL: test3:
 ; POPCOUNT:       # %bb.0:
 ; POPCOUNT-NEXT:    popcntq %rdi, %rcx
 ; POPCOUNT-NEXT:    andb $63, %cl
 ; POPCOUNT-NEXT:    xorl %eax, %eax
-; POPCOUNT-NEXT:    cmpb $2, %cl
-; POPCOUNT-NEXT:    setb %al
+; POPCOUNT-NEXT:    cmpb $1, %cl
+; POPCOUNT-NEXT:    setbe %al
 ; POPCOUNT-NEXT:    retq
 ;
 ; NO-POPCOUNT-LABEL: test3:
 ; NO-POPCOUNT:       # %bb.0:
 ; NO-POPCOUNT-NEXT:    movq %rdi, %rax
 ; NO-POPCOUNT-NEXT:    shrq %rax
 ; NO-POPCOUNT-NEXT:    movabsq $6148914691236517205, %rcx # imm = 0x5555555555555555
 ; NO-POPCOUNT-NEXT:    andq %rax, %rcx

 ; NO-POPCOUNT-NEXT:    addq %rdi, %rax
 ; NO-POPCOUNT-NEXT:    movabsq $1085102592571150095, %rcx # imm = 0xF0F0F0F0F0F0F0F
 ; NO-POPCOUNT-NEXT:    andq %rax, %rcx
 ; NO-POPCOUNT-NEXT:    movabsq $72340172838076673, %rdx # imm = 0x101010101010101
 ; NO-POPCOUNT-NEXT:    imulq %rcx, %rdx
 ; NO-POPCOUNT-NEXT:    shrq $56, %rdx
 ; NO-POPCOUNT-NEXT:    andb $63, %dl
 ; NO-POPCOUNT-NEXT:    xorl %eax, %eax
-; NO-POPCOUNT-NEXT:    cmpb $2, %dl
-; NO-POPCOUNT-NEXT:    setb %al
+; NO-POPCOUNT-NEXT:    cmpb $1, %dl
+; NO-POPCOUNT-NEXT:    setbe %al
 ; NO-POPCOUNT-NEXT:    retq
   %count = tail call i64 @llvm.ctpop.i64(i64 %x)
   %cast = trunc i64 %count to i6 ; Too small for 0-64
   %cmp = icmp ult i6 %cast, 2
   %conv = zext i1 %cmp to i32
   ret i32 %conv
 }
 

llvm/test/CodeGen/X86/dagcombine-select.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NOBMI -enable-var-scope
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=+bmi | FileCheck %s -check-prefixes=CHECK,BMI -enable-var-scope
 
 define i32 @select_and1(i32 %x, i32 %y) {
 ; CHECK-LABEL: select_and1:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $11, %edi
-; CHECK-NEXT:    cmovgel %esi, %eax
+; CHECK-NEXT:    cmpl $10, %edi
+; CHECK-NEXT:    cmovgl %esi, %eax
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, i32 0, i32 -1
   %a = and i32 %y, %s
   ret i32 %a
 }
 
 define i32 @select_and2(i32 %x, i32 %y) {
 ; CHECK-LABEL: select_and2:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $11, %edi
-; CHECK-NEXT:    cmovgel %esi, %eax
+; CHECK-NEXT:    cmpl $10, %edi
+; CHECK-NEXT:    cmovgl %esi, %eax
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, i32 0, i32 -1
   %a = and i32 %s, %y
   ret i32 %a
 }
 
 define i32 @select_and3(i32 %x, i32 %y) {
 ; CHECK-LABEL: select_and3:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $11, %edi
-; CHECK-NEXT:    cmovll %esi, %eax
+; CHECK-NEXT:    cmpl $10, %edi
+; CHECK-NEXT:    cmovlel %esi, %eax
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, i32 -1, i32 0
   %a = and i32 %y, %s
   ret i32 %a
 }
 
 define <4 x i32> @select_and_v4(i32 %x, <4 x i32> %y) {
 ; CHECK-LABEL: select_and_v4:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $11, %edi
+; CHECK-NEXT:    cmpl $10, %edi
 ; CHECK-NEXT:    xorps %xmm1, %xmm1
-; CHECK-NEXT:    jl .LBB3_2
+; CHECK-NEXT:    jle .LBB3_2
 ; CHECK-NEXT:  # %bb.1:
 ; CHECK-NEXT:    movaps %xmm0, %xmm1
 ; CHECK-NEXT:  .LBB3_2:
 ; CHECK-NEXT:    movaps %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, <4 x i32> zeroinitializer, <4 x i32><i32 -1, i32 -1, i32 -1, i32 -1>
   %a = and <4 x i32> %s, %y
   ret <4 x i32> %a
 }
 
 define i32 @select_or1(i32 %x, i32 %y) {
 ; CHECK-LABEL: select_or1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $11, %edi
+; CHECK-NEXT:    cmpl $10, %edi
 ; CHECK-NEXT:    movl $-1, %eax
-; CHECK-NEXT:    cmovll %esi, %eax
+; CHECK-NEXT:    cmovlel %esi, %eax
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, i32 0, i32 -1
   %a = or i32 %y, %s
   ret i32 %a
 }
 
 define i32 @select_or2(i32 %x, i32 %y) {
 ; CHECK-LABEL: select_or2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $11, %edi
+; CHECK-NEXT:    cmpl $10, %edi
 ; CHECK-NEXT:    movl $-1, %eax
-; CHECK-NEXT:    cmovll %esi, %eax
+; CHECK-NEXT:    cmovlel %esi, %eax
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, i32 0, i32 -1
   %a = or i32 %s, %y
   ret i32 %a
 }
 
 define i32 @select_or3(i32 %x, i32 %y) {
 ; CHECK-LABEL: select_or3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $11, %edi
+; CHECK-NEXT:    cmpl $10, %edi
 ; CHECK-NEXT:    movl $-1, %eax
-; CHECK-NEXT:    cmovgel %esi, %eax
+; CHECK-NEXT:    cmovgl %esi, %eax
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, i32 -1, i32 0
   %a = or i32 %y, %s
   ret i32 %a
 }
 
 define <4 x i32> @select_or_v4(i32 %x, <4 x i32> %y) {
 ; CHECK-LABEL: select_or_v4:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $11, %edi
-; CHECK-NEXT:    jl .LBB7_2
+; CHECK-NEXT:    cmpl $10, %edi
+; CHECK-NEXT:    jle .LBB7_2
 ; CHECK-NEXT:  # %bb.1:
 ; CHECK-NEXT:    pcmpeqd %xmm0, %xmm0
 ; CHECK-NEXT:  .LBB7_2:
 ; CHECK-NEXT:    retq
   %c = icmp slt i32 %x, 11
   %s = select i1 %c, <4 x i32> zeroinitializer, <4 x i32><i32 -1, i32 -1, i32 -1, i32 -1>
   %a = or <4 x i32> %s, %y
   ret <4 x i32> %a

llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll

 
 ; Adding not a constant
 define i1 @add_ugecmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
 ; X86-LABEL: add_ugecmp_bad_i16_i8_add:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addw {{[0-9]+}}(%esp), %ax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $255, %eax
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $256, %eax # imm = 0x100
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ugecmp_bad_i16_i8_add:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl %esi, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $255, %eax
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $256, %eax # imm = 0x100
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, %y
   %tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Comparing not with a constant
 define i1 @add_ugecmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {

 
 ; First constant is not power of two
 define i1 @add_ugecmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
 ; X86-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl $192, %eax
 ; X86-NEXT:    addl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $255, %eax
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $256, %eax # imm = 0x100
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ugecmp_bad_i16_i8_c0notpoweroftwo:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl $192, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $255, %eax
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $256, %eax # imm = 0x100
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1))
   %tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Second constant is not power of two
 define i1 @add_ugecmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
 ; X86-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    subl $-128, %eax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $767, %eax # imm = 0x2FF
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $768, %eax # imm = 0x300
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ugecmp_bad_i16_i8_c1notpoweroftwo:
 ; X64:       # %bb.0:
 ; X64-NEXT:    subl $-128, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $767, %eax # imm = 0x2FF
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $768, %eax # imm = 0x300
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 128 ; 1U << (8-1)
   %tmp1 = icmp uge i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1))
   ret i1 %tmp1
 }
 
 ; Magic check fails, 64 << 1 != 256
 define i1 @add_ugecmp_bad_i16_i8_magic(i16 %x) nounwind {
 ; X86-LABEL: add_ugecmp_bad_i16_i8_magic:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addl $64, %eax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $255, %eax
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $256, %eax # imm = 0x100
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ugecmp_bad_i16_i8_magic:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl $64, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $255, %eax
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $256, %eax # imm = 0x100
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 64 ; 1U << (8-1-1)
   %tmp1 = icmp uge i16 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Bad 'destination type'
 define i1 @add_ugecmp_bad_i16_i4(i16 %x) nounwind {
 ; X86-LABEL: add_ugecmp_bad_i16_i4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addl $8, %eax
-; X86-NEXT:    cmpw $15, %ax
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpw $16, %ax
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ugecmp_bad_i16_i4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl $8, %edi
-; X64-NEXT:    cmpw $15, %di
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpw $16, %di
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 8 ; 1U << (4-1)
   %tmp1 = icmp uge i16 %tmp0, 16 ; 1U << 4
   ret i1 %tmp1
 }
 
 ; Bad storage type
 define i1 @add_ugecmp_bad_i24_i8(i24 %x) nounwind {
 ; X86-LABEL: add_ugecmp_bad_i24_i8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    subl $-128, %eax
 ; X86-NEXT:    andl $16777215, %eax # imm = 0xFFFFFF
-; X86-NEXT:    cmpl $255, %eax
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $256, %eax # imm = 0x100
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ugecmp_bad_i24_i8:
 ; X64:       # %bb.0:
 ; X64-NEXT:    subl $-128, %edi
 ; X64-NEXT:    andl $16777215, %edi # imm = 0xFFFFFF
-; X64-NEXT:    cmpl $255, %edi
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $256, %edi # imm = 0x100
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %tmp0 = add i24 %x, 128 ; 1U << (8-1)
   %tmp1 = icmp uge i24 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Slightly more canonical variant
 define i1 @add_ugtcmp_bad_i16_i8(i16 %x) nounwind {
 ; CHECK-LABEL: add_ugtcmp_bad_i16_i8:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    ret{{[l|q]}}
   %tmp0 = add i16 %x, 128 ; 1U << (8-1)
   %tmp1 = icmp ugt i16 %tmp0, -1 ; when we +1 it, it will wrap to 0
   ret i1 %tmp1
 }

llvm/test/CodeGen/X86/mul-constant-result.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
 
 ; Incremental updates of the instruction depths should be enough for this test
 ; case.
 ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell -machine-combiner-inc-threshold=0| FileCheck %s --check-prefix=X64-HSW
 
 ; Function Attrs: norecurse nounwind readnone uwtable
 define i32 @mult(i32, i32) local_unnamed_addr #0 {
 ; X86-LABEL: mult:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    .cfi_def_cfa_offset 8
 ; X86-NEXT:    .cfi_offset %esi, -8
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    cmpl $1, %edx
+; X86-NEXT:    cmpl $2, %edx
 ; X86-NEXT:    movl $1, %eax
 ; X86-NEXT:    movl $1, %esi
-; X86-NEXT:    jg .LBB0_2
+; X86-NEXT:    jge .LBB0_2
 ; X86-NEXT:  # %bb.1:
 ; X86-NEXT:    movl %edx, %esi
 ; X86-NEXT:  .LBB0_2:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    testl %edx, %edx
 ; X86-NEXT:    je .LBB0_4
 ; X86-NEXT:  # %bb.3:
 ; X86-NEXT:    movl %esi, %eax

 ; X86-NEXT:    shll $5, %eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    .cfi_def_cfa_offset 4
 ; X86-NEXT:    retl
 ;
 ; X64-HSW-LABEL: mult:
 ; X64-HSW:       # %bb.0:
 ; X64-HSW-NEXT:    # kill: def $edi killed $edi def $rdi
-; X64-HSW-NEXT:    cmpl $1, %esi
+; X64-HSW-NEXT:    cmpl $2, %esi
 ; X64-HSW-NEXT:    movl $1, %ecx
 ; X64-HSW-NEXT:    movl %esi, %eax
-; X64-HSW-NEXT:    cmovgl %ecx, %eax
+; X64-HSW-NEXT:    cmovgel %ecx, %eax
 ; X64-HSW-NEXT:    testl %esi, %esi
 ; X64-HSW-NEXT:    cmovel %ecx, %eax
 ; X64-HSW-NEXT:    decl %edi
 ; X64-HSW-NEXT:    cmpl $31, %edi
 ; X64-HSW-NEXT:    ja .LBB0_3
 ; X64-HSW-NEXT:  # %bb.1:
 ; X64-HSW-NEXT:    jmpq *.LJTI0_0(,%rdi,8)
 ; X64-HSW-NEXT:  .LBB0_2:

llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll

 define i1 @p2_scalar_shifted_urem_by_const(i32 %x, i32 %y) {
 ; CHECK-LABEL: p2_scalar_shifted_urem_by_const:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movl %esi, %ecx
 ; CHECK-NEXT:    andl $1, %edi
 ; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
 ; CHECK-NEXT:    shll %cl, %edi
 ; CHECK-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
-; CHECK-NEXT:    cmpl $1431655766, %eax # imm = 0x55555556
-; CHECK-NEXT:    setb %al
+; CHECK-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
+; CHECK-NEXT:    setbe %al
 ; CHECK-NEXT:    retq
   %t0 = and i32 %x, 1 ; clearly a power-of-two or zero
   %t1 = shl i32 %t0, %y ; will still be a power-of-two or zero with any %y
   %t2 = urem i32 %t1, 3 ; '3' is clearly not a power of two
   %t3 = icmp eq i32 %t2, 0
   ret i1 %t3
 }
 
 define i1 @p3_scalar_shifted2_urem_by_const(i32 %x, i32 %y) {
 ; CHECK-LABEL: p3_scalar_shifted2_urem_by_const:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movl %esi, %ecx
 ; CHECK-NEXT:    andl $2, %edi
 ; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
 ; CHECK-NEXT:    shll %cl, %edi
 ; CHECK-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
-; CHECK-NEXT:    cmpl $1431655766, %eax # imm = 0x55555556
-; CHECK-NEXT:    setb %al
+; CHECK-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
+; CHECK-NEXT:    setbe %al
 ; CHECK-NEXT:    retq
   %t0 = and i32 %x, 2 ; clearly a power-of-two or zero
   %t1 = shl i32 %t0, %y ; will still be a power-of-two or zero with any %y
   %t2 = urem i32 %t1, 3 ; '3' is clearly not a power of two
   %t3 = icmp eq i32 %t2, 0
   ret i1 %t3
 }
 

 ; Basic negative tests
 ;------------------------------------------------------------------------------;
 
 define i1 @n0_urem_of_maybe_not_power_of_two(i32 %x, i32 %y) {
 ; CHECK-LABEL: n0_urem_of_maybe_not_power_of_two:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andl $3, %edi
 ; CHECK-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
-; CHECK-NEXT:    cmpl $1431655766, %eax # imm = 0x55555556
-; CHECK-NEXT:    setb %al
+; CHECK-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
+; CHECK-NEXT:    setbe %al
 ; CHECK-NEXT:    retq
   %t0 = and i32 %x, 3 ; up to two bits set, not power-of-two
   %t1 = urem i32 %t0, 3
   %t2 = icmp eq i32 %t1, 0
   ret i1 %t2
 }
 
 define i1 @n1_urem_by_maybe_power_of_two(i32 %x, i32 %y) {

llvm/test/CodeGen/X86/or-branch.ll

 ; JUMP2-NEXT:    retl
 ; JUMP2-NEXT:  .LBB0_3: # %cond_true
 ; JUMP2-NEXT:    jmp bar@PLT # TAILCALL
 ;
 ; JUMP1-LABEL: foo:
 ; JUMP1:       # %bb.0: # %entry
 ; JUMP1-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; JUMP1-NEXT:    setne %al
-; JUMP1-NEXT:    cmpl $4, {{[0-9]+}}(%esp)
-; JUMP1-NEXT:    setg %cl
+; JUMP1-NEXT:    cmpl $5, {{[0-9]+}}(%esp)
+; JUMP1-NEXT:    setge %cl
 ; JUMP1-NEXT:    testb %al, %cl
 ; JUMP1-NEXT:    jne .LBB0_1
 ; JUMP1-NEXT:  # %bb.2: # %cond_true
 ; JUMP1-NEXT:    jmp bar@PLT # TAILCALL
 ; JUMP1-NEXT:  .LBB0_1: # %UnifiedReturnBlock
 ; JUMP1-NEXT:    retl
 entry:
   %tmp1 = icmp eq i32 %X, 0

 ; If the branch is unpredictable, don't add another branch
 ; regardless of whether they are expensive or not.
 
 define void @unpredictable(i32 %X, i32 %Y, i32 %Z) nounwind {
 ; JUMP2-LABEL: unpredictable:
 ; JUMP2:       # %bb.0: # %entry
 ; JUMP2-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; JUMP2-NEXT:    setne %al
-; JUMP2-NEXT:    cmpl $4, {{[0-9]+}}(%esp)
-; JUMP2-NEXT:    setg %cl
+; JUMP2-NEXT:    cmpl $5, {{[0-9]+}}(%esp)
+; JUMP2-NEXT:    setge %cl
 ; JUMP2-NEXT:    testb %al, %cl
 ; JUMP2-NEXT:    jne .LBB1_1
 ; JUMP2-NEXT:  # %bb.2: # %cond_true
 ; JUMP2-NEXT:    jmp bar@PLT # TAILCALL
 ; JUMP2-NEXT:  .LBB1_1: # %UnifiedReturnBlock
 ; JUMP2-NEXT:    retl
 ;
 ; JUMP1-LABEL: unpredictable:
 ; JUMP1:       # %bb.0: # %entry
 ; JUMP1-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; JUMP1-NEXT:    setne %al
-; JUMP1-NEXT:    cmpl $4, {{[0-9]+}}(%esp)
-; JUMP1-NEXT:    setg %cl
+; JUMP1-NEXT:    cmpl $5, {{[0-9]+}}(%esp)
+; JUMP1-NEXT:    setge %cl
 ; JUMP1-NEXT:    testb %al, %cl
 ; JUMP1-NEXT:    jne .LBB1_1
 ; JUMP1-NEXT:  # %bb.2: # %cond_true
 ; JUMP1-NEXT:    jmp bar@PLT # TAILCALL
 ; JUMP1-NEXT:  .LBB1_1: # %UnifiedReturnBlock
 ; JUMP1-NEXT:    retl
 entry:
   %tmp1 = icmp eq i32 %X, 0

llvm/test/CodeGen/X86/pr34080-2.ll

 ; CHECK-NEXT:    pushl %ebx
 ; CHECK-NEXT:    pushl %edi
 ; CHECK-NEXT:    pushl %esi
 ; CHECK-NEXT:    andl $-8, %esp
 ; CHECK-NEXT:    subl $40, %esp
 ; CHECK-NEXT:    movl 8(%ebp), %ebx
 ; CHECK-NEXT:    movl 8(%ebx), %esi
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $3, 12(%ebx)
-; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    cmpl $2, 12(%ebx)
+; CHECK-NEXT:    setle %al
 ; CHECK-NEXT:    subl %eax, %esi
 ; CHECK-NEXT:    movl $-1374389535, %ecx # imm = 0xAE147AE1
 ; CHECK-NEXT:    movl %esi, %eax
 ; CHECK-NEXT:    imull %ecx
 ; CHECK-NEXT:    movl %edx, %ecx
 ; CHECK-NEXT:    movl %edx, %eax
 ; CHECK-NEXT:    shrl $31, %eax
 ; CHECK-NEXT:    sarl $5, %ecx

llvm/test/CodeGen/X86/pr45995-2.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O3  --x86-asm-syntax=intel -mtriple=x86_64-grtev4-linux-gnu -march=x86-64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s
 
 define <4 x i1> @selecter(i64 %0) {
 ; CHECK-LABEL: selecter:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xor eax, eax
-; CHECK-NEXT:    cmp rdi, 1
-; CHECK-NEXT:    setg al
+; CHECK-NEXT:    cmp rdi, 2
+; CHECK-NEXT:    setge al
 ; CHECK-NEXT:    lea eax, [rax + 2*rax]
 ; CHECK-NEXT:    kmovd k0, eax
 ; CHECK-NEXT:    vpmovm2d xmm0, k0
 ; CHECK-NEXT:    ret
   %2 = icmp slt i64 0, %0
   %3 = select i1 %2, <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i1> zeroinitializer
   %4 = insertvalue [4 x <4 x i1>] zeroinitializer, <4 x i1> %3, 0
   %5 = icmp slt i64 1, %0

llvm/test/CodeGen/X86/pr5145.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
 @sc8 = external dso_local global i8
 
 define void @atomic_maxmin_i8() {
 ; CHECK-LABEL: atomic_maxmin_i8:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movb sc8(%rip), %al
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_1: # %atomicrmw.start
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmpb $5, %al
+; CHECK-NEXT:    cmpb $6, %al
 ; CHECK-NEXT:    movzbl %al, %eax
 ; CHECK-NEXT:    movl $5, %ecx
-; CHECK-NEXT:    cmovgl %eax, %ecx
+; CHECK-NEXT:    cmovgel %eax, %ecx
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    lock cmpxchgb %cl, sc8(%rip)
 ; CHECK-NEXT:    jne .LBB0_1
 ; CHECK-NEXT:  # %bb.2: # %atomicrmw.end
 ; CHECK-NEXT:    movb sc8(%rip), %al
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_3: # %atomicrmw.start2
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmpb $7, %al
+; CHECK-NEXT:    cmpb $6, %al
 ; CHECK-NEXT:    movzbl %al, %eax
 ; CHECK-NEXT:    movl $6, %ecx
-; CHECK-NEXT:    cmovll %eax, %ecx
+; CHECK-NEXT:    cmovlel %eax, %ecx
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    lock cmpxchgb %cl, sc8(%rip)
 ; CHECK-NEXT:    jne .LBB0_3
 ; CHECK-NEXT:  # %bb.4: # %atomicrmw.end1
 ; CHECK-NEXT:    movb sc8(%rip), %al
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_5: # %atomicrmw.start8
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmpb $7, %al
+; CHECK-NEXT:    cmpb $8, %al
 ; CHECK-NEXT:    movzbl %al, %eax
 ; CHECK-NEXT:    movl $7, %ecx
-; CHECK-NEXT:    cmoval %eax, %ecx
+; CHECK-NEXT:    cmovael %eax, %ecx
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    lock cmpxchgb %cl, sc8(%rip)
 ; CHECK-NEXT:    jne .LBB0_5
 ; CHECK-NEXT:  # %bb.6: # %atomicrmw.end7
 ; CHECK-NEXT:    movb sc8(%rip), %al
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_7: # %atomicrmw.start14
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmpb $9, %al
+; CHECK-NEXT:    cmpb $8, %al
 ; CHECK-NEXT:    movzbl %al, %eax
 ; CHECK-NEXT:    movl $8, %ecx
-; CHECK-NEXT:    cmovbl %eax, %ecx
+; CHECK-NEXT:    cmovbel %eax, %ecx
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    lock cmpxchgb %cl, sc8(%rip)
 ; CHECK-NEXT:    jne .LBB0_7
 ; CHECK-NEXT:  # %bb.8: # %atomicrmw.end13
 ; CHECK-NEXT:    retq
   %1 = atomicrmw max  i8* @sc8, i8 5 acquire
   %2 = atomicrmw min  i8* @sc8, i8 6 acquire
   %3 = atomicrmw umax i8* @sc8, i8 7 acquire
   %4 = atomicrmw umin i8* @sc8, i8 8 acquire
   ret void
 }

llvm/test/CodeGen/X86/sadd_sat.ll

 }
 
 define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    addb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $7, %al
+; X86-NEXT:    cmpb $6, %al
 ; X86-NEXT:    movl $7, %eax
-; X86-NEXT:    cmovll %ecx, %eax
-; X86-NEXT:    cmpb $-8, %al
+; X86-NEXT:    cmovlel %ecx, %eax
+; X86-NEXT:    cmpb $-7, %al
 ; X86-NEXT:    movl $248, %ecx
-; X86-NEXT:    cmovgl %eax, %ecx
+; X86-NEXT:    cmovgel %eax, %ecx
 ; X86-NEXT:    movsbl %cl, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: func3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addb %sil, %dil
 ; X64-NEXT:    movzbl %dil, %eax
-; X64-NEXT:    cmpb $7, %al
+; X64-NEXT:    cmpb $6, %al
 ; X64-NEXT:    movl $7, %ecx
-; X64-NEXT:    cmovll %eax, %ecx
-; X64-NEXT:    cmpb $-8, %cl
+; X64-NEXT:    cmovlel %eax, %ecx
+; X64-NEXT:    cmpb $-7, %cl
 ; X64-NEXT:    movl $248, %eax
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    movsbl %al, %eax
 ; X64-NEXT:    retq
   %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y);
   ret i4 %tmp;
 }
 
 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X86-LABEL: vec:

llvm/test/CodeGen/X86/sadd_sat_plus.ll

 ; X86-LABEL: func4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    mulb {{[0-9]+}}(%esp)
 ; X86-NEXT:    shlb $4, %al
 ; X86-NEXT:    sarb $4, %al
 ; X86-NEXT:    addb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $7, %al
+; X86-NEXT:    cmpb $6, %al
 ; X86-NEXT:    movl $7, %eax
-; X86-NEXT:    cmovll %ecx, %eax
-; X86-NEXT:    cmpb $-8, %al
+; X86-NEXT:    cmovlel %ecx, %eax
+; X86-NEXT:    cmpb $-7, %al
 ; X86-NEXT:    movl $248, %ecx
-; X86-NEXT:    cmovgl %eax, %ecx
+; X86-NEXT:    cmovgel %eax, %ecx
 ; X86-NEXT:    movsbl %cl, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: func4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %esi, %eax
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    mulb %dl
 ; X64-NEXT:    shlb $4, %al
 ; X64-NEXT:    sarb $4, %al
 ; X64-NEXT:    addb %dil, %al
 ; X64-NEXT:    movzbl %al, %eax
-; X64-NEXT:    cmpb $7, %al
+; X64-NEXT:    cmpb $6, %al
 ; X64-NEXT:    movl $7, %ecx
-; X64-NEXT:    cmovll %eax, %ecx
-; X64-NEXT:    cmpb $-8, %cl
+; X64-NEXT:    cmovlel %eax, %ecx
+; X64-NEXT:    cmpb $-7, %cl
 ; X64-NEXT:    movl $248, %eax
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    movsbl %al, %eax
 ; X64-NEXT:    retq
   %a = mul i4 %y, %z
   %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)
   ret i4 %tmp
 }

llvm/test/CodeGen/X86/sat-add.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2   | FileCheck %s --check-prefixes=ANY,SSE,SSE2
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ANY,SSE,SSE4,SSE41
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=ANY,SSE,SSE4,SSE42
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2   | FileCheck %s --check-prefixes=ANY,AVX,AVX2
 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=ANY,AVX,AVX512
 
 ; There are at least 3 potential patterns corresponding to an unsigned saturated add: min, cmp with sum, cmp with not.
 ; Test each of those patterns with i8/i16/i32/i64.
 ; Test each of those with a constant operand and a variable operand.
 ; Test each of those with a 128-bit vector type.
 
 define i8 @unsigned_sat_constant_i8_using_min(i8 %x) {
 ; ANY-LABEL: unsigned_sat_constant_i8_using_min:
 ; ANY:       # %bb.0:
-; ANY-NEXT:    cmpb $-43, %dil
+; ANY-NEXT:    cmpb $-44, %dil
 ; ANY-NEXT:    movl $213, %eax
-; ANY-NEXT:    cmovbl %edi, %eax
+; ANY-NEXT:    cmovbel %edi, %eax
 ; ANY-NEXT:    addb $42, %al
 ; ANY-NEXT:    # kill: def $al killed $al killed $eax
 ; ANY-NEXT:    retq
   %c = icmp ult i8 %x, -43
   %s = select i1 %c, i8 %x, i8 -43
   %r = add i8 %s, 42
   ret i8 %r
 }
; ANY-NEXT:    retq
   %c = icmp ugt i8 %x, -43
   %r = select i1 %c, i8 -1, i8 %a
   ret i8 %r
 }
 
 define i16 @unsigned_sat_constant_i16_using_min(i16 %x) {
 ; ANY-LABEL: unsigned_sat_constant_i16_using_min:
 ; ANY:       # %bb.0:
-; ANY-NEXT:    cmpw $-43, %di
+; ANY-NEXT:    cmpw $-44, %di
 ; ANY-NEXT:    movl $65493, %eax # imm = 0xFFD5
-; ANY-NEXT:    cmovbl %edi, %eax
+; ANY-NEXT:    cmovbel %edi, %eax
 ; ANY-NEXT:    addl $42, %eax
 ; ANY-NEXT:    # kill: def $ax killed $ax killed $eax
 ; ANY-NEXT:    retq
   %c = icmp ult i16 %x, -43
   %s = select i1 %c, i16 %x, i16 -43
   %r = add i16 %s, 42
   ret i16 %r
 }
; ANY-NEXT:    retq
   %c = icmp ugt i16 %x, -43
   %r = select i1 %c, i16 -1, i16 %a
   ret i16 %r
 }
 
 define i32 @unsigned_sat_constant_i32_using_min(i32 %x) {
 ; ANY-LABEL: unsigned_sat_constant_i32_using_min:
 ; ANY:       # %bb.0:
-; ANY-NEXT:    cmpl $-43, %edi
+; ANY-NEXT:    cmpl $-44, %edi
 ; ANY-NEXT:    movl $-43, %eax
-; ANY-NEXT:    cmovbl %edi, %eax
+; ANY-NEXT:    cmovbel %edi, %eax
 ; ANY-NEXT:    addl $42, %eax
 ; ANY-NEXT:    retq
   %c = icmp ult i32 %x, -43
   %s = select i1 %c, i32 %x, i32 -43
   %r = add i32 %s, 42
   ret i32 %r
 }
 
; ANY-NEXT:    retq
   %c = icmp ugt i32 %x, -43
   %r = select i1 %c, i32 -1, i32 %a
   ret i32 %r
 }
 
 define i64 @unsigned_sat_constant_i64_using_min(i64 %x) {
 ; ANY-LABEL: unsigned_sat_constant_i64_using_min:
 ; ANY:       # %bb.0:
-; ANY-NEXT:    cmpq $-43, %rdi
+; ANY-NEXT:    cmpq $-44, %rdi
 ; ANY-NEXT:    movq $-43, %rax
-; ANY-NEXT:    cmovbq %rdi, %rax
+; ANY-NEXT:    cmovbeq %rdi, %rax
 ; ANY-NEXT:    addq $42, %rax
 ; ANY-NEXT:    retq
   %c = icmp ult i64 %x, -43
   %s = select i1 %c, i64 %x, i64 -43
   %r = add i64 %s, 42
   ret i64 %r
 }
 

llvm/test/CodeGen/X86/sdiv_fix_sat.ll

 ; X64-NEXT:    sets %sil
 ; X64-NEXT:    testl %ecx, %ecx
 ; X64-NEXT:    sets %cl
 ; X64-NEXT:    xorb %sil, %cl
 ; X64-NEXT:    testl %edx, %edx
 ; X64-NEXT:    setne %dl
 ; X64-NEXT:    testb %cl, %dl
 ; X64-NEXT:    cmovel %eax, %edi
-; X64-NEXT:    cmpl $65535, %edi # imm = 0xFFFF
+; X64-NEXT:    cmpl $65534, %edi # imm = 0xFFFE
 ; X64-NEXT:    movl $65535, %ecx # imm = 0xFFFF
-; X64-NEXT:    cmovll %edi, %ecx
-; X64-NEXT:    cmpl $-65536, %ecx # imm = 0xFFFF0000
+; X64-NEXT:    cmovlel %edi, %ecx
+; X64-NEXT:    cmpl $-65535, %ecx # imm = 0xFFFF0001
 ; X64-NEXT:    movl $-65536, %eax # imm = 0xFFFF0000
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    shrl %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi

 ; X86-NEXT:    sets %bl
 ; X86-NEXT:    testl %ecx, %ecx
 ; X86-NEXT:    sets %cl
 ; X86-NEXT:    xorb %bl, %cl
 ; X86-NEXT:    testl %edx, %edx
 ; X86-NEXT:    setne %dl
 ; X86-NEXT:    testb %cl, %dl
 ; X86-NEXT:    cmovel %eax, %edi
-; X86-NEXT:    cmpl $65535, %edi # imm = 0xFFFF
+; X86-NEXT:    cmpl $65534, %edi # imm = 0xFFFE
 ; X86-NEXT:    movl $65535, %ecx # imm = 0xFFFF
-; X86-NEXT:    cmovll %edi, %ecx
-; X86-NEXT:    cmpl $-65536, %ecx # imm = 0xFFFF0000
+; X86-NEXT:    cmovlel %edi, %ecx
+; X86-NEXT:    cmpl $-65535, %ecx # imm = 0xFFFF0001
 ; X86-NEXT:    movl $-65536, %eax # imm = 0xFFFF0000
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    retl
   %tmp = call i16 @llvm.sdiv.fix.sat.i16(i16 %x, i16 %y, i32 7)
   ret i16 %tmp

 ; X64-NEXT:    sets %sil
 ; X64-NEXT:    testl %ecx, %ecx
 ; X64-NEXT:    sets %cl
 ; X64-NEXT:    xorb %sil, %cl
 ; X64-NEXT:    testl %edx, %edx
 ; X64-NEXT:    setne %dl
 ; X64-NEXT:    testb %cl, %dl
 ; X64-NEXT:    cmovel %eax, %edi
-; X64-NEXT:    cmpl $16383, %edi # imm = 0x3FFF
+; X64-NEXT:    cmpl $16382, %edi # imm = 0x3FFE
 ; X64-NEXT:    movl $16383, %ecx # imm = 0x3FFF
-; X64-NEXT:    cmovll %edi, %ecx
-; X64-NEXT:    cmpl $-16384, %ecx # imm = 0xC000
+; X64-NEXT:    cmovlel %edi, %ecx
+; X64-NEXT:    cmpl $-16383, %ecx # imm = 0xC001
 ; X64-NEXT:    movl $-16384, %eax # imm = 0xC000
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %esi
 ; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    shll $14, %ecx
 ; X86-NEXT:    movl %ecx, %eax
 ; X86-NEXT:    cltd
 ; X86-NEXT:    idivl %esi
 ; X86-NEXT:    leal -1(%eax), %edi
 ; X86-NEXT:    testl %esi, %esi
 ; X86-NEXT:    sets %bl
 ; X86-NEXT:    testl %ecx, %ecx
 ; X86-NEXT:    sets %cl
 ; X86-NEXT:    xorb %bl, %cl
 ; X86-NEXT:    testl %edx, %edx
 ; X86-NEXT:    setne %dl
 ; X86-NEXT:    testb %cl, %dl
 ; X86-NEXT:    cmovel %eax, %edi
-; X86-NEXT:    cmpl $16383, %edi # imm = 0x3FFF
+; X86-NEXT:    cmpl $16382, %edi # imm = 0x3FFE
 ; X86-NEXT:    movl $16383, %ecx # imm = 0x3FFF
-; X86-NEXT:    cmovll %edi, %ecx
-; X86-NEXT:    cmpl $-16384, %ecx # imm = 0xC000
+; X86-NEXT:    cmovlel %edi, %ecx
+; X86-NEXT:    cmpl $-16383, %ecx # imm = 0xC001
 ; X86-NEXT:    movl $-16384, %eax # imm = 0xC000
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    retl
   %x2 = sext i8 %x to i15
   %y2 = sext i8 %y to i15
   %tmp = call i15 @llvm.sdiv.fix.sat.i15(i15 %x2, i15 %y2, i32 14)

 ; X64-NEXT:    testw %cx, %cx
 ; X64-NEXT:    sets %cl
 ; X64-NEXT:    xorb %dil, %cl
 ; X64-NEXT:    testw %dx, %dx
 ; X64-NEXT:    setne %dl
 ; X64-NEXT:    testb %cl, %dl
 ; X64-NEXT:    cmovel %eax, %esi
 ; X64-NEXT:    movswl %si, %eax
-; X64-NEXT:    cmpl $16383, %eax # imm = 0x3FFF
+; X64-NEXT:    cmpl $16382, %eax # imm = 0x3FFE
 ; X64-NEXT:    movl $16383, %ecx # imm = 0x3FFF
-; X64-NEXT:    cmovll %esi, %ecx
+; X64-NEXT:    cmovlel %esi, %ecx
 ; X64-NEXT:    movswl %cx, %eax
-; X64-NEXT:    cmpl $-16384, %eax # imm = 0xC000
+; X64-NEXT:    cmpl $-16383, %eax # imm = 0xC001
 ; X64-NEXT:    movl $49152, %eax # imm = 0xC000
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx

 ; X86-NEXT:    testw %si, %si
 ; X86-NEXT:    sets %ch
 ; X86-NEXT:    xorb %cl, %ch
 ; X86-NEXT:    testw %dx, %dx
 ; X86-NEXT:    setne %cl
 ; X86-NEXT:    testb %ch, %cl
 ; X86-NEXT:    cmovel %eax, %edi
 ; X86-NEXT:    movswl %di, %eax
-; X86-NEXT:    cmpl $16383, %eax # imm = 0x3FFF
+; X86-NEXT:    cmpl $16382, %eax # imm = 0x3FFE
 ; X86-NEXT:    movl $16383, %ecx # imm = 0x3FFF
-; X86-NEXT:    cmovll %edi, %ecx
+; X86-NEXT:    cmovlel %edi, %ecx
 ; X86-NEXT:    movswl %cx, %eax
-; X86-NEXT:    cmpl $-16384, %eax # imm = 0xC000
+; X86-NEXT:    cmpl $-16383, %eax # imm = 0xC001
 ; X86-NEXT:    movl $49152, %eax # imm = 0xC000
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    retl
   %y2 = sext i8 %y to i15
   %y3 = shl i15 %y2, 7
   %tmp = call i15 @llvm.sdiv.fix.sat.i15(i15 %x, i15 %y3, i32 4)
   %tmp2 = sext i15 %tmp to i16

 ; X64-NEXT:    sets %dl
 ; X64-NEXT:    testb %cl, %cl
 ; X64-NEXT:    sets %cl
 ; X64-NEXT:    xorb %dl, %cl
 ; X64-NEXT:    testb %bl, %bl
 ; X64-NEXT:    setne %dl
 ; X64-NEXT:    testb %cl, %dl
 ; X64-NEXT:    cmovel %eax, %edi
-; X64-NEXT:    cmpb $7, %dil
+; X64-NEXT:    cmpb $6, %dil
 ; X64-NEXT:    movl $7, %ecx
-; X64-NEXT:    cmovll %edi, %ecx
-; X64-NEXT:    cmpb $-8, %cl
+; X64-NEXT:    cmovlel %edi, %ecx
+; X64-NEXT:    cmpb $-7, %cl
 ; X64-NEXT:    movl $248, %eax
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    popq %rbx
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %dl

 ; X86-NEXT:    sets %dl
 ; X86-NEXT:    testb %dh, %dh
 ; X86-NEXT:    sets %dh
 ; X86-NEXT:    xorb %dl, %dh
 ; X86-NEXT:    testb %cl, %cl
 ; X86-NEXT:    setne %cl
 ; X86-NEXT:    testb %dh, %cl
 ; X86-NEXT:    cmovel %esi, %eax
-; X86-NEXT:    cmpb $7, %al
+; X86-NEXT:    cmpb $6, %al
 ; X86-NEXT:    movl $7, %ecx
-; X86-NEXT:    cmovll %eax, %ecx
-; X86-NEXT:    cmpb $-8, %cl
+; X86-NEXT:    cmovlel %eax, %ecx
+; X86-NEXT:    cmpb $-7, %cl
 ; X86-NEXT:    movl $248, %eax
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    # kill: def $al killed $al killed $eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    retl
   %tmp = call i4 @llvm.sdiv.fix.sat.i4(i4 %x, i4 %y, i32 2)
   ret i4 %tmp
 }
 
 define i64 @func5(i64 %x, i64 %y) nounwind {
 ;
 ; X64-LABEL: func5:
 ; X64:       # %bb.0:
 ; X64-NEXT:    pushq %rbp
 ; X64-NEXT:    pushq %r15
 ; X64-NEXT:    pushq %r14
 ; X64-NEXT:    pushq %r13
 ; X64-NEXT:    pushq %r12
 ; X64-NEXT:    pushq %rbx
 ; X64-NEXT:    subq $24, %rsp
 ; X64-NEXT:    movq %rsi, %rdx
 ; X64-NEXT:    movq %rsi, (%rsp) # 8-byte Spill
 ; X64-NEXT:    movq %rdi, %r15
 ; X64-NEXT:    leaq (%rdi,%rdi), %rax
-; X64-NEXT:    movq %rdi, %rbx
-; X64-NEXT:    sarq $63, %rbx
-; X64-NEXT:    shldq $31, %rax, %rbx
-; X64-NEXT:    shlq $32, %r15
-; X64-NEXT:    movq %rsi, %r12
+; X64-NEXT:    movq %rdi, %r12
 ; X64-NEXT:    sarq $63, %r12
+; X64-NEXT:    shldq $31, %rax, %r12
+; X64-NEXT:    shlq $32, %r15
+; X64-NEXT:    movq %rsi, %r13
+; X64-NEXT:    sarq $63, %r13
 ; X64-NEXT:    movq %r15, %rdi
-; X64-NEXT:    movq %rbx, %rsi
-; X64-NEXT:    movq %r12, %rcx
+; X64-NEXT:    movq %r12, %rsi
+; X64-NEXT:    movq %r13, %rcx
 ; X64-NEXT:    callq __divti3@PLT
-; X64-NEXT:    movq %rax, %r13
+; X64-NEXT:    movq %rax, %rbx
 ; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:    movq %rdx, %rbp
 ; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; X64-NEXT:    subq $1, %r13
+; X64-NEXT:    subq $1, %rbx
 ; X64-NEXT:    sbbq $0, %rbp
-; X64-NEXT:    testq %rbx, %rbx
-; X64-NEXT:    sets %al
 ; X64-NEXT:    testq %r12, %r12
+; X64-NEXT:    sets %al
+; X64-NEXT:    testq %r13, %r13
 ; X64-NEXT:    sets %r14b
 ; X64-NEXT:    xorb %al, %r14b
 ; X64-NEXT:    movq %r15, %rdi
-; X64-NEXT:    movq %rbx, %rsi
+; X64-NEXT:    movq %r12, %rsi
 ; X64-NEXT:    movq (%rsp), %rdx # 8-byte Reload
-; X64-NEXT:    movq %r12, %rcx
+; X64-NEXT:    movq %r13, %rcx
 ; X64-NEXT:    callq __modti3@PLT
 ; X64-NEXT:    orq %rax, %rdx
 ; X64-NEXT:    setne %al
 ; X64-NEXT:    testb %r14b, %al
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Folded Reload
-; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
+; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Folded Reload
 ; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    testq %rbp, %rbp
-; X64-NEXT:    movq $-1, %rcx
-; X64-NEXT:    movq $-1, %rdx
-; X64-NEXT:    cmovsq %r13, %rdx
-; X64-NEXT:    cmoveq %r13, %rdx
 ; X64-NEXT:    cmovnsq %rax, %rbp
+; X64-NEXT:    movq $-1, %rcx
+; X64-NEXT:    cmovgq %rcx, %rbx
 ; X64-NEXT:    testq %rbp, %rbp
 ; X64-NEXT:    cmovnsq %rbp, %rcx
-; X64-NEXT:    cmovnsq %rdx, %rax
 ; X64-NEXT:    cmpq $-1, %rbp
-; X64-NEXT:    cmoveq %rdx, %rax
-; X64-NEXT:    shrdq $1, %rcx, %rax
+; X64-NEXT:    cmovlq %rax, %rbx
+; X64-NEXT:    shrdq $1, %rcx, %rbx
+; X64-NEXT:    movq %rbx, %rax
 ; X64-NEXT:    addq $24, %rsp
 ; X64-NEXT:    popq %rbx
 ; X64-NEXT:    popq %r12
 ; X64-NEXT:    popq %r13
 ; X64-NEXT:    popq %r14
 ; X64-NEXT:    popq %r15
 ; X64-NEXT:    popq %rbp
 ; X64-NEXT:    retq

 ; X86-NEXT:    pushl 16(%ebp)
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edx
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    pushl %ecx
 ; X86-NEXT:    pushl %eax
 ; X86-NEXT:    calll __divti3
 ; X86-NEXT:    addl $32, %esp
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X86-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    subl $1, %eax
-; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    sbbl $0, %esi
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT:    subl $1, %esi
 ; X86-NEXT:    movl %ecx, %eax
 ; X86-NEXT:    sbbl $0, %eax
 ; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT:    movl %edx, %eax
+; X86-NEXT:    sbbl $0, %eax
+; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
 ; X86-NEXT:    movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X86-NEXT:    sbbl $0, %ebx
 ; X86-NEXT:    testl %edi, %edi
 ; X86-NEXT:    sets %al
 ; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
 ; X86-NEXT:    testl %ecx, %ecx
 ; X86-NEXT:    sets %dl

 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    orl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    orl %eax, %ecx
 ; X86-NEXT:    setne %al
 ; X86-NEXT:    testb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
 ; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
 ; X86-NEXT:    cmovel {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
 ; X86-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT:    cmovel {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
-; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X86-NEXT:    cmovel {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
+; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT:    cmovel {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
 ; X86-NEXT:    cmovel {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
 ; X86-NEXT:    testl %ebx, %ebx
-; X86-NEXT:    movl $0, %edx
-; X86-NEXT:    cmovsl %ebx, %edx
-; X86-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    movl $2147483647, %edx # imm = 0x7FFFFFFF
-; X86-NEXT:    cmovsl %esi, %edx
-; X86-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    movl $-1, %edx
-; X86-NEXT:    cmovsl %eax, %edx
+; X86-NEXT:    movl $0, %eax
+; X86-NEXT:    cmovsl %ebx, %eax
+; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT:    movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT:    cmovsl %edx, %eax
+; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT:    movl $-1, %eax
+; X86-NEXT:    cmovsl %esi, %eax
 ; X86-NEXT:    movl %ebx, %edi
 ; X86-NEXT:    sarl $31, %edi
 ; X86-NEXT:    andl %ecx, %edi
 ; X86-NEXT:    testl %ebx, %ebx
 ; X86-NEXT:    cmovel %ebx, %edi
-; X86-NEXT:    cmpl $2147483647, %esi # imm = 0x7FFFFFFF
-; X86-NEXT:    movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT:    cmovael %eax, %esi
-; X86-NEXT:    movl $-1, %eax
-; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
-; X86-NEXT:    cmovbl %ecx, %eax
-; X86-NEXT:    cmovel %ecx, %eax
+; X86-NEXT:    movl %edx, %ecx
+; X86-NEXT:    cmpl $2147483646, %edx # imm = 0x7FFFFFFE
+; X86-NEXT:    movl $2147483647, %edx # imm = 0x7FFFFFFF
+; X86-NEXT:    cmovbel %ecx, %edx
+; X86-NEXT:    testl %ecx, %ecx
+; X86-NEXT:    movl $-1, %ecx
+; X86-NEXT:    cmovsl %ecx, %esi
 ; X86-NEXT:    orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
-; X86-NEXT:    cmovnel %edx, %eax
-; X86-NEXT:    cmovnel {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
-; X86-NEXT:    cmpl $-2147483648, %esi # imm = 0x80000000
-; X86-NEXT:    movl $0, %ecx
-; X86-NEXT:    cmoval %eax, %ecx
-; X86-NEXT:    cmovel %eax, %ecx
-; X86-NEXT:    movl $-2147483648, %edx # imm = 0x80000000
-; X86-NEXT:    cmoval %esi, %edx
+; X86-NEXT:    cmovnel %eax, %esi
+; X86-NEXT:    cmovnel {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT:    cmpl $-2147483647, %edx # imm = 0x80000001
+; X86-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
+; X86-NEXT:    cmovael %edx, %eax
+; X86-NEXT:    movl %edx, %ecx
+; X86-NEXT:    sarl $31, %ecx
+; X86-NEXT:    andl %esi, %ecx
 ; X86-NEXT:    cmpl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
-; X86-NEXT:    movl $0, %ebx
-; X86-NEXT:    cmovsl %ebx, %eax
 ; X86-NEXT:    movl $-2147483648, %ebx # imm = 0x80000000
+; X86-NEXT:    cmovsl %ebx, %edx
+; X86-NEXT:    movl $0, %ebx
 ; X86-NEXT:    cmovsl %ebx, %esi
 ; X86-NEXT:    andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
 ; X86-NEXT:    cmpl $-1, %edi
-; X86-NEXT:    cmovel %edx, %esi
-; X86-NEXT:    cmovel %ecx, %eax
-; X86-NEXT:    movl %esi, %edx
+; X86-NEXT:    cmovel %ecx, %esi
+; X86-NEXT:    cmovel %eax, %edx
+; X86-NEXT:    movl %esi, %eax
 ; X86-NEXT:    leal -12(%ebp), %esp
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl
   %tmp = call i64 @llvm.sdiv.fix.sat.i64(i64 %x, i64 %y, i32 31)
   ret i64 %tmp

 ; X64-NEXT:    sets %sil
 ; X64-NEXT:    testl %ecx, %ecx
 ; X64-NEXT:    sets %cl
 ; X64-NEXT:    xorb %sil, %cl
 ; X64-NEXT:    testl %edx, %edx
 ; X64-NEXT:    setne %dl
 ; X64-NEXT:    testb %cl, %dl
 ; X64-NEXT:    cmovel %eax, %edi
-; X64-NEXT:    cmpl $131071, %edi # imm = 0x1FFFF
+; X64-NEXT:    cmpl $131070, %edi # imm = 0x1FFFE
 ; X64-NEXT:    movl $131071, %ecx # imm = 0x1FFFF
-; X64-NEXT:    cmovll %edi, %ecx
-; X64-NEXT:    cmpl $-131072, %ecx # imm = 0xFFFE0000
+; X64-NEXT:    cmovlel %edi, %ecx
+; X64-NEXT:    cmpl $-131071, %ecx # imm = 0xFFFE0001
 ; X64-NEXT:    movl $-131072, %eax # imm = 0xFFFE0000
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func6:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movswl {{[0-9]+}}(%esp), %esi
 ; X86-NEXT:    movswl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    shll $7, %ecx
 ; X86-NEXT:    movl %ecx, %eax
 ; X86-NEXT:    cltd
 ; X86-NEXT:    idivl %esi
 ; X86-NEXT:    leal -1(%eax), %edi
 ; X86-NEXT:    testl %esi, %esi
 ; X86-NEXT:    sets %bl
 ; X86-NEXT:    testl %ecx, %ecx
 ; X86-NEXT:    sets %cl
 ; X86-NEXT:    xorb %bl, %cl
 ; X86-NEXT:    testl %edx, %edx
 ; X86-NEXT:    setne %dl
 ; X86-NEXT:    testb %cl, %dl
 ; X86-NEXT:    cmovel %eax, %edi
-; X86-NEXT:    cmpl $131071, %edi # imm = 0x1FFFF
+; X86-NEXT:    cmpl $131070, %edi # imm = 0x1FFFE
 ; X86-NEXT:    movl $131071, %ecx # imm = 0x1FFFF
-; X86-NEXT:    cmovll %edi, %ecx
-; X86-NEXT:    cmpl $-131072, %ecx # imm = 0xFFFE0000
+; X86-NEXT:    cmovlel %edi, %ecx
+; X86-NEXT:    cmpl $-131071, %ecx # imm = 0xFFFE0001
 ; X86-NEXT:    movl $-131072, %eax # imm = 0xFFFE0000
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    retl
   %x2 = sext i16 %x to i18
   %y2 = sext i16 %y to i18
   %tmp = call i18 @llvm.sdiv.fix.sat.i18(i18 %x2, i18 %y2, i32 7)
   ret i18 %tmp

 ; X64-NEXT:    movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
 ; X64-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
 ; X64-NEXT:    pxor %xmm2, %xmm2
 ; X64-NEXT:    pcmpgtd %xmm0, %xmm2
 ; X64-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
 ; X64-NEXT:    paddq %xmm0, %xmm0
 ; X64-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
 ; X64-NEXT:    movq %xmm0, %rbx
-; X64-NEXT:    movq %rbx, %rbp
-; X64-NEXT:    sarq $63, %rbp
-; X64-NEXT:    shldq $31, %rbx, %rbp
+; X64-NEXT:    movq %rbx, %r14
+; X64-NEXT:    sarq $63, %r14
+; X64-NEXT:    shldq $31, %rbx, %r14
 ; X64-NEXT:    pxor %xmm0, %xmm0
 ; X64-NEXT:    pcmpgtd %xmm1, %xmm0
 ; X64-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
 ; X64-NEXT:    movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
 ; X64-NEXT:    movq %xmm1, %rdx
 ; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:    movq %rdx, %r15
 ; X64-NEXT:    sarq $63, %r15
 ; X64-NEXT:    movq %rbx, %r12
 ; X64-NEXT:    shlq $31, %r12
 ; X64-NEXT:    movq %r12, %rdi
-; X64-NEXT:    movq %rbp, %rsi
+; X64-NEXT:    movq %r14, %rsi
 ; X64-NEXT:    movq %r15, %rcx
 ; X64-NEXT:    callq __divti3@PLT
 ; X64-NEXT:    movq %rax, %r13
 ; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; X64-NEXT:    movq %rdx, %r14
+; X64-NEXT:    movq %rdx, %rbp
 ; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:    subq $1, %r13
-; X64-NEXT:    sbbq $0, %r14
+; X64-NEXT:    sbbq $0, %rbp
 ; X64-NEXT:    shrq $63, %rbx
 ; X64-NEXT:    xorl %r15d, %ebx
 ; X64-NEXT:    movq %r12, %rdi
-; X64-NEXT:    movq %rbp, %rsi
+; X64-NEXT:    movq %r14, %rsi
 ; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:    movq %r15, %rcx
 ; X64-NEXT:    callq __modti3@PLT
 ; X64-NEXT:    orq %rax, %rdx
 ; X64-NEXT:    setne %al
 ; X64-NEXT:    testb %bl, %al
-; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
+; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Folded Reload
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
+; X64-NEXT:    movl $4294967294, %eax # imm = 0xFFFFFFFE
+; X64-NEXT:    cmpq %rax, %r13
 ; X64-NEXT:    movl $4294967295, %edx # imm = 0xFFFFFFFF
-; X64-NEXT:    cmpq %rdx, %r13
 ; X64-NEXT:    movl $4294967295, %eax # imm = 0xFFFFFFFF
-; X64-NEXT:    cmovbq %r13, %rax
+; X64-NEXT:    cmovbeq %r13, %rax
 ; X64-NEXT:    xorl %ecx, %ecx
-; X64-NEXT:    testq %r14, %r14
+; X64-NEXT:    testq %rbp, %rbp
 ; X64-NEXT:    cmovnsq %rdx, %r13
 ; X64-NEXT:    cmoveq %rax, %r13
-; X64-NEXT:    cmovnsq %rcx, %r14
+; X64-NEXT:    cmovnsq %rcx, %rbp
+; X64-NEXT:    movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
+; X64-NEXT:    cmpq %rax, %r13
 ; X64-NEXT:    movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
-; X64-NEXT:    cmpq %rcx, %r13
 ; X64-NEXT:    movq %rcx, %rax
-; X64-NEXT:    cmovaq %r13, %rax
-; X64-NEXT:    testq %r14, %r14
+; X64-NEXT:    cmovaeq %r13, %rax
+; X64-NEXT:    testq %rbp, %rbp
 ; X64-NEXT:    cmovsq %rcx, %r13
-; X64-NEXT:    cmpq $-1, %r14
+; X64-NEXT:    cmpq $-1, %rbp
 ; X64-NEXT:    cmoveq %rax, %r13
 ; X64-NEXT:    movq %r13, %xmm0
 ; X64-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
 ; X64-NEXT:    pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
 ; X64-NEXT:    # xmm0 = mem[2,3,2,3]
 ; X64-NEXT:    movq %xmm0, %rbx
 ; X64-NEXT:    movq %rbx, %r13
 ; X64-NEXT:    sarq $63, %r13

 ; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:    movq %rbp, %rcx
 ; X64-NEXT:    callq __modti3@PLT
 ; X64-NEXT:    orq %rax, %rdx
 ; X64-NEXT:    setne %al
 ; X64-NEXT:    testb %bl, %al
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Folded Reload
-; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
-; X64-NEXT:    cmpq %rcx, %r12
+; X64-NEXT:    movl $4294967294, %eax # imm = 0xFFFFFFFE
+; X64-NEXT:    cmpq %rax, %r12
 ; X64-NEXT:    movl $4294967295, %eax # imm = 0xFFFFFFFF
-; X64-NEXT:    cmovbq %r12, %rax
+; X64-NEXT:    cmovbeq %r12, %rax
 ; X64-NEXT:    testq %r14, %r14
+; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
 ; X64-NEXT:    cmovnsq %rcx, %r12
 ; X64-NEXT:    cmoveq %rax, %r12
 ; X64-NEXT:    movl $0, %eax
 ; X64-NEXT:    cmovnsq %rax, %r14
+; X64-NEXT:    movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
+; X64-NEXT:    cmpq %rax, %r12
 ; X64-NEXT:    movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
-; X64-NEXT:    cmpq %rcx, %r12
 ; X64-NEXT:    movq %rcx, %rax
-; X64-NEXT:    cmovaq %r12, %rax
+; X64-NEXT:    cmovaeq %r12, %rax
 ; X64-NEXT:    testq %r14, %r14
 ; X64-NEXT:    cmovsq %rcx, %r12
 ; X64-NEXT:    cmpq $-1, %r14
 ; X64-NEXT:    cmoveq %rax, %r12
 ; X64-NEXT:    movq %r12, %xmm0
 ; X64-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
 ; X64-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
 ; X64-NEXT:    psrlq $1, %xmm1

 ; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:    movq %rbp, %rcx
 ; X64-NEXT:    callq __modti3@PLT
 ; X64-NEXT:    orq %rax, %rdx
 ; X64-NEXT:    setne %al
 ; X64-NEXT:    testb %bl, %al
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
-; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
-; X64-NEXT:    cmpq %rcx, %r13
+; X64-NEXT:    movl $4294967294, %eax # imm = 0xFFFFFFFE
+; X64-NEXT:    cmpq %rax, %r13
 ; X64-NEXT:    movl $4294967295, %eax # imm = 0xFFFFFFFF
-; X64-NEXT:    cmovbq %r13, %rax
+; X64-NEXT:    cmovbeq %r13, %rax
 ; X64-NEXT:    testq %r14, %r14
+; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
 ; X64-NEXT:    cmovnsq %rcx, %r13
 ; X64-NEXT:    cmoveq %rax, %r13
 ; X64-NEXT:    movl $0, %eax
 ; X64-NEXT:    cmovnsq %rax, %r14
+; X64-NEXT:    movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
+; X64-NEXT:    cmpq %rax, %r13
 ; X64-NEXT:    movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
-; X64-NEXT:    cmpq %rcx, %r13
 ; X64-NEXT:    movq %rcx, %rax
-; X64-NEXT:    cmovaq %r13, %rax
+; X64-NEXT:    cmovaeq %r13, %rax
 ; X64-NEXT:    testq %r14, %r14
 ; X64-NEXT:    cmovsq %rcx, %r13
 ; X64-NEXT:    cmpq $-1, %r14
 ; X64-NEXT:    cmoveq %rax, %r13
 ; X64-NEXT:    movq %r13, %xmm0
 ; X64-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
 ; X64-NEXT:    pshufd $238, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
 ; X64-NEXT:    # xmm0 = mem[2,3,2,3]

 ; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:    movq %rbp, %rcx
 ; X64-NEXT:    callq __modti3@PLT
 ; X64-NEXT:    orq %rax, %rdx
 ; X64-NEXT:    setne %al
 ; X64-NEXT:    testb %bl, %al
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
 ; X64-NEXT:    cmoveq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Folded Reload
-; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
-; X64-NEXT:    cmpq %rcx, %r12
+; X64-NEXT:    movl $4294967294, %eax # imm = 0xFFFFFFFE
+; X64-NEXT:    cmpq %rax, %r12
 ; X64-NEXT:    movl $4294967295, %eax # imm = 0xFFFFFFFF
-; X64-NEXT:    cmovbq %r12, %rax
+; X64-NEXT:    cmovbeq %r12, %rax
 ; X64-NEXT:    testq %r14, %r14
+; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
 ; X64-NEXT:    cmovnsq %rcx, %r12
 ; X64-NEXT:    cmoveq %rax, %r12
 ; X64-NEXT:    movl $0, %eax
 ; X64-NEXT:    cmovnsq %rax, %r14
+; X64-NEXT:    movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
+; X64-NEXT:    cmpq %rax, %r12
 ; X64-NEXT:    movabsq $-4294967296, %rcx # imm = 0xFFFFFFFF00000000
-; X64-NEXT:    cmpq %rcx, %r12
 ; X64-NEXT:    movq %rcx, %rax
-; X64-NEXT:    cmovaq %r12, %rax
+; X64-NEXT:    cmovaeq %r12, %rax
 ; X64-NEXT:    testq %r14, %r14
 ; X64-NEXT:    cmovsq %rcx, %r12
 ; X64-NEXT:    cmpq $-1, %r14
 ; X64-NEXT:    cmoveq %rax, %r12
 ; X64-NEXT:    movq %r12, %xmm0
 ; X64-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
 ; X64-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
 ; X64-NEXT:    psrlq $1, %xmm1

llvm/test/CodeGen/X86/select.ll

entry:
   %sub = sext i1 %cmp to i16
   ret i16 %sub
 }
 
 define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
 ; GENERIC-LABEL: test18:
 ; GENERIC:       ## %bb.0:
 ; GENERIC-NEXT:    movl %esi, %eax
-; GENERIC-NEXT:    cmpl $15, %edi
-; GENERIC-NEXT:    cmovgel %edx, %eax
+; GENERIC-NEXT:    cmpl $14, %edi
+; GENERIC-NEXT:    cmovgl %edx, %eax
 ; GENERIC-NEXT:    ## kill: def $al killed $al killed $eax
 ; GENERIC-NEXT:    retq
 ;
 ; ATOM-LABEL: test18:
 ; ATOM:       ## %bb.0:
 ; ATOM-NEXT:    movl %esi, %eax
-; ATOM-NEXT:    cmpl $15, %edi
-; ATOM-NEXT:    cmovgel %edx, %eax
+; ATOM-NEXT:    cmpl $14, %edi
+; ATOM-NEXT:    cmovgl %edx, %eax
 ; ATOM-NEXT:    ## kill: def $al killed $al killed $eax
 ; ATOM-NEXT:    nop
 ; ATOM-NEXT:    nop
 ; ATOM-NEXT:    retq
 ;
 ; ATHLON-LABEL: test18:
 ; ATHLON:       ## %bb.0:
-; ATHLON-NEXT:    cmpl $15, {{[0-9]+}}(%esp)
+; ATHLON-NEXT:    cmpl $14, {{[0-9]+}}(%esp)
 ; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %eax
 ; ATHLON-NEXT:    leal {{[0-9]+}}(%esp), %ecx
-; ATHLON-NEXT:    cmovll %eax, %ecx
+; ATHLON-NEXT:    cmovlel %eax, %ecx
 ; ATHLON-NEXT:    movb (%ecx), %al
 ; ATHLON-NEXT:    retl
 ;
 ; MCU-LABEL: test18:
 ; MCU:       # %bb.0:
-; MCU-NEXT:    cmpl $15, %eax
-; MCU-NEXT:    jl .LBB19_2
+; MCU-NEXT:    cmpl $14, %eax
+; MCU-NEXT:    jle .LBB19_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %ecx, %edx
 ; MCU-NEXT:  .LBB19_2:
 ; MCU-NEXT:    movl %edx, %eax
 ; MCU-NEXT:    retl
   %cmp = icmp slt i32 %x, 15
   %sel = select i1 %cmp, i8 %a, i8 %b
   ret i8 %sel
; MCU-NEXT:    retl
   store i8 %conv, i8* %dst, align 2
   ret void
 }
 
 ; reproducer for pr29002
 define void @clamp(i32 %src, i16* %dst) {
 ; GENERIC-LABEL: clamp:
 ; GENERIC:       ## %bb.0:
-; GENERIC-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
+; GENERIC-NEXT:    cmpl $32768, %edi ## imm = 0x8000
 ; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
-; GENERIC-NEXT:    cmovlel %edi, %eax
-; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
+; GENERIC-NEXT:    cmovll %edi, %eax
+; GENERIC-NEXT:    cmpl $-32769, %eax ## imm = 0xFFFF7FFF
 ; GENERIC-NEXT:    movl $32768, %ecx ## imm = 0x8000
-; GENERIC-NEXT:    cmovgel %eax, %ecx
+; GENERIC-NEXT:    cmovgl %eax, %ecx
 ; GENERIC-NEXT:    movw %cx, (%rsi)
 ; GENERIC-NEXT:    retq
 ;
 ; ATOM-LABEL: clamp:
 ; ATOM:       ## %bb.0:
-; ATOM-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
+; ATOM-NEXT:    cmpl $32768, %edi ## imm = 0x8000
 ; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
 ; ATOM-NEXT:    movl $32768, %ecx ## imm = 0x8000
-; ATOM-NEXT:    cmovlel %edi, %eax
-; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
-; ATOM-NEXT:    cmovgel %eax, %ecx
+; ATOM-NEXT:    cmovll %edi, %eax
+; ATOM-NEXT:    cmpl $-32769, %eax ## imm = 0xFFFF7FFF
+; ATOM-NEXT:    cmovgl %eax, %ecx
 ; ATOM-NEXT:    movw %cx, (%rsi)
 ; ATOM-NEXT:    retq
 ;
 ; ATHLON-LABEL: clamp:
 ; ATHLON:       ## %bb.0:
 ; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; ATHLON-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; ATHLON-NEXT:    cmpl $32767, %ecx ## imm = 0x7FFF
+; ATHLON-NEXT:    cmpl $32768, %ecx ## imm = 0x8000
 ; ATHLON-NEXT:    movl $32767, %edx ## imm = 0x7FFF
-; ATHLON-NEXT:    cmovlel %ecx, %edx
-; ATHLON-NEXT:    cmpl $-32768, %edx ## imm = 0x8000
+; ATHLON-NEXT:    cmovll %ecx, %edx
+; ATHLON-NEXT:    cmpl $-32769, %edx ## imm = 0xFFFF7FFF
 ; ATHLON-NEXT:    movl $32768, %ecx ## imm = 0x8000
-; ATHLON-NEXT:    cmovgel %edx, %ecx
+; ATHLON-NEXT:    cmovgl %edx, %ecx
 ; ATHLON-NEXT:    movw %cx, (%eax)
 ; ATHLON-NEXT:    retl
 ;
 ; MCU-LABEL: clamp:
 ; MCU:       # %bb.0:
-; MCU-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
+; MCU-NEXT:    cmpl $32768, %eax # imm = 0x8000
 ; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
-; MCU-NEXT:    jg .LBB22_2
+; MCU-NEXT:    jge .LBB22_2
 ; MCU-NEXT:  # %bb.1:
 ; MCU-NEXT:    movl %eax, %ecx
 ; MCU-NEXT:  .LBB22_2:
-; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
+; MCU-NEXT:    cmpl $-32769, %ecx # imm = 0xFFFF7FFF
 ; MCU-NEXT:    movl $32768, %eax # imm = 0x8000
-; MCU-NEXT:    jl .LBB22_4
+; MCU-NEXT:    jle .LBB22_4
 ; MCU-NEXT:  # %bb.3:
 ; MCU-NEXT:    movl %ecx, %eax
 ; MCU-NEXT:  .LBB22_4:
 ; MCU-NEXT:    movw %ax, (%edx)
 ; MCU-NEXT:    retl
   %cmp = icmp sgt i32 %src, 32767
   %sel1 = select i1 %cmp, i32 32767, i32 %src
   %cmp1 = icmp slt i32 %sel1, -32768

llvm/test/CodeGen/X86/select_const.ll

; CHECK-NEXT:    retq
   ret i64 %sel
 }
 
 ; Should this be 'sbb x,x' or 'sbb 0,x' with simpler LEA or add?
 
 define i64 @sel_1_2(i64 %x, i64 %y) {
 ; CHECK-LABEL: sel_1_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpq $42, %rdi
-; CHECK-NEXT:    sbbq $0, %rsi
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpq $41, %rdi
+; CHECK-NEXT:    setbe %al
+; CHECK-NEXT:    subq %rax, %rsi
 ; CHECK-NEXT:    leaq 2(%rsi), %rax
 ; CHECK-NEXT:    retq
   %cmp = icmp ult i64 %x, 42
   %sel = select i1 %cmp, i64 1, i64 2
   %sub = add i64 %sel, %y
   ret i64 %sub
 }
 
 ; No LEA with 8-bit, but this shouldn't need branches or cmov.
 
 define i8 @sel_1_neg1(i32 %x) {
 ; CHECK-LABEL: sel_1_neg1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $42, %edi
-; CHECK-NEXT:    setg %al
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
 ; CHECK-NEXT:    shlb $2, %al
 ; CHECK-NEXT:    decb %al
 ; CHECK-NEXT:    retq
   %cmp = icmp sgt i32 %x, 42
   %sel = select i1 %cmp, i8 3, i8 -1
   ret i8 %sel
 }
 
 ; We get an LEA for 16-bit because we ignore the high-bits.
 
 define i16 @sel_neg1_1(i32 %x) {
 ; CHECK-LABEL: sel_neg1_1:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $43, %edi
-; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    cmpl $42, %edi
+; CHECK-NEXT:    setle %al
 ; CHECK-NEXT:    leal -1(,%rax,4), %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
   %cmp = icmp sgt i32 %x, 42
   %sel = select i1 %cmp, i16 -1, i16 3
   ret i16 %sel
 }
 
 ; If the comparison is available, the predicate can be inverted.
 
 define i32 @sel_1_neg1_32(i32 %x) {
 ; CHECK-LABEL: sel_1_neg1_32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $42, %edi
-; CHECK-NEXT:    setg %al
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
 ; CHECK-NEXT:    leal -1(%rax,%rax,8), %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp sgt i32 %x, 42
   %sel = select i1 %cmp, i32 8, i32 -1
   ret i32 %sel
 }
 
 define i32 @sel_neg1_1_32(i32 %x) {
 ; CHECK-LABEL: sel_neg1_1_32:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpl $43, %edi
-; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    cmpl $42, %edi
+; CHECK-NEXT:    setle %al
 ; CHECK-NEXT:    leal -7(%rax,%rax,8), %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp sgt i32 %x, 42
   %sel = select i1 %cmp, i32 -7, i32 2
   ret i32 %sel
 }
 
 
; CHECK-NEXT:    retq
   ret i64 %sel
 }
 
 ; This doesn't need a branch, but don't do the wrong thing if subtraction of the constants overflows.
 
 define i8 @sel_67_neg125(i32 %x) {
 ; CHECK-LABEL: sel_67_neg125:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cmpl $42, %edi
+; CHECK-NEXT:    cmpl $43, %edi
 ; CHECK-NEXT:    movl $67, %ecx
 ; CHECK-NEXT:    movl $131, %eax
-; CHECK-NEXT:    cmovgl %ecx, %eax
+; CHECK-NEXT:    cmovgel %ecx, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
   %cmp = icmp sgt i32 %x, 42
   %sel = select i1 %cmp, i8 67, i8 -125
   ret i8 %sel
 }
 
 

llvm/test/CodeGen/X86/setcc-logic.ll

; CHECK-NEXT:    retq
   %c = or <4 x i1> %a, %b
   ret <4 x i1> %c
 }
 
 define zeroext i1 @ne_neg1_and_ne_zero(i64 %x) nounwind {
 ; CHECK-LABEL: ne_neg1_and_ne_zero:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    incq %rdi
-; CHECK-NEXT:    cmpq $1, %rdi
-; CHECK-NEXT:    seta %al
+; CHECK-NEXT:    cmpq $2, %rdi
+; CHECK-NEXT:    setae %al
 ; CHECK-NEXT:    retq
   %cmp1 = icmp ne i64 %x, -1
   %cmp2 = icmp ne i64 %x, 0
   %and = and i1 %cmp1, %cmp2
   ret i1 %and
 }
 
 ; PR32401 - https://bugs.llvm.org/show_bug.cgi?id=32401

 
 ; Negative test - wrong comparison
 
 define i1 @and_icmps_const_1bit_diff_wrong_pred(i32 %x) {
 ; CHECK-LABEL: and_icmps_const_1bit_diff_wrong_pred:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    cmpl $43, %edi
 ; CHECK-NEXT:    sete %cl
-; CHECK-NEXT:    cmpl $45, %edi
-; CHECK-NEXT:    setl %al
+; CHECK-NEXT:    cmpl $44, %edi
+; CHECK-NEXT:    setle %al
 ; CHECK-NEXT:    orb %cl, %al
 ; CHECK-NEXT:    retq
   %a = icmp eq i32 %x, 43
   %b = icmp slt i32 %x, 45
   %r = or i1 %a, %b
   ret i1 %r
 }
 

llvm/test/CodeGen/X86/setcc-lowering.ll

 define void @pr26232(i64 %a, <16 x i1> %b) {
 ; AVX-LABEL: pr26232:
 ; AVX:       # %bb.0: # %allocas
 ; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
 ; AVX-NEXT:    .p2align 4, 0x90
 ; AVX-NEXT:  .LBB1_1: # %for_loop599
 ; AVX-NEXT:    # =>This Inner Loop Header: Depth=1
 ; AVX-NEXT:    xorl %eax, %eax
-; AVX-NEXT:    cmpq $65536, %rdi # imm = 0x10000
-; AVX-NEXT:    setl %al
+; AVX-NEXT:    cmpq $65535, %rdi # imm = 0xFFFF
+; AVX-NEXT:    setle %al
 ; AVX-NEXT:    vmovd %eax, %xmm2
 ; AVX-NEXT:    vpshufb %xmm1, %xmm2, %xmm2
 ; AVX-NEXT:    vpand %xmm0, %xmm2, %xmm2
 ; AVX-NEXT:    vpsllw $7, %xmm2, %xmm2
 ; AVX-NEXT:    vpmovmskb %xmm2, %eax
 ; AVX-NEXT:    testl %eax, %eax
 ; AVX-NEXT:    jne .LBB1_1
 ; AVX-NEXT:  # %bb.2: # %for_exit600

llvm/test/CodeGen/X86/setcc.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; rdar://7329206
 
 define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
 ; CHECK-LABEL: t1:
 ; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpw $26, %di
-; CHECK-NEXT:    seta %al
+; CHECK-NEXT:    cmpw $27, %di
+; CHECK-NEXT:    setae %al
 ; CHECK-NEXT:    shll $5, %eax
 ; CHECK-NEXT:    retq
   %t0 = icmp ugt i16 %x, 26
   %if = select i1 %t0, i16 32, i16 0
   ret i16 %if
 }
 
 define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
 ; CHECK-LABEL: t2:
 ; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpw $26, %di
-; CHECK-NEXT:    setb %al
+; CHECK-NEXT:    cmpw $25, %di
+; CHECK-NEXT:    setbe %al
 ; CHECK-NEXT:    shll $5, %eax
 ; CHECK-NEXT:    retq
   %t0 = icmp ult i16 %x, 26
   %if = select i1 %t0, i16 32, i16 0
   ret i16 %if
 }
 
 define i64 @t3(i64 %x) nounwind readnone ssp {
 ; CHECK-LABEL: t3:
 ; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpq $18, %rdi
-; CHECK-NEXT:    setb %al
+; CHECK-NEXT:    cmpq $17, %rdi
+; CHECK-NEXT:    setbe %al
 ; CHECK-NEXT:    shlq $6, %rax
 ; CHECK-NEXT:    retq
   %t0 = icmp ult i64 %x, 18
   %if = select i1 %t0, i64 64, i64 0
   ret i64 %if
 }
 
 @v4 = common global i32 0, align 4

llvm/test/CodeGen/X86/shift-i128.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=ALL,i686
 ; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=ALL,x86_64
 
 ;
 ; Scalars
 ;
 
 define void @test_lshr_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
 ; i686-LABEL: test_lshr_i128:
 ; i686:       # %bb.0: # %entry
 ; i686-NEXT:    pushl %ebp
 ; i686-NEXT:    pushl %ebx
 ; i686-NEXT:    pushl %edi
 ; i686-NEXT:    pushl %esi
-; i686-NEXT:    subl $20, %esp
+; i686-NEXT:    subl $8, %esp
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; i686-NEXT:    movb {{[0-9]+}}(%esp), %al
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebp
-; i686-NEXT:    movl %ebp, %esi
-; i686-NEXT:    movl %eax, %ecx
-; i686-NEXT:    shrdl %cl, %edi, %esi
-; i686-NEXT:    shrl %cl, %edx
+; i686-NEXT:    movb {{[0-9]+}}(%esp), %ch
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; i686-NEXT:    movl %ebx, %edi
+; i686-NEXT:    movb %ch, %cl
 ; i686-NEXT:    shrl %cl, %edi
-; i686-NEXT:    movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; i686-NEXT:    testb $32, %al
+; i686-NEXT:    movl %edx, %esi
+; i686-NEXT:    shrl %cl, %esi
+; i686-NEXT:    shrdl %cl, %edx, %eax
+; i686-NEXT:    testb $32, %ch
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebp
 ; i686-NEXT:    jne .LBB0_1
 ; i686-NEXT:  # %bb.2: # %entry
-; i686-NEXT:    movl %edx, (%esp) # 4-byte Spill
+; i686-NEXT:    movl %edi, (%esp) # 4-byte Spill
 ; i686-NEXT:    jmp .LBB0_3
 ; i686-NEXT:  .LBB0_1:
-; i686-NEXT:    movl %edi, %esi
+; i686-NEXT:    movl %esi, %eax
 ; i686-NEXT:    movl $0, (%esp) # 4-byte Folded Spill
-; i686-NEXT:    xorl %edi, %edi
+; i686-NEXT:    xorl %esi, %esi
 ; i686-NEXT:  .LBB0_3: # %entry
-; i686-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    movl %eax, %edx
-; i686-NEXT:    subb $64, %dl
-; i686-NEXT:    jb .LBB0_5
+; i686-NEXT:    movl %ebp, %edx
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    shrdl %cl, %ebx, %edx
+; i686-NEXT:    testb $32, %ch
+; i686-NEXT:    jne .LBB0_5
 ; i686-NEXT:  # %bb.4: # %entry
-; i686-NEXT:    xorl %edi, %edi
+; i686-NEXT:    movl %edx, %edi
 ; i686-NEXT:  .LBB0_5: # %entry
 ; i686-NEXT:    movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    negb %dl
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
-; i686-NEXT:    movl %edx, %ecx
+; i686-NEXT:    movb $64, %cl
+; i686-NEXT:    subb %ch, %cl
+; i686-NEXT:    movl %ebx, %edi
 ; i686-NEXT:    shldl %cl, %ebp, %edi
-; i686-NEXT:    movl %ebp, %esi
-; i686-NEXT:    shll %cl, %esi
-; i686-NEXT:    testb $32, %dl
-; i686-NEXT:    movl %esi, %ebx
-; i686-NEXT:    jne .LBB0_7
-; i686-NEXT:  # %bb.6: # %entry
-; i686-NEXT:    movl %edi, %ebx
+; i686-NEXT:    movl %ebp, %edx
+; i686-NEXT:    shll %cl, %edx
+; i686-NEXT:    testb $32, %cl
+; i686-NEXT:    je .LBB0_7
+; i686-NEXT:  # %bb.6:
+; i686-NEXT:    movl %edx, %edi
+; i686-NEXT:    xorl %edx, %edx
 ; i686-NEXT:  .LBB0_7: # %entry
-; i686-NEXT:    movb %al, %ah
-; i686-NEXT:    addb $-64, %ah
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
-; i686-NEXT:    movb %ah, %cl
-; i686-NEXT:    shrl %cl, %edi
-; i686-NEXT:    testb $32, %ah
-; i686-NEXT:    movl $0, %ecx
-; i686-NEXT:    jne .LBB0_9
-; i686-NEXT:  # %bb.8: # %entry
-; i686-NEXT:    movl %edi, %ecx
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    addb $-64, %cl
+; i686-NEXT:    shrdl %cl, %ebx, %ebp
+; i686-NEXT:    shrl %cl, %ebx
+; i686-NEXT:    testb $32, %cl
+; i686-NEXT:    je .LBB0_9
+; i686-NEXT:  # %bb.8:
+; i686-NEXT:    movl %ebx, %ebp
+; i686-NEXT:    xorl %ebx, %ebx
 ; i686-NEXT:  .LBB0_9: # %entry
-; i686-NEXT:    cmpb $64, %al
-; i686-NEXT:    jb .LBB0_10
+; i686-NEXT:    cmpb $63, %ch
+; i686-NEXT:    jbe .LBB0_10
 ; i686-NEXT:  # %bb.11: # %entry
-; i686-NEXT:    movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; i686-NEXT:    xorl %esi, %esi
+; i686-NEXT:    xorl %edi, %edi
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; i686-NEXT:    jmp .LBB0_12
 ; i686-NEXT:  .LBB0_10:
-; i686-NEXT:    movl (%esp), %ecx # 4-byte Reload
-; i686-NEXT:    orl %ebx, %ecx
+; i686-NEXT:    orl %edx, %eax
+; i686-NEXT:    orl %edi, %esi
+; i686-NEXT:    movl %esi, %ebx
+; i686-NEXT:    movl %eax, %ebp
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; i686-NEXT:    movl (%esp), %edi # 4-byte Reload
 ; i686-NEXT:  .LBB0_12: # %entry
-; i686-NEXT:    movl %ecx, (%esp) # 4-byte Spill
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
-; i686-NEXT:    testb $32, %dl
-; i686-NEXT:    jne .LBB0_14
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; i686-NEXT:    testb %ch, %ch
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; i686-NEXT:    je .LBB0_14
 ; i686-NEXT:  # %bb.13: # %entry
-; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:  .LBB0_14: # %entry
+; i686-NEXT:    movl %ebp, %ecx
 ; i686-NEXT:    movl %ebx, %edx
-; i686-NEXT:    movl %eax, %ecx
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; i686-NEXT:    shrdl %cl, %esi, %edx
-; i686-NEXT:    testb $32, %al
-; i686-NEXT:    jne .LBB0_16
-; i686-NEXT:  # %bb.15: # %entry
-; i686-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:  .LBB0_16: # %entry
-; i686-NEXT:    movb %ah, %cl
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; i686-NEXT:    shrdl %cl, %edx, %ebp
-; i686-NEXT:    testb $32, %ah
-; i686-NEXT:    jne .LBB0_18
-; i686-NEXT:  # %bb.17: # %entry
-; i686-NEXT:    movl %ebp, %edi
-; i686-NEXT:  .LBB0_18: # %entry
-; i686-NEXT:    cmpb $64, %al
-; i686-NEXT:    jae .LBB0_20
-; i686-NEXT:  # %bb.19:
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; i686-NEXT:    orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
-; i686-NEXT:  .LBB0_20: # %entry
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; i686-NEXT:    testb %al, %al
-; i686-NEXT:    je .LBB0_22
-; i686-NEXT:  # %bb.21: # %entry
-; i686-NEXT:    movl %edi, %ebx
-; i686-NEXT:    movl (%esp), %esi # 4-byte Reload
-; i686-NEXT:  .LBB0_22: # %entry
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; i686-NEXT:    movl %eax, 12(%ecx)
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; i686-NEXT:    movl %eax, 8(%ecx)
-; i686-NEXT:    movl %esi, 4(%ecx)
-; i686-NEXT:    movl %ebx, (%ecx)
-; i686-NEXT:    addl $20, %esp
+; i686-NEXT:  .LBB0_14: # %entry
+; i686-NEXT:    movl %edi, 12(%eax)
+; i686-NEXT:    movl %esi, 8(%eax)
+; i686-NEXT:    movl %edx, 4(%eax)
+; i686-NEXT:    movl %ecx, (%eax)
+; i686-NEXT:    addl $8, %esp
 ; i686-NEXT:    popl %esi
 ; i686-NEXT:    popl %edi
 ; i686-NEXT:    popl %ebx
 ; i686-NEXT:    popl %ebp
 ; i686-NEXT:    retl
 ;
 ; x86_64-LABEL: test_lshr_i128:
 ; x86_64:       # %bb.0: # %entry

 
 define void @test_ashr_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
 ; i686-LABEL: test_ashr_i128:
 ; i686:       # %bb.0: # %entry
 ; i686-NEXT:    pushl %ebp
 ; i686-NEXT:    pushl %ebx
 ; i686-NEXT:    pushl %edi
 ; i686-NEXT:    pushl %esi
-; i686-NEXT:    subl $24, %esp
+; i686-NEXT:    subl $12, %esp
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; i686-NEXT:    movb {{[0-9]+}}(%esp), %al
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; i686-NEXT:    movb {{[0-9]+}}(%esp), %ch
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; i686-NEXT:    movl %edi, %ebx
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    sarl %cl, %ebx
+; i686-NEXT:    movl %edx, %esi
+; i686-NEXT:    shrl %cl, %esi
+; i686-NEXT:    shrdl %cl, %edx, %eax
+; i686-NEXT:    movl %edi, %edx
+; i686-NEXT:    sarl $31, %edx
+; i686-NEXT:    testb $32, %ch
 ; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebp
-; i686-NEXT:    movl %ebp, %esi
-; i686-NEXT:    movl %eax, %ecx
-; i686-NEXT:    shrdl %cl, %ebx, %esi
-; i686-NEXT:    shrl %cl, %edx
-; i686-NEXT:    movl %ebx, %edi
-; i686-NEXT:    sarl %cl, %edi
-; i686-NEXT:    sarl $31, %ebx
-; i686-NEXT:    movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; i686-NEXT:    testb $32, %al
-; i686-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; i686-NEXT:    jne .LBB1_1
 ; i686-NEXT:  # %bb.2: # %entry
-; i686-NEXT:    movl %edx, (%esp) # 4-byte Spill
+; i686-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    movl %ebx, (%esp) # 4-byte Spill
 ; i686-NEXT:    jmp .LBB1_3
 ; i686-NEXT:  .LBB1_1:
-; i686-NEXT:    movl %edi, %esi
-; i686-NEXT:    movl $0, (%esp) # 4-byte Folded Spill
-; i686-NEXT:    movl %ebx, %edi
-; i686-NEXT:  .LBB1_3: # %entry
 ; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    movl %eax, %edx
-; i686-NEXT:    subb $64, %dl
-; i686-NEXT:    jb .LBB1_5
+; i686-NEXT:    movl %edx, (%esp) # 4-byte Spill
+; i686-NEXT:    xorl %esi, %esi
+; i686-NEXT:  .LBB1_3: # %entry
+; i686-NEXT:    movl %edx, %ebx
+; i686-NEXT:    movl %ebp, %eax
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    shrdl %cl, %edi, %eax
+; i686-NEXT:    testb $32, %ch
+; i686-NEXT:    jne .LBB1_5
 ; i686-NEXT:  # %bb.4: # %entry
-; i686-NEXT:    movl %ebx, %edi
+; i686-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; i686-NEXT:  .LBB1_5: # %entry
-; i686-NEXT:    movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    negb %dl
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
-; i686-NEXT:    movl %edx, %ecx
-; i686-NEXT:    shldl %cl, %ebp, %edi
-; i686-NEXT:    movl %ebp, %esi
-; i686-NEXT:    shll %cl, %esi
-; i686-NEXT:    testb $32, %dl
-; i686-NEXT:    movl %esi, %ecx
-; i686-NEXT:    jne .LBB1_7
-; i686-NEXT:  # %bb.6: # %entry
-; i686-NEXT:    movl %edi, %ecx
+; i686-NEXT:    movb $64, %cl
+; i686-NEXT:    subb %ch, %cl
+; i686-NEXT:    movl %edi, %eax
+; i686-NEXT:    shldl %cl, %ebp, %eax
+; i686-NEXT:    movl %ebp, %edx
+; i686-NEXT:    shll %cl, %edx
+; i686-NEXT:    testb $32, %cl
+; i686-NEXT:    je .LBB1_7
+; i686-NEXT:  # %bb.6:
+; i686-NEXT:    movl %edx, %eax
+; i686-NEXT:    xorl %edx, %edx
 ; i686-NEXT:  .LBB1_7: # %entry
-; i686-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    movb %al, %ah
-; i686-NEXT:    addb $-64, %ah
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
-; i686-NEXT:    movb %ah, %cl
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    addb $-64, %cl
+; i686-NEXT:    shrdl %cl, %edi, %ebp
 ; i686-NEXT:    sarl %cl, %edi
-; i686-NEXT:    testb $32, %ah
-; i686-NEXT:    movl %ebx, %ecx
-; i686-NEXT:    jne .LBB1_9
-; i686-NEXT:  # %bb.8: # %entry
-; i686-NEXT:    movl %edi, %ecx
+; i686-NEXT:    testb $32, %cl
+; i686-NEXT:    je .LBB1_9
+; i686-NEXT:  # %bb.8:
+; i686-NEXT:    movl %edi, %ebp
+; i686-NEXT:    movl %ebx, %edi
 ; i686-NEXT:  .LBB1_9: # %entry
-; i686-NEXT:    cmpb $64, %al
-; i686-NEXT:    jb .LBB1_10
+; i686-NEXT:    cmpb $63, %ch
+; i686-NEXT:    jbe .LBB1_10
 ; i686-NEXT:  # %bb.11: # %entry
-; i686-NEXT:    movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    movl %ebx, %esi
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; i686-NEXT:    jmp .LBB1_12
 ; i686-NEXT:  .LBB1_10:
-; i686-NEXT:    movl (%esp), %ecx # 4-byte Reload
-; i686-NEXT:    orl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
+; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
+; i686-NEXT:    orl %edx, %ebp
+; i686-NEXT:    orl %eax, %esi
+; i686-NEXT:    movl %esi, %edi
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; i686-NEXT:    movl (%esp), %ebx # 4-byte Reload
 ; i686-NEXT:  .LBB1_12: # %entry
-; i686-NEXT:    movl %ecx, (%esp) # 4-byte Spill
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
-; i686-NEXT:    testb $32, %dl
-; i686-NEXT:    jne .LBB1_14
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; i686-NEXT:    testb %ch, %ch
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; i686-NEXT:    je .LBB1_14
 ; i686-NEXT:  # %bb.13: # %entry
-; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    movl %ebp, %ecx
+; i686-NEXT:    movl %edi, %edx
 ; i686-NEXT:  .LBB1_14: # %entry
-; i686-NEXT:    movl %ebx, %edx
-; i686-NEXT:    movl %eax, %ecx
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; i686-NEXT:    shrdl %cl, %esi, %edx
-; i686-NEXT:    testb $32, %al
-; i686-NEXT:    jne .LBB1_16
-; i686-NEXT:  # %bb.15: # %entry
-; i686-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:  .LBB1_16: # %entry
-; i686-NEXT:    movb %ah, %cl
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; i686-NEXT:    shrdl %cl, %edx, %ebp
-; i686-NEXT:    testb $32, %ah
-; i686-NEXT:    jne .LBB1_18
-; i686-NEXT:  # %bb.17: # %entry
-; i686-NEXT:    movl %ebp, %edi
-; i686-NEXT:  .LBB1_18: # %entry
-; i686-NEXT:    cmpb $64, %al
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
-; i686-NEXT:    jae .LBB1_20
-; i686-NEXT:  # %bb.19:
-; i686-NEXT:    orl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
-; i686-NEXT:    movl %ecx, %edi
-; i686-NEXT:  .LBB1_20: # %entry
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; i686-NEXT:    testb %al, %al
-; i686-NEXT:    je .LBB1_22
-; i686-NEXT:  # %bb.21: # %entry
-; i686-NEXT:    movl %edi, %ebx
-; i686-NEXT:    movl (%esp), %esi # 4-byte Reload
-; i686-NEXT:  .LBB1_22: # %entry
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; i686-NEXT:    movl %eax, 12(%ecx)
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; i686-NEXT:    movl %eax, 8(%ecx)
-; i686-NEXT:    movl %esi, 4(%ecx)
-; i686-NEXT:    movl %ebx, (%ecx)
-; i686-NEXT:    addl $24, %esp
+; i686-NEXT:    movl %ebx, 12(%eax)
+; i686-NEXT:    movl %esi, 8(%eax)
+; i686-NEXT:    movl %edx, 4(%eax)
+; i686-NEXT:    movl %ecx, (%eax)
+; i686-NEXT:    addl $12, %esp
 ; i686-NEXT:    popl %esi
 ; i686-NEXT:    popl %edi
 ; i686-NEXT:    popl %ebx
 ; i686-NEXT:    popl %ebp
 ; i686-NEXT:    retl
 ;
 ; x86_64-LABEL: test_ashr_i128:
 ; x86_64:       # %bb.0: # %entry

 
 define void @test_shl_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
 ; i686-LABEL: test_shl_i128:
 ; i686:       # %bb.0: # %entry
 ; i686-NEXT:    pushl %ebp
 ; i686-NEXT:    pushl %ebx
 ; i686-NEXT:    pushl %edi
 ; i686-NEXT:    pushl %esi
-; i686-NEXT:    subl $20, %esp
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebp
+; i686-NEXT:    subl $16, %esp
 ; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
-; i686-NEXT:    movb {{[0-9]+}}(%esp), %al
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
-; i686-NEXT:    movl %eax, %ecx
-; i686-NEXT:    shll %cl, %ebx
-; i686-NEXT:    movl %ebp, %esi
-; i686-NEXT:    shll %cl, %esi
-; i686-NEXT:    movl %edi, %edx
-; i686-NEXT:    shldl %cl, %ebp, %edx
-; i686-NEXT:    movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; i686-NEXT:    testb $32, %al
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; i686-NEXT:    movb {{[0-9]+}}(%esp), %ch
+; i686-NEXT:    movb $64, %cl
+; i686-NEXT:    subb %ch, %cl
+; i686-NEXT:    movl %esi, %ebx
+; i686-NEXT:    shrl %cl, %ebx
+; i686-NEXT:    shrdl %cl, %esi, %edx
+; i686-NEXT:    testb $32, %cl
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; i686-NEXT:    jne .LBB2_1
 ; i686-NEXT:  # %bb.2: # %entry
-; i686-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; i686-NEXT:    movl %ebx, (%esp) # 4-byte Spill
 ; i686-NEXT:    jmp .LBB2_3
 ; i686-NEXT:  .LBB2_1:
-; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    movl %ebx, %edx
 ; i686-NEXT:    movl $0, (%esp) # 4-byte Folded Spill
-; i686-NEXT:    xorl %esi, %esi
 ; i686-NEXT:  .LBB2_3: # %entry
-; i686-NEXT:    movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    movl %eax, %edx
-; i686-NEXT:    subb $64, %dl
-; i686-NEXT:    jb .LBB2_5
-; i686-NEXT:  # %bb.4: # %entry
-; i686-NEXT:    xorl %esi, %esi
-; i686-NEXT:  .LBB2_5: # %entry
-; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:    negb %dl
-; i686-NEXT:    movl %edi, %esi
-; i686-NEXT:    movl %edx, %ecx
-; i686-NEXT:    shrl %cl, %esi
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
-; i686-NEXT:    shrdl %cl, %edi, %ebx
-; i686-NEXT:    testb $32, %dl
-; i686-NEXT:    movl %esi, %ebp
-; i686-NEXT:    jne .LBB2_7
-; i686-NEXT:  # %bb.6: # %entry
-; i686-NEXT:    movl %ebx, %ebp
-; i686-NEXT:  .LBB2_7: # %entry
-; i686-NEXT:    movb %al, %ah
-; i686-NEXT:    addb $-64, %ah
+; i686-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    shldl %cl, %edi, %eax
 ; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebx
-; i686-NEXT:    movb %ah, %cl
 ; i686-NEXT:    shll %cl, %ebx
-; i686-NEXT:    testb $32, %ah
-; i686-NEXT:    movl $0, %ecx
-; i686-NEXT:    jne .LBB2_9
-; i686-NEXT:  # %bb.8: # %entry
-; i686-NEXT:    movl %ebx, %ecx
-; i686-NEXT:  .LBB2_9: # %entry
-; i686-NEXT:    cmpb $64, %al
-; i686-NEXT:    jb .LBB2_10
-; i686-NEXT:  # %bb.11: # %entry
+; i686-NEXT:    shll %cl, %edi
+; i686-NEXT:    testb $32, %ch
+; i686-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    jne .LBB2_4
+; i686-NEXT:  # %bb.5: # %entry
+; i686-NEXT:    movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT:    jmp .LBB2_6
+; i686-NEXT:  .LBB2_4:
+; i686-NEXT:    movl %edi, %eax
 ; i686-NEXT:    movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; i686-NEXT:    jmp .LBB2_12
-; i686-NEXT:  .LBB2_10:
-; i686-NEXT:    movl (%esp), %ecx # 4-byte Reload
-; i686-NEXT:    orl %ebp, %ecx
-; i686-NEXT:  .LBB2_12: # %entry
+; i686-NEXT:    xorl %edi, %edi
+; i686-NEXT:  .LBB2_6: # %entry
+; i686-NEXT:    movl %esi, %edx
+; i686-NEXT:    movb %ch, %cl
 ; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebp
-; i686-NEXT:    movl %ecx, (%esp) # 4-byte Spill
-; i686-NEXT:    testb $32, %dl
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; i686-NEXT:    jne .LBB2_14
-; i686-NEXT:  # %bb.13: # %entry
-; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:  .LBB2_14: # %entry
-; i686-NEXT:    movl %edx, %esi
-; i686-NEXT:    movl %eax, %ecx
+; i686-NEXT:    shldl %cl, %ebp, %edx
+; i686-NEXT:    testb $32, %ch
+; i686-NEXT:    jne .LBB2_8
+; i686-NEXT:  # %bb.7: # %entry
+; i686-NEXT:    movl %edx, %ebx
+; i686-NEXT:  .LBB2_8: # %entry
+; i686-NEXT:    movb %ch, %cl
+; i686-NEXT:    addb $-64, %cl
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %ebp
+; i686-NEXT:    movl %ebp, %edx
+; i686-NEXT:    shll %cl, %edx
 ; i686-NEXT:    shldl %cl, %ebp, %esi
-; i686-NEXT:    testb $32, %al
-; i686-NEXT:    jne .LBB2_16
-; i686-NEXT:  # %bb.15: # %entry
+; i686-NEXT:    testb $32, %cl
+; i686-NEXT:    je .LBB2_10
+; i686-NEXT:  # %bb.9:
+; i686-NEXT:    movl %edx, %esi
+; i686-NEXT:    xorl %edx, %edx
+; i686-NEXT:  .LBB2_10: # %entry
+; i686-NEXT:    cmpb $63, %ch
+; i686-NEXT:    jbe .LBB2_11
+; i686-NEXT:  # %bb.12: # %entry
+; i686-NEXT:    xorl %ebx, %ebx
+; i686-NEXT:    xorl %ebp, %ebp
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; i686-NEXT:    jmp .LBB2_13
+; i686-NEXT:  .LBB2_11:
+; i686-NEXT:    orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
+; i686-NEXT:    orl (%esp), %eax # 4-byte Folded Reload
+; i686-NEXT:    movl %eax, %esi
+; i686-NEXT:    movl %edi, %edx
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
+; i686-NEXT:  .LBB2_13: # %entry
+; i686-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; i686-NEXT:    testb %ch, %ch
+; i686-NEXT:    je .LBB2_15
+; i686-NEXT:  # %bb.14: # %entry
+; i686-NEXT:    movl %edx, %edi
 ; i686-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT:  .LBB2_16: # %entry
-; i686-NEXT:    movb %ah, %cl
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; i686-NEXT:    shldl %cl, %esi, %edi
-; i686-NEXT:    testb $32, %ah
-; i686-NEXT:    jne .LBB2_18
-; i686-NEXT:  # %bb.17: # %entry
-; i686-NEXT:    movl %edi, %ebx
-; i686-NEXT:  .LBB2_18: # %entry
-; i686-NEXT:    cmpb $64, %al
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; i686-NEXT:    jae .LBB2_20
-; i686-NEXT:  # %bb.19:
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
-; i686-NEXT:    orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
-; i686-NEXT:  .LBB2_20: # %entry
-; i686-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; i686-NEXT:    testb %al, %al
-; i686-NEXT:    je .LBB2_22
-; i686-NEXT:  # %bb.21: # %entry
-; i686-NEXT:    movl %ebx, %edx
-; i686-NEXT:    movl (%esp), %ebp # 4-byte Reload
-; i686-NEXT:  .LBB2_22: # %entry
-; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; i686-NEXT:    movl %eax, 4(%ecx)
-; i686-NEXT:    movl %esi, (%ecx)
-; i686-NEXT:    movl %edx, 12(%ecx)
-; i686-NEXT:    movl %ebp, 8(%ecx)
-; i686-NEXT:    addl $20, %esp
+; i686-NEXT:  .LBB2_15: # %entry
+; i686-NEXT:    movl %ebx, 4(%eax)
+; i686-NEXT:    movl %ebp, (%eax)
+; i686-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; i686-NEXT:    movl %ecx, 12(%eax)
+; i686-NEXT:    movl %edi, 8(%eax)
+; i686-NEXT:    addl $16, %esp
 ; i686-NEXT:    popl %esi
 ; i686-NEXT:    popl %edi
 ; i686-NEXT:    popl %ebx
 ; i686-NEXT:    popl %ebp
 ; i686-NEXT:    retl
 ;
 ; x86_64-LABEL: test_shl_i128:
 ; x86_64:       # %bb.0: # %entry

llvm/test/CodeGen/X86/signed-truncation-check.ll

 
 ; Adding not a constant
 define i1 @add_ultcmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
 ; X86-LABEL: add_ultcmp_bad_i16_i8_add:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addw {{[0-9]+}}(%esp), %ax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $256, %eax # imm = 0x100
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $255, %eax
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ultcmp_bad_i16_i8_add:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl %esi, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $256, %eax # imm = 0x100
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $255, %eax
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, %y
   %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Comparing not with a constant
 define i1 @add_ultcmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {

 
 ; First constant is not power of two
 define i1 @add_ultcmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
 ; X86-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl $192, %eax
 ; X86-NEXT:    addl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $256, %eax # imm = 0x100
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $255, %eax
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl $192, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $256, %eax # imm = 0x100
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $255, %eax
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1))
   %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Second constant is not power of two
 define i1 @add_ultcmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
 ; X86-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    subl $-128, %eax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $768, %eax # imm = 0x300
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $767, %eax # imm = 0x2FF
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:
 ; X64:       # %bb.0:
 ; X64-NEXT:    subl $-128, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $768, %eax # imm = 0x300
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $767, %eax # imm = 0x2FF
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 128 ; 1U << (8-1)
   %tmp1 = icmp ult i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1))
   ret i1 %tmp1
 }
 
 ; Magic check fails, 64 << 1 != 256
 define i1 @add_ultcmp_bad_i16_i8_magic(i16 %x) nounwind {
 ; X86-LABEL: add_ultcmp_bad_i16_i8_magic:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addl $64, %eax
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $256, %eax # imm = 0x100
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $255, %eax
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ultcmp_bad_i16_i8_magic:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl $64, %edi
 ; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    cmpl $256, %eax # imm = 0x100
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $255, %eax
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 64 ; 1U << (8-1-1)
   %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 ; Bad 'destination type'
 define i1 @add_ultcmp_bad_i16_i4(i16 %x) nounwind {
 ; X86-LABEL: add_ultcmp_bad_i16_i4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addl $8, %eax
-; X86-NEXT:    cmpw $16, %ax
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpw $15, %ax
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ultcmp_bad_i16_i4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addl $8, %edi
-; X64-NEXT:    cmpw $16, %di
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpw $15, %di
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %tmp0 = add i16 %x, 8 ; 1U << (4-1)
   %tmp1 = icmp ult i16 %tmp0, 16 ; 1U << 4
   ret i1 %tmp1
 }
 
 ; Bad storage type
 define i1 @add_ultcmp_bad_i24_i8(i24 %x) nounwind {
 ; X86-LABEL: add_ultcmp_bad_i24_i8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    subl $-128, %eax
 ; X86-NEXT:    andl $16777215, %eax # imm = 0xFFFFFF
-; X86-NEXT:    cmpl $256, %eax # imm = 0x100
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $255, %eax
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_ultcmp_bad_i24_i8:
 ; X64:       # %bb.0:
 ; X64-NEXT:    subl $-128, %edi
 ; X64-NEXT:    andl $16777215, %edi # imm = 0xFFFFFF
-; X64-NEXT:    cmpl $256, %edi # imm = 0x100
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $255, %edi
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %tmp0 = add i24 %x, 128 ; 1U << (8-1)
   %tmp1 = icmp ult i24 %tmp0, 256 ; 1U << 8
   ret i1 %tmp1
 }
 
 define i1 @add_ulecmp_bad_i16_i8(i16 %x) nounwind {
 ; CHECK-LABEL: add_ulecmp_bad_i16_i8:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movb $1, %al
 ; CHECK-NEXT:    ret{{[l|q]}}
   %tmp0 = add i16 %x, 128 ; 1U << (8-1)
   %tmp1 = icmp ule i16 %tmp0, -1 ; when we +1 it, it will wrap to 0
   ret i1 %tmp1
 }

llvm/test/CodeGen/X86/smul_fix_sat.ll

 ; X64-LABEL: func:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movslq %esi, %rax
 ; X64-NEXT:    movslq %edi, %rcx
 ; X64-NEXT:    imulq %rax, %rcx
 ; X64-NEXT:    movq %rcx, %rax
 ; X64-NEXT:    shrq $32, %rax
 ; X64-NEXT:    shrdl $2, %eax, %ecx
-; X64-NEXT:    cmpl $1, %eax
+; X64-NEXT:    cmpl $2, %eax
 ; X64-NEXT:    movl $2147483647, %edx # imm = 0x7FFFFFFF
-; X64-NEXT:    cmovlel %ecx, %edx
-; X64-NEXT:    cmpl $-2, %eax
+; X64-NEXT:    cmovll %ecx, %edx
+; X64-NEXT:    cmpl $-3, %eax
 ; X64-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
-; X64-NEXT:    cmovgel %edx, %eax
+; X64-NEXT:    cmovgl %edx, %eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    imull {{[0-9]+}}(%esp)
 ; X86-NEXT:    shrdl $2, %edx, %eax
-; X86-NEXT:    cmpl $1, %edx
+; X86-NEXT:    cmpl $2, %edx
 ; X86-NEXT:    movl $2147483647, %ecx # imm = 0x7FFFFFFF
-; X86-NEXT:    cmovgl %ecx, %eax
-; X86-NEXT:    cmpl $-2, %edx
+; X86-NEXT:    cmovgel %ecx, %eax
+; X86-NEXT:    cmpl $-3, %edx
 ; X86-NEXT:    movl $-2147483648, %ecx # imm = 0x80000000
-; X86-NEXT:    cmovll %ecx, %eax
+; X86-NEXT:    cmovlel %ecx, %eax
 ; X86-NEXT:    retl
   %tmp = call i32 @llvm.smul.fix.sat.i32(i32 %x, i32 %y, i32 2)
   ret i32 %tmp
 }
 
 define i64 @func2(i64 %x, i64 %y) nounwind {
 ; X64-LABEL: func2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    imulq %rsi
 ; X64-NEXT:    shrdq $2, %rdx, %rax
-; X64-NEXT:    cmpq $1, %rdx
+; X64-NEXT:    cmpq $2, %rdx
 ; X64-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
-; X64-NEXT:    cmovgq %rcx, %rax
-; X64-NEXT:    cmpq $-2, %rdx
+; X64-NEXT:    cmovgeq %rcx, %rax
+; X64-NEXT:    cmpq $-3, %rdx
 ; X64-NEXT:    movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
-; X64-NEXT:    cmovlq %rcx, %rax
+; X64-NEXT:    cmovleq %rcx, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi

 ; X86-NEXT:    adcl $0, %esi
 ; X86-NEXT:    movl %edx, %edi
 ; X86-NEXT:    subl {{[0-9]+}}(%esp), %edi
 ; X86-NEXT:    movl %esi, %ebx
 ; X86-NEXT:    sbbl $0, %ebx
 ; X86-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; X86-NEXT:    cmovnsl %esi, %ebx
 ; X86-NEXT:    cmovnsl %edx, %edi
-; X86-NEXT:    movl %edi, %ebp
-; X86-NEXT:    subl {{[0-9]+}}(%esp), %ebp
-; X86-NEXT:    movl %ebx, %esi
-; X86-NEXT:    sbbl $0, %esi
+; X86-NEXT:    movl %edi, %esi
+; X86-NEXT:    subl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    movl %ebx, %ebp
+; X86-NEXT:    sbbl $0, %ebp
 ; X86-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
-; X86-NEXT:    cmovnsl %ebx, %esi
-; X86-NEXT:    cmovnsl %edi, %ebp
-; X86-NEXT:    testl %esi, %esi
+; X86-NEXT:    cmovnsl %ebx, %ebp
+; X86-NEXT:    cmovnsl %edi, %esi
+; X86-NEXT:    testl %ebp, %ebp
 ; X86-NEXT:    setg %bl
 ; X86-NEXT:    sete %bh
-; X86-NEXT:    cmpl $1, %ebp
-; X86-NEXT:    seta %dl
+; X86-NEXT:    cmpl $2, %esi
+; X86-NEXT:    setae %dl
 ; X86-NEXT:    andb %bh, %dl
 ; X86-NEXT:    orb %bl, %dl
 ; X86-NEXT:    shrdl $2, %eax, %ecx
-; X86-NEXT:    shrdl $2, %ebp, %eax
+; X86-NEXT:    shrdl $2, %esi, %eax
 ; X86-NEXT:    testb %dl, %dl
 ; X86-NEXT:    movl $2147483647, %edi # imm = 0x7FFFFFFF
 ; X86-NEXT:    cmovel %eax, %edi
 ; X86-NEXT:    movl $-1, %eax
 ; X86-NEXT:    cmovnel %eax, %ecx
-; X86-NEXT:    cmpl $-1, %esi
-; X86-NEXT:    setl %al
-; X86-NEXT:    sete %dl
+; X86-NEXT:    cmpl $-1, %ebp
+; X86-NEXT:    sete %al
+; X86-NEXT:    cmpl $-3, %esi
+; X86-NEXT:    setbe %dl
+; X86-NEXT:    andb %al, %dl
 ; X86-NEXT:    cmpl $-2, %ebp
-; X86-NEXT:    setb %ah
-; X86-NEXT:    andb %dl, %ah
-; X86-NEXT:    xorl %edx, %edx
-; X86-NEXT:    orb %al, %ah
-; X86-NEXT:    cmovnel %edx, %ecx
+; X86-NEXT:    setle %al
+; X86-NEXT:    xorl %esi, %esi
+; X86-NEXT:    orb %dl, %al
+; X86-NEXT:    cmovnel %esi, %ecx
 ; X86-NEXT:    movl $-2147483648, %edx # imm = 0x80000000
 ; X86-NEXT:    cmovel %edi, %edx
 ; X86-NEXT:    movl %ecx, %eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl

 ; X64-NEXT:    imull %eax, %ecx
 ; X64-NEXT:    movl %ecx, %eax
 ; X64-NEXT:    shrb $2, %al
 ; X64-NEXT:    shrl $8, %ecx
 ; X64-NEXT:    movl %ecx, %edx
 ; X64-NEXT:    shlb $6, %dl
 ; X64-NEXT:    orb %al, %dl
 ; X64-NEXT:    movzbl %dl, %eax
-; X64-NEXT:    cmpb $1, %cl
+; X64-NEXT:    cmpb $2, %cl
 ; X64-NEXT:    movl $127, %edx
-; X64-NEXT:    cmovlel %eax, %edx
-; X64-NEXT:    cmpb $-2, %cl
+; X64-NEXT:    cmovll %eax, %edx
+; X64-NEXT:    cmpb $-3, %cl
 ; X64-NEXT:    movl $128, %eax
-; X64-NEXT:    cmovgel %edx, %eax
+; X64-NEXT:    cmovgl %edx, %eax
 ; X64-NEXT:    sarb $4, %al
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    shlb $4, %al
 ; X86-NEXT:    sarb $4, %al
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X86-NEXT:    shlb $4, %cl
 ; X86-NEXT:    movsbl %cl, %ecx
 ; X86-NEXT:    movsbl %al, %eax
 ; X86-NEXT:    imull %ecx, %eax
 ; X86-NEXT:    movb %ah, %cl
 ; X86-NEXT:    shlb $6, %cl
 ; X86-NEXT:    shrb $2, %al
 ; X86-NEXT:    orb %cl, %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $1, %ah
+; X86-NEXT:    cmpb $2, %ah
 ; X86-NEXT:    movl $127, %edx
-; X86-NEXT:    cmovlel %ecx, %edx
-; X86-NEXT:    cmpb $-2, %ah
+; X86-NEXT:    cmovll %ecx, %edx
+; X86-NEXT:    cmpb $-3, %ah
 ; X86-NEXT:    movl $128, %eax
-; X86-NEXT:    cmovgel %edx, %eax
+; X86-NEXT:    cmovgl %edx, %eax
 ; X86-NEXT:    sarb $4, %al
 ; X86-NEXT:    # kill: def $al killed $al killed $eax
 ; X86-NEXT:    retl
   %tmp = call i4 @llvm.smul.fix.sat.i4(i4 %x, i4 %y, i32 2)
   ret i4 %tmp
 }
 
 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-LABEL: vec:
 ; X64:       # %bb.0:
 ; X64-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
 ; X64-NEXT:    movd %xmm2, %eax
 ; X64-NEXT:    cltq
 ; X64-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
 ; X64-NEXT:    movd %xmm2, %ecx
 ; X64-NEXT:    movslq %ecx, %rdx
 ; X64-NEXT:    imulq %rax, %rdx
 ; X64-NEXT:    movq %rdx, %rcx
 ; X64-NEXT:    shrq $32, %rcx
 ; X64-NEXT:    shrdl $2, %ecx, %edx
-; X64-NEXT:    cmpl $1, %ecx
+; X64-NEXT:    cmpl $2, %ecx
 ; X64-NEXT:    movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT:    cmovgl %eax, %edx
-; X64-NEXT:    cmpl $-2, %ecx
+; X64-NEXT:    cmovgel %eax, %edx
+; X64-NEXT:    cmpl $-3, %ecx
 ; X64-NEXT:    movl $-2147483648, %ecx # imm = 0x80000000
-; X64-NEXT:    cmovll %ecx, %edx
+; X64-NEXT:    cmovlel %ecx, %edx
 ; X64-NEXT:    movd %edx, %xmm2
 ; X64-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
 ; X64-NEXT:    movd %xmm3, %edx
 ; X64-NEXT:    movslq %edx, %rdx
 ; X64-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
 ; X64-NEXT:    movd %xmm3, %esi
 ; X64-NEXT:    movslq %esi, %rsi
 ; X64-NEXT:    imulq %rdx, %rsi
 ; X64-NEXT:    movq %rsi, %rdx
 ; X64-NEXT:    shrq $32, %rdx
 ; X64-NEXT:    shrdl $2, %edx, %esi
-; X64-NEXT:    cmpl $1, %edx
-; X64-NEXT:    cmovgl %eax, %esi
-; X64-NEXT:    cmpl $-2, %edx
-; X64-NEXT:    cmovll %ecx, %esi
+; X64-NEXT:    cmpl $2, %edx
+; X64-NEXT:    cmovgel %eax, %esi
+; X64-NEXT:    cmpl $-3, %edx
+; X64-NEXT:    cmovlel %ecx, %esi
 ; X64-NEXT:    movd %esi, %xmm3
 ; X64-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
 ; X64-NEXT:    movd %xmm1, %edx
 ; X64-NEXT:    movslq %edx, %rdx
 ; X64-NEXT:    movd %xmm0, %esi
 ; X64-NEXT:    movslq %esi, %rsi
 ; X64-NEXT:    imulq %rdx, %rsi
 ; X64-NEXT:    movq %rsi, %rdx
 ; X64-NEXT:    shrq $32, %rdx
 ; X64-NEXT:    shrdl $2, %edx, %esi
-; X64-NEXT:    cmpl $1, %edx
-; X64-NEXT:    cmovgl %eax, %esi
-; X64-NEXT:    cmpl $-2, %edx
-; X64-NEXT:    cmovll %ecx, %esi
+; X64-NEXT:    cmpl $2, %edx
+; X64-NEXT:    cmovgel %eax, %esi
+; X64-NEXT:    cmpl $-3, %edx
+; X64-NEXT:    cmovlel %ecx, %esi
 ; X64-NEXT:    movd %esi, %xmm2
 ; X64-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
 ; X64-NEXT:    movd %xmm1, %edx
 ; X64-NEXT:    movslq %edx, %rdx
 ; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
 ; X64-NEXT:    movd %xmm0, %esi
 ; X64-NEXT:    movslq %esi, %rsi
 ; X64-NEXT:    imulq %rdx, %rsi
 ; X64-NEXT:    movq %rsi, %rdx
 ; X64-NEXT:    shrq $32, %rdx
 ; X64-NEXT:    shrdl $2, %edx, %esi
-; X64-NEXT:    cmpl $1, %edx
-; X64-NEXT:    cmovgl %eax, %esi
-; X64-NEXT:    cmpl $-2, %edx
-; X64-NEXT:    cmovll %ecx, %esi
+; X64-NEXT:    cmpl $2, %edx
+; X64-NEXT:    cmovgel %eax, %esi
+; X64-NEXT:    cmpl $-3, %edx
+; X64-NEXT:    cmovlel %ecx, %esi
 ; X64-NEXT:    movd %esi, %xmm0
 ; X64-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
 ; X64-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
 ; X64-NEXT:    movdqa %xmm2, %xmm0
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: vec:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    imull {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %ecx
 ; X86-NEXT:    shrdl $2, %edx, %ecx
-; X86-NEXT:    cmpl $1, %edx
+; X86-NEXT:    cmpl $2, %edx
 ; X86-NEXT:    movl $2147483647, %ebp # imm = 0x7FFFFFFF
-; X86-NEXT:    cmovgl %ebp, %ecx
-; X86-NEXT:    cmpl $-2, %edx
+; X86-NEXT:    cmovgel %ebp, %ecx
+; X86-NEXT:    cmpl $-3, %edx
 ; X86-NEXT:    movl $-2147483648, %esi # imm = 0x80000000
-; X86-NEXT:    cmovll %esi, %ecx
+; X86-NEXT:    cmovlel %esi, %ecx
 ; X86-NEXT:    movl %edi, %eax
 ; X86-NEXT:    imull {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %edi
 ; X86-NEXT:    shrdl $2, %edx, %edi
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    cmovgl %ebp, %edi
-; X86-NEXT:    cmpl $-2, %edx
-; X86-NEXT:    cmovll %esi, %edi
+; X86-NEXT:    cmpl $2, %edx
+; X86-NEXT:    cmovgel %ebp, %edi
+; X86-NEXT:    cmpl $-3, %edx
+; X86-NEXT:    cmovlel %esi, %edi
 ; X86-NEXT:    movl %ebx, %eax
 ; X86-NEXT:    imull {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %ebx
 ; X86-NEXT:    shrdl $2, %edx, %ebx
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    cmovgl %ebp, %ebx
-; X86-NEXT:    cmpl $-2, %edx
-; X86-NEXT:    cmovll %esi, %ebx
+; X86-NEXT:    cmpl $2, %edx
+; X86-NEXT:    cmovgel %ebp, %ebx
+; X86-NEXT:    cmpl $-3, %edx
+; X86-NEXT:    cmovlel %esi, %ebx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    imull {{[0-9]+}}(%esp)
 ; X86-NEXT:    shrdl $2, %edx, %eax
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    cmovgl %ebp, %eax
-; X86-NEXT:    cmpl $-2, %edx
-; X86-NEXT:    cmovll %esi, %eax
+; X86-NEXT:    cmpl $2, %edx
+; X86-NEXT:    cmovgel %ebp, %eax
+; X86-NEXT:    cmpl $-3, %edx
+; X86-NEXT:    cmovlel %esi, %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X86-NEXT:    movl %eax, 12(%edx)
 ; X86-NEXT:    movl %ebx, 8(%edx)
 ; X86-NEXT:    movl %edi, 4(%edx)
 ; X86-NEXT:    movl %ecx, (%edx)
 ; X86-NEXT:    movl %edx, %eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi

 ; X86-NEXT:    sete %bh
 ; X86-NEXT:    andb %ch, %bh
 ; X86-NEXT:    orb %bl, %bh
 ; X86-NEXT:    movl $2147483647, %esi # imm = 0x7FFFFFFF
 ; X86-NEXT:    cmovnel %esi, %edx
 ; X86-NEXT:    movl $-1, %esi
 ; X86-NEXT:    cmovnel %esi, %eax
 ; X86-NEXT:    cmpl $-1, %edi
-; X86-NEXT:    setl %ch
-; X86-NEXT:    sete %bl
-; X86-NEXT:    andb %cl, %bl
+; X86-NEXT:    sete %ch
+; X86-NEXT:    andb %cl, %ch
+; X86-NEXT:    cmpl $-2, %edi
+; X86-NEXT:    setle %cl
 ; X86-NEXT:    xorl %esi, %esi
-; X86-NEXT:    orb %ch, %bl
+; X86-NEXT:    orb %ch, %cl
 ; X86-NEXT:    cmovnel %esi, %eax
 ; X86-NEXT:    movl $-2147483648, %ecx # imm = 0x80000000
 ; X86-NEXT:    cmovnel %ecx, %edx
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl
   %tmp = call i64 @llvm.smul.fix.sat.i64(i64 %x, i64 %y, i32 32)
   ret i64 %tmp
 }
 
 define i64 @func8(i64 %x, i64 %y) nounwind {
 ; X64-LABEL: func8:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    imulq %rsi
 ; X64-NEXT:    shrdq $63, %rdx, %rax
-; X64-NEXT:    movabsq $4611686018427387903, %rcx # imm = 0x3FFFFFFFFFFFFFFF
+; X64-NEXT:    movabsq $4611686018427387904, %rcx # imm = 0x4000000000000000
 ; X64-NEXT:    cmpq %rcx, %rdx
 ; X64-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
-; X64-NEXT:    cmovgq %rcx, %rax
-; X64-NEXT:    movabsq $-4611686018427387904, %rcx # imm = 0xC000000000000000
+; X64-NEXT:    cmovgeq %rcx, %rax
+; X64-NEXT:    movabsq $-4611686018427387905, %rcx # imm = 0xBFFFFFFFFFFFFFFF
 ; X64-NEXT:    cmpq %rcx, %rdx
 ; X64-NEXT:    movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
-; X64-NEXT:    cmovlq %rcx, %rax
+; X64-NEXT:    cmovleq %rcx, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi

 ; X86-NEXT:    subl {{[0-9]+}}(%esp), %edx
 ; X86-NEXT:    movl %esi, %edi
 ; X86-NEXT:    sbbl $0, %edi
 ; X86-NEXT:    cmpl $0, {{[0-9]+}}(%esp)
 ; X86-NEXT:    cmovnsl %esi, %edi
 ; X86-NEXT:    cmovnsl %ecx, %edx
 ; X86-NEXT:    shrdl $31, %edx, %eax
 ; X86-NEXT:    shrdl $31, %edi, %edx
-; X86-NEXT:    cmpl $1073741823, %edi # imm = 0x3FFFFFFF
+; X86-NEXT:    cmpl $1073741824, %edi # imm = 0x40000000
 ; X86-NEXT:    movl $2147483647, %ecx # imm = 0x7FFFFFFF
-; X86-NEXT:    cmovgl %ecx, %edx
+; X86-NEXT:    cmovgel %ecx, %edx
 ; X86-NEXT:    movl $-1, %ecx
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    xorl %ecx, %ecx
-; X86-NEXT:    cmpl $-1073741824, %edi # imm = 0xC0000000
-; X86-NEXT:    cmovll %ecx, %eax
+; X86-NEXT:    cmpl $-1073741825, %edi # imm = 0xBFFFFFFF
+; X86-NEXT:    cmovlel %ecx, %eax
 ; X86-NEXT:    movl $-2147483648, %ecx # imm = 0x80000000
-; X86-NEXT:    cmovll %ecx, %edx
+; X86-NEXT:    cmovlel %ecx, %edx
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl
   %tmp = call i64 @llvm.smul.fix.sat.i64(i64 %x, i64 %y, i32 63)
   ret i64 %tmp
 }

llvm/test/CodeGen/X86/smul_fix_sat_constants.ll

 declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64)
 
 define i64 @func() nounwind {
 ; X64-LABEL: func:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl $2, %ecx
 ; X64-NEXT:    movl $3, %eax
 ; X64-NEXT:    imulq %rcx
-; X64-NEXT:    cmpq $1, %rdx
+; X64-NEXT:    cmpq $2, %rdx
 ; X64-NEXT:    movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
 ; X64-NEXT:    movl $1, %ecx
-; X64-NEXT:    cmovgq %rax, %rcx
-; X64-NEXT:    cmpq $-2, %rdx
+; X64-NEXT:    cmovgeq %rax, %rcx
+; X64-NEXT:    cmpq $-3, %rdx
 ; X64-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
-; X64-NEXT:    cmovgeq %rcx, %rax
+; X64-NEXT:    cmovgq %rcx, %rax
 ; X64-NEXT:    retq
   %tmp = call i64 @llvm.smul.fix.sat.i64(i64 3, i64 2, i32 2)
   ret i64 %tmp
 }
 
 define i64 @func2() nounwind {
 ; X64-LABEL: func2:
 ; X64:       # %bb.0:

 
 define i64 @func3() nounwind {
 ; X64-LABEL: func3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
 ; X64-NEXT:    movl $2, %edx
 ; X64-NEXT:    movq %rcx, %rax
 ; X64-NEXT:    imulq %rdx
-; X64-NEXT:    cmpq $1, %rdx
+; X64-NEXT:    cmpq $2, %rdx
 ; X64-NEXT:    movabsq $4611686018427387903, %rsi # imm = 0x3FFFFFFFFFFFFFFF
-; X64-NEXT:    cmovgq %rcx, %rsi
-; X64-NEXT:    cmpq $-2, %rdx
+; X64-NEXT:    cmovgeq %rcx, %rsi
+; X64-NEXT:    cmpq $-3, %rdx
 ; X64-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
-; X64-NEXT:    cmovgeq %rsi, %rax
+; X64-NEXT:    cmovgq %rsi, %rax
 ; X64-NEXT:    retq
   %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 2)
   ret i64 %tmp
 }
 
 define i64 @func4() nounwind {
 ; X64-LABEL: func4:
 ; X64:       # %bb.0:

 
 define i64 @func5() nounwind {
 ; X64-LABEL: func5:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
 ; X64-NEXT:    movl $2, %edx
 ; X64-NEXT:    movq %rcx, %rax
 ; X64-NEXT:    imulq %rdx
-; X64-NEXT:    movabsq $4611686018427387903, %rax # imm = 0x3FFFFFFFFFFFFFFF
+; X64-NEXT:    movabsq $4611686018427387904, %rax # imm = 0x4000000000000000
 ; X64-NEXT:    cmpq %rax, %rdx
 ; X64-NEXT:    movl $1, %esi
-; X64-NEXT:    cmovgq %rcx, %rsi
-; X64-NEXT:    movabsq $-4611686018427387904, %rax # imm = 0xC000000000000000
+; X64-NEXT:    cmovgeq %rcx, %rsi
+; X64-NEXT:    movabsq $-4611686018427387905, %rax # imm = 0xBFFFFFFFFFFFFFFF
 ; X64-NEXT:    cmpq %rax, %rdx
 ; X64-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
-; X64-NEXT:    cmovgeq %rsi, %rax
+; X64-NEXT:    cmovgq %rsi, %rax
 ; X64-NEXT:    retq
   %tmp = call i64 @llvm.smul.fix.sat.i64(i64 9223372036854775807, i64 2, i32 63)
   ret i64 %tmp
 }

llvm/test/CodeGen/X86/srem-seteq-illegal-types.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X64,SSE2
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefixes=X64,SSE41
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefixes=X64,AVX1
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefixes=X64,AVX2
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefixes=X64,AVX512VL
 
 define i1 @test_srem_odd(i29 %X) nounwind {
 ; X86-LABEL: test_srem_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $526025035, {{[0-9]+}}(%esp), %eax # imm = 0x1F5A814B
 ; X86-NEXT:    addl $2711469, %eax # imm = 0x295FAD
 ; X86-NEXT:    andl $536870911, %eax # imm = 0x1FFFFFFF
-; X86-NEXT:    cmpl $5422939, %eax # imm = 0x52BF5B
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $5422938, %eax # imm = 0x52BF5A
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $526025035, %edi, %eax # imm = 0x1F5A814B
 ; X64-NEXT:    addl $2711469, %eax # imm = 0x295FAD
 ; X64-NEXT:    andl $536870911, %eax # imm = 0x1FFFFFFF
-; X64-NEXT:    cmpl $5422939, %eax # imm = 0x52BF5B
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $5422938, %eax # imm = 0x52BF5A
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i29 %X, 99
   %cmp = icmp eq i29 %srem, 0
   ret i1 %cmp
 }
 
 define i1 @test_srem_even(i4 %X) nounwind {
 ; X86-LABEL: test_srem_even:

llvm/test/CodeGen/X86/srem-seteq-optsize.ll

; X64-NEXT:    retq
   ret i32 %ret
 }
 
 define i32 @test_optsize(i32 %X) optsize nounwind readnone {
 ; X86-LABEL: test_optsize:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $429496729, %eax # imm = 0x19999999
-; X86-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
+; X86-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
 ; X86-NEXT:    movl $42, %eax
-; X86-NEXT:    jb .LBB1_2
+; X86-NEXT:    jbe .LBB1_2
 ; X86-NEXT:  # %bb.1:
 ; X86-NEXT:    movl $-10, %eax
 ; X86-NEXT:  .LBB1_2:
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_optsize:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $429496729, %eax # imm = 0x19999999
-; X64-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
+; X64-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
 ; X64-NEXT:    movl $42, %ecx
 ; X64-NEXT:    movl $-10, %eax
-; X64-NEXT:    cmovbl %ecx, %eax
+; X64-NEXT:    cmovbel %ecx, %eax
 ; X64-NEXT:    retq
   %rem = srem i32 %X, 5
   %cmp = icmp eq i32 %rem, 0
   %ret = select i1 %cmp, i32 42, i32 -10
   ret i32 %ret
 }

llvm/test/CodeGen/X86/srem-seteq.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov < %s | FileCheck %s --check-prefixes=CHECK,X86
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
 
 ;------------------------------------------------------------------------------;
 ; Odd divisors
 ;------------------------------------------------------------------------------;
 
 define i32 @test_srem_odd(i32 %X) nounwind {
 ; X86-LABEL: test_srem_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $429496729, %ecx # imm = 0x19999999
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $858993458, %ecx # imm = 0x33333332
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $429496729, %ecx # imm = 0x19999999
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $858993458, %ecx # imm = 0x33333332
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 5
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 define i32 @test_srem_odd_25(i32 %X) nounwind {
 ; X86-LABEL: test_srem_odd_25:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1030792151, {{[0-9]+}}(%esp), %ecx # imm = 0xC28F5C29
 ; X86-NEXT:    addl $85899345, %ecx # imm = 0x51EB851
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $171798691, %ecx # imm = 0xA3D70A3
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $171798690, %ecx # imm = 0xA3D70A2
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_odd_25:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1030792151, %edi, %ecx # imm = 0xC28F5C29
 ; X64-NEXT:    addl $85899345, %ecx # imm = 0x51EB851
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $171798691, %ecx # imm = 0xA3D70A3
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $171798690, %ecx # imm = 0xA3D70A2
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 25
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_srem_odd, except the divisor has bit 30 set.
 define i32 @test_srem_odd_bit30(i32 %X) nounwind {
 ; X86-LABEL: test_srem_odd_bit30:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $1789569707, {{[0-9]+}}(%esp), %ecx # imm = 0x6AAAAAAB
 ; X86-NEXT:    incl %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $3, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $2, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_odd_bit30:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $1789569707, %edi, %ecx # imm = 0x6AAAAAAB
 ; X64-NEXT:    incl %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $2, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 1073741827
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_srem_odd, except the divisor has bit 31 set.
 define i32 @test_srem_odd_bit31(i32 %X) nounwind {
 ; X86-LABEL: test_srem_odd_bit31:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-715827883, {{[0-9]+}}(%esp), %ecx # imm = 0xD5555555
 ; X86-NEXT:    incl %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $3, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $2, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_odd_bit31:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-715827883, %edi, %ecx # imm = 0xD5555555
 ; X64-NEXT:    incl %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $2, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 2147483651
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ;------------------------------------------------------------------------------;
 ; Even divisors
 ;------------------------------------------------------------------------------;
 
 define i16 @test_srem_even(i16 %X) nounwind {
 ; X86-LABEL: test_srem_even:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7
 ; X86-NEXT:    addl $4680, %eax # imm = 0x1248
 ; X86-NEXT:    rorw %ax
 ; X86-NEXT:    movzwl %ax, %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $4680, %ecx # imm = 0x1248
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $4681, %ecx # imm = 0x1249
+; X86-NEXT:    setae %al
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_even:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $28087, %edi, %eax # imm = 0x6DB7
 ; X64-NEXT:    addl $4680, %eax # imm = 0x1248
 ; X64-NEXT:    rorw %ax
 ; X64-NEXT:    movzwl %ax, %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $4680, %ecx # imm = 0x1248
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $4681, %ecx # imm = 0x1249
+; X64-NEXT:    setae %al
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
   %srem = srem i16 %X, 14
   %cmp = icmp ne i16 %srem, 0
   %ret = zext i1 %cmp to i16
   ret i16 %ret
 }
 
 define i32 @test_srem_even_100(i32 %X) nounwind {
 ; X86-LABEL: test_srem_even_100:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1030792151, {{[0-9]+}}(%esp), %ecx # imm = 0xC28F5C29
 ; X86-NEXT:    addl $85899344, %ecx # imm = 0x51EB850
 ; X86-NEXT:    rorl $2, %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $42949673, %ecx # imm = 0x28F5C29
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $42949672, %ecx # imm = 0x28F5C28
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_even_100:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1030792151, %edi, %ecx # imm = 0xC28F5C29
 ; X64-NEXT:    addl $85899344, %ecx # imm = 0x51EB850
 ; X64-NEXT:    rorl $2, %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $42949673, %ecx # imm = 0x28F5C29
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $42949672, %ecx # imm = 0x28F5C28
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 100
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_srem_even, except the divisor has bit 30 set.
 define i32 @test_srem_even_bit30(i32 %X) nounwind {
 ; X86-LABEL: test_srem_even_bit30:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-51622203, {{[0-9]+}}(%esp), %ecx # imm = 0xFCEC4EC5
 ; X86-NEXT:    addl $8, %ecx
 ; X86-NEXT:    rorl $3, %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $3, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $2, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_even_bit30:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-51622203, %edi, %ecx # imm = 0xFCEC4EC5
 ; X64-NEXT:    addl $8, %ecx
 ; X64-NEXT:    rorl $3, %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $2, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 1073741928
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_srem_odd, except the divisor has bit 31 set.
 define i32 @test_srem_even_bit31(i32 %X) nounwind {
 ; X86-LABEL: test_srem_even_bit31:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-989526779, {{[0-9]+}}(%esp), %ecx # imm = 0xC5050505
 ; X86-NEXT:    addl $2, %ecx
 ; X86-NEXT:    rorl %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $3, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $2, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_even_bit31:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-989526779, %edi, %ecx # imm = 0xC5050505
 ; X64-NEXT:    addl $2, %ecx
 ; X64-NEXT:    rorl %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $2, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 2147483750
   %cmp = icmp eq i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ;------------------------------------------------------------------------------;
 ; Special case
 ;------------------------------------------------------------------------------;
 
 ; 'NE' predicate is fine too.
 define i32 @test_srem_odd_setne(i32 %X) nounwind {
 ; X86-LABEL: test_srem_odd_setne:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $429496729, %ecx # imm = 0x19999999
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $858993458, %ecx # imm = 0x33333332
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_odd_setne:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $429496729, %ecx # imm = 0x19999999
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $858993458, %ecx # imm = 0x33333332
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, 5
   %cmp = icmp ne i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; The fold is only valid for positive divisors, negative-ones should be negated.
 define i32 @test_srem_negative_odd(i32 %X) nounwind {
 ; X86-LABEL: test_srem_negative_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $429496729, %ecx # imm = 0x19999999
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $858993458, %ecx # imm = 0x33333332
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_negative_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $429496729, %ecx # imm = 0x19999999
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $858993458, %ecx # imm = 0x33333332
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, -5
   %cmp = icmp ne i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 define i32 @test_srem_negative_even(i32 %X) nounwind {
 ; X86-LABEL: test_srem_negative_even:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1227133513, {{[0-9]+}}(%esp), %ecx # imm = 0xB6DB6DB7
 ; X86-NEXT:    addl $306783378, %ecx # imm = 0x12492492
 ; X86-NEXT:    rorl %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $306783378, %ecx # imm = 0x12492492
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $306783379, %ecx # imm = 0x12492493
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_srem_negative_even:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1227133513, %edi, %ecx # imm = 0xB6DB6DB7
 ; X64-NEXT:    addl $306783378, %ecx # imm = 0x12492492
 ; X64-NEXT:    rorl %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $306783378, %ecx # imm = 0x12492492
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $306783379, %ecx # imm = 0x12492493
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %srem = srem i32 %X, -14
   %cmp = icmp ne i32 %srem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ;------------------------------------------------------------------------------;

llvm/test/CodeGen/X86/ssub_sat.ll

 }
 
 define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    subb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $7, %al
+; X86-NEXT:    cmpb $6, %al
 ; X86-NEXT:    movl $7, %eax
-; X86-NEXT:    cmovll %ecx, %eax
-; X86-NEXT:    cmpb $-8, %al
+; X86-NEXT:    cmovlel %ecx, %eax
+; X86-NEXT:    cmpb $-7, %al
 ; X86-NEXT:    movl $248, %ecx
-; X86-NEXT:    cmovgl %eax, %ecx
+; X86-NEXT:    cmovgel %eax, %ecx
 ; X86-NEXT:    movsbl %cl, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: func3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    subb %sil, %dil
 ; X64-NEXT:    movzbl %dil, %eax
-; X64-NEXT:    cmpb $7, %al
+; X64-NEXT:    cmpb $6, %al
 ; X64-NEXT:    movl $7, %ecx
-; X64-NEXT:    cmovll %eax, %ecx
-; X64-NEXT:    cmpb $-8, %cl
+; X64-NEXT:    cmovlel %eax, %ecx
+; X64-NEXT:    cmpb $-7, %cl
 ; X64-NEXT:    movl $248, %eax
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    movsbl %al, %eax
 ; X64-NEXT:    retq
   %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y)
   ret i4 %tmp
 }
 
 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X86-LABEL: vec:

llvm/test/CodeGen/X86/ssub_sat_plus.ll

 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    mulb {{[0-9]+}}(%esp)
 ; X86-NEXT:    shlb $4, %al
 ; X86-NEXT:    sarb $4, %al
 ; X86-NEXT:    subb %al, %cl
 ; X86-NEXT:    movzbl %cl, %eax
-; X86-NEXT:    cmpb $7, %cl
+; X86-NEXT:    cmpb $6, %cl
 ; X86-NEXT:    movl $7, %ecx
-; X86-NEXT:    cmovll %eax, %ecx
-; X86-NEXT:    cmpb $-8, %cl
+; X86-NEXT:    cmovlel %eax, %ecx
+; X86-NEXT:    cmpb $-7, %cl
 ; X86-NEXT:    movl $248, %eax
-; X86-NEXT:    cmovgl %ecx, %eax
+; X86-NEXT:    cmovgel %ecx, %eax
 ; X86-NEXT:    movsbl %al, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: func4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %esi, %eax
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    mulb %dl
 ; X64-NEXT:    shlb $4, %al
 ; X64-NEXT:    sarb $4, %al
 ; X64-NEXT:    subb %al, %dil
 ; X64-NEXT:    movzbl %dil, %eax
-; X64-NEXT:    cmpb $7, %al
+; X64-NEXT:    cmpb $6, %al
 ; X64-NEXT:    movl $7, %ecx
-; X64-NEXT:    cmovll %eax, %ecx
-; X64-NEXT:    cmpb $-8, %cl
+; X64-NEXT:    cmovlel %eax, %ecx
+; X64-NEXT:    cmpb $-7, %cl
 ; X64-NEXT:    movl $248, %eax
-; X64-NEXT:    cmovgl %ecx, %eax
+; X64-NEXT:    cmovgel %ecx, %eax
 ; X64-NEXT:    movsbl %al, %eax
 ; X64-NEXT:    retq
   %a = mul i4 %y, %z
   %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)
   ret i4 %tmp
 }

llvm/test/CodeGen/X86/uadd_sat.ll

 }
 
 define zeroext i4 @func3(i4 zeroext %x, i4 zeroext %y) nounwind {
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    addb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $15, %al
+; X86-NEXT:    cmpb $14, %al
 ; X86-NEXT:    movl $15, %eax
-; X86-NEXT:    cmovbl %ecx, %eax
+; X86-NEXT:    cmovbel %ecx, %eax
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: func3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    addb %sil, %dil
 ; X64-NEXT:    movzbl %dil, %eax
-; X64-NEXT:    cmpb $15, %al
+; X64-NEXT:    cmpb $14, %al
 ; X64-NEXT:    movl $15, %ecx
-; X64-NEXT:    cmovbl %eax, %ecx
+; X64-NEXT:    cmovbel %eax, %ecx
 ; X64-NEXT:    movzbl %cl, %eax
 ; X64-NEXT:    retq
   %tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y)
   ret i4 %tmp
 }
 
 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X86-LABEL: vec:

llvm/test/CodeGen/X86/uadd_sat_plus.ll

 define zeroext i4 @func4(i4 zeroext %x, i4 zeroext %y, i4 zeroext %z) nounwind {
 ; X86-LABEL: func4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    mulb {{[0-9]+}}(%esp)
 ; X86-NEXT:    andb $15, %al
 ; X86-NEXT:    addb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $15, %al
+; X86-NEXT:    cmpb $14, %al
 ; X86-NEXT:    movl $15, %eax
-; X86-NEXT:    cmovbl %ecx, %eax
+; X86-NEXT:    cmovbel %ecx, %eax
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: func4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %esi, %eax
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    mulb %dl
 ; X64-NEXT:    andb $15, %al
 ; X64-NEXT:    addb %dil, %al
 ; X64-NEXT:    movzbl %al, %eax
-; X64-NEXT:    cmpb $15, %al
+; X64-NEXT:    cmpb $14, %al
 ; X64-NEXT:    movl $15, %ecx
-; X64-NEXT:    cmovbl %eax, %ecx
+; X64-NEXT:    cmovbel %eax, %ecx
 ; X64-NEXT:    movzbl %cl, %eax
 ; X64-NEXT:    retq
   %a = mul i4 %y, %z
   %tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %a)
   ret i4 %tmp
 }

llvm/test/CodeGen/X86/udiv_fix_sat.ll

 define i16 @func(i16 %x, i16 %y) nounwind {
 ; X64-LABEL: func:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movzwl %si, %ecx
 ; X64-NEXT:    movzwl %di, %eax
 ; X64-NEXT:    shll $8, %eax
 ; X64-NEXT:    xorl %edx, %edx
 ; X64-NEXT:    divl %ecx
-; X64-NEXT:    cmpl $131071, %eax # imm = 0x1FFFF
+; X64-NEXT:    cmpl $131070, %eax # imm = 0x1FFFE
 ; X64-NEXT:    movl $131071, %ecx # imm = 0x1FFFF
-; X64-NEXT:    cmovael %ecx, %eax
+; X64-NEXT:    cmoval %ecx, %eax
 ; X64-NEXT:    shrl %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movzwl %ax, %eax
 ; X86-NEXT:    shll $8, %eax
 ; X86-NEXT:    xorl %edx, %edx
 ; X86-NEXT:    divl %ecx
-; X86-NEXT:    cmpl $131071, %eax # imm = 0x1FFFF
+; X86-NEXT:    cmpl $131070, %eax # imm = 0x1FFFE
 ; X86-NEXT:    movl $131071, %ecx # imm = 0x1FFFF
-; X86-NEXT:    cmovael %ecx, %eax
+; X86-NEXT:    cmoval %ecx, %eax
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    retl
   %tmp = call i16 @llvm.udiv.fix.sat.i16(i16 %x, i16 %y, i32 7)
   ret i16 %tmp
 }
 
 define i16 @func2(i8 %x, i8 %y) nounwind {
 ; X64-LABEL: func2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movsbl %dil, %eax
 ; X64-NEXT:    andl $32767, %eax # imm = 0x7FFF
 ; X64-NEXT:    movsbl %sil, %ecx
 ; X64-NEXT:    andl $32767, %ecx # imm = 0x7FFF
 ; X64-NEXT:    shll $14, %eax
 ; X64-NEXT:    xorl %edx, %edx
 ; X64-NEXT:    divl %ecx
-; X64-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
+; X64-NEXT:    cmpl $32766, %eax # imm = 0x7FFE
 ; X64-NEXT:    movl $32767, %ecx # imm = 0x7FFF
-; X64-NEXT:    cmovbl %eax, %ecx
+; X64-NEXT:    cmovbel %eax, %ecx
 ; X64-NEXT:    addl %ecx, %ecx
 ; X64-NEXT:    movswl %cx, %eax
 ; X64-NEXT:    shrl %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    andl $32767, %ecx # imm = 0x7FFF
 ; X86-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    andl $32767, %eax # imm = 0x7FFF
 ; X86-NEXT:    shll $14, %eax
 ; X86-NEXT:    xorl %edx, %edx
 ; X86-NEXT:    divl %ecx
-; X86-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
+; X86-NEXT:    cmpl $32766, %eax # imm = 0x7FFE
 ; X86-NEXT:    movl $32767, %ecx # imm = 0x7FFF
-; X86-NEXT:    cmovbl %eax, %ecx
+; X86-NEXT:    cmovbel %eax, %ecx
 ; X86-NEXT:    addl %ecx, %ecx
 ; X86-NEXT:    movswl %cx, %eax
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    retl
   %x2 = sext i8 %x to i15
   %y2 = sext i8 %y to i15
   %tmp = call i15 @llvm.udiv.fix.sat.i15(i15 %x2, i15 %y2, i32 14)
   %tmp2 = sext i15 %tmp to i16
   ret i16 %tmp2
 }
 
 define i16 @func3(i15 %x, i8 %y) nounwind {
 ; X64-LABEL: func3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    # kill: def $edi killed $edi def $rdi
 ; X64-NEXT:    leal (%rdi,%rdi), %eax
 ; X64-NEXT:    movzbl %sil, %ecx
 ; X64-NEXT:    shll $4, %ecx
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    xorl %edx, %edx
 ; X64-NEXT:    divw %cx
 ; X64-NEXT:    # kill: def $ax killed $ax def $eax
 ; X64-NEXT:    movzwl %ax, %ecx
-; X64-NEXT:    cmpl $32767, %ecx # imm = 0x7FFF
+; X64-NEXT:    cmpl $32766, %ecx # imm = 0x7FFE
 ; X64-NEXT:    movl $32767, %ecx # imm = 0x7FFF
-; X64-NEXT:    cmovbl %eax, %ecx
+; X64-NEXT:    cmovbel %eax, %ecx
 ; X64-NEXT:    addl %ecx, %ecx
 ; X64-NEXT:    movswl %cx, %eax
 ; X64-NEXT:    shrl %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    addl %eax, %eax
 ; X86-NEXT:    movzbl %cl, %ecx
 ; X86-NEXT:    shll $4, %ecx
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    xorl %edx, %edx
 ; X86-NEXT:    divw %cx
 ; X86-NEXT:    # kill: def $ax killed $ax def $eax
 ; X86-NEXT:    movzwl %ax, %ecx
-; X86-NEXT:    cmpl $32767, %ecx # imm = 0x7FFF
+; X86-NEXT:    cmpl $32766, %ecx # imm = 0x7FFE
 ; X86-NEXT:    movl $32767, %ecx # imm = 0x7FFF
-; X86-NEXT:    cmovbl %eax, %ecx
+; X86-NEXT:    cmovbel %eax, %ecx
 ; X86-NEXT:    addl %ecx, %ecx
 ; X86-NEXT:    movswl %cx, %eax
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    retl
   %y2 = sext i8 %y to i15
   %y3 = shl i15 %y2, 7
   %tmp = call i15 @llvm.udiv.fix.sat.i15(i15 %x, i15 %y3, i32 4)
   %tmp2 = sext i15 %tmp to i16
   ret i16 %tmp2
 }
 
 define i4 @func4(i4 %x, i4 %y) nounwind {
 ; X64-LABEL: func4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    andb $15, %sil
 ; X64-NEXT:    andb $15, %dil
 ; X64-NEXT:    shlb $2, %dil
 ; X64-NEXT:    movzbl %dil, %eax
 ; X64-NEXT:    divb %sil
 ; X64-NEXT:    movzbl %al, %ecx
-; X64-NEXT:    cmpb $15, %cl
+; X64-NEXT:    cmpb $14, %cl
 ; X64-NEXT:    movl $15, %eax
-; X64-NEXT:    cmovbl %ecx, %eax
+; X64-NEXT:    cmovbel %ecx, %eax
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X86-NEXT:    andb $15, %cl
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    andb $15, %al
 ; X86-NEXT:    shlb $2, %al
 ; X86-NEXT:    movzbl %al, %eax
 ; X86-NEXT:    divb %cl
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $15, %al
+; X86-NEXT:    cmpb $14, %al
 ; X86-NEXT:    movl $15, %eax
-; X86-NEXT:    cmovbl %ecx, %eax
+; X86-NEXT:    cmovbel %ecx, %eax
 ; X86-NEXT:    # kill: def $al killed $al killed $eax
 ; X86-NEXT:    retl
   %tmp = call i4 @llvm.udiv.fix.sat.i4(i4 %x, i4 %y, i32 2)
   ret i4 %tmp
 }
 
 define i64 @func5(i64 %x, i64 %y) nounwind {
 ; X64-LABEL: func5:
 ; X64:       # %bb.0:
-; X64-NEXT:    pushq %rbx
+; X64-NEXT:    pushq %rax
 ; X64-NEXT:    movq %rsi, %rdx
 ; X64-NEXT:    leaq (%rdi,%rdi), %rsi
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    shrq $63, %rax
 ; X64-NEXT:    shrdq $33, %rax, %rsi
 ; X64-NEXT:    shlq $32, %rdi
-; X64-NEXT:    xorl %ebx, %ebx
 ; X64-NEXT:    xorl %ecx, %ecx
 ; X64-NEXT:    callq __udivti3@PLT
 ; X64-NEXT:    cmpq $1, %rdx
-; X64-NEXT:    sbbq %rbx, %rbx
-; X64-NEXT:    notq %rbx
-; X64-NEXT:    orq %rax, %rbx
-; X64-NEXT:    cmpq $1, %rdx
-; X64-NEXT:    movl $1, %ecx
-; X64-NEXT:    cmovbq %rdx, %rcx
-; X64-NEXT:    cmoveq %rax, %rbx
-; X64-NEXT:    shrdq $1, %rcx, %rbx
-; X64-NEXT:    movq %rbx, %rax
-; X64-NEXT:    popq %rbx
+; X64-NEXT:    movq $-1, %rcx
+; X64-NEXT:    cmovbeq %rax, %rcx
+; X64-NEXT:    testq %rdx, %rdx
+; X64-NEXT:    movl $1, %eax
+; X64-NEXT:    cmovbeq %rdx, %rax
+; X64-NEXT:    shldq $63, %rcx, %rax
+; X64-NEXT:    popq %rcx
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func5:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    movl %esp, %ebp
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    andl $-8, %esp

 ; X86-NEXT:    pushl 16(%ebp)
 ; X86-NEXT:    pushl $0
 ; X86-NEXT:    pushl %edx
 ; X86-NEXT:    pushl %ecx
 ; X86-NEXT:    pushl %eax
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    calll __udivti3
 ; X86-NEXT:    addl $32, %esp
-; X86-NEXT:    movl (%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    orl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl $-1, %eax
+; X86-NEXT:    movl $-1, %edx
+; X86-NEXT:    jne .LBB4_2
+; X86-NEXT:  # %bb.1:
+; X86-NEXT:    movl (%esp), %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    cmpl $-1, %edx
-; X86-NEXT:    movl %ecx, %eax
-; X86-NEXT:    cmovel %edx, %eax
-; X86-NEXT:    cmovel %ecx, %eax
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT:    orl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT:    movl $-1, %ecx
-; X86-NEXT:    cmovnel %ecx, %edx
-; X86-NEXT:    cmovnel %ecx, %eax
+; X86-NEXT:  .LBB4_2:
 ; X86-NEXT:    leal -4(%ebp), %esp
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl
   %tmp = call i64 @llvm.udiv.fix.sat.i64(i64 %x, i64 %y, i32 31)
   ret i64 %tmp
 }
 
 define i18 @func6(i16 %x, i16 %y) nounwind {
 ; X64-LABEL: func6:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movswl %di, %eax
 ; X64-NEXT:    andl $262143, %eax # imm = 0x3FFFF
 ; X64-NEXT:    movswl %si, %ecx
 ; X64-NEXT:    andl $262143, %ecx # imm = 0x3FFFF
 ; X64-NEXT:    shll $7, %eax
 ; X64-NEXT:    xorl %edx, %edx
 ; X64-NEXT:    divl %ecx
-; X64-NEXT:    cmpl $262143, %eax # imm = 0x3FFFF
+; X64-NEXT:    cmpl $262142, %eax # imm = 0x3FFFE
 ; X64-NEXT:    movl $262143, %ecx # imm = 0x3FFFF
-; X64-NEXT:    cmovael %ecx, %eax
+; X64-NEXT:    cmoval %ecx, %eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func6:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movswl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    andl $262143, %ecx # imm = 0x3FFFF
 ; X86-NEXT:    movswl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    andl $262143, %eax # imm = 0x3FFFF
 ; X86-NEXT:    shll $7, %eax
 ; X86-NEXT:    xorl %edx, %edx
 ; X86-NEXT:    divl %ecx
-; X86-NEXT:    cmpl $262143, %eax # imm = 0x3FFFF
+; X86-NEXT:    cmpl $262142, %eax # imm = 0x3FFFE
 ; X86-NEXT:    movl $262143, %ecx # imm = 0x3FFFF
-; X86-NEXT:    cmovael %ecx, %eax
+; X86-NEXT:    cmoval %ecx, %eax
 ; X86-NEXT:    retl
   %x2 = sext i16 %x to i18
   %y2 = sext i16 %y to i18
   %tmp = call i18 @llvm.udiv.fix.sat.i18(i18 %x2, i18 %y2, i32 7)
   ret i18 %tmp
 }
 
 define i16 @func7(i16 %x, i16 %y) nounwind {
 ; X64-LABEL: func7:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movzwl %si, %ecx
 ; X64-NEXT:    movzwl %di, %eax
 ; X64-NEXT:    addl %eax, %eax
 ; X64-NEXT:    shlq $16, %rax
 ; X64-NEXT:    xorl %edx, %edx
 ; X64-NEXT:    divq %rcx
-; X64-NEXT:    cmpq $131071, %rax # imm = 0x1FFFF
+; X64-NEXT:    cmpq $131070, %rax # imm = 0x1FFFE
 ; X64-NEXT:    movl $131071, %ecx # imm = 0x1FFFF
-; X64-NEXT:    cmovaeq %rcx, %rax
+; X64-NEXT:    cmovaq %rcx, %rax
 ; X64-NEXT:    shrl %eax
 ; X64-NEXT:    # kill: def $ax killed $ax killed $rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func7:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movzwl %cx, %ecx
 ; X86-NEXT:    addl %ecx, %ecx
 ; X86-NEXT:    movl %ecx, %edx
 ; X86-NEXT:    shrl $16, %edx
 ; X86-NEXT:    shll $16, %ecx
 ; X86-NEXT:    pushl $0
 ; X86-NEXT:    pushl %eax
 ; X86-NEXT:    pushl %edx
 ; X86-NEXT:    pushl %ecx
 ; X86-NEXT:    calll __udivdi3
 ; X86-NEXT:    addl $16, %esp
-; X86-NEXT:    cmpl $131071, %eax # imm = 0x1FFFF
+; X86-NEXT:    cmpl $131070, %eax # imm = 0x1FFFE
 ; X86-NEXT:    movl $131071, %ecx # imm = 0x1FFFF
-; X86-NEXT:    cmovael %ecx, %eax
+; X86-NEXT:    cmoval %ecx, %eax
 ; X86-NEXT:    testl %edx, %edx
 ; X86-NEXT:    cmovnel %ecx, %eax
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    retl
   %tmp = call i16 @llvm.udiv.fix.sat.i16(i16 %x, i16 %y, i32 16)
   ret i16 %tmp
 }

 ;
 ; X86-LABEL: vec:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebp
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    xorl %eax, %eax
 ; X86-NEXT:    addl %ecx, %ecx
 ; X86-NEXT:    setb %al
 ; X86-NEXT:    shldl $31, %ecx, %eax
 ; X86-NEXT:    shll $31, %ecx
 ; X86-NEXT:    pushl $0
 ; X86-NEXT:    pushl {{[0-9]+}}(%esp)
 ; X86-NEXT:    pushl %eax
 ; X86-NEXT:    pushl %ecx
 ; X86-NEXT:    calll __udivdi3
 ; X86-NEXT:    addl $16, %esp
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl $0, %ecx
-; X86-NEXT:    sbbl %ecx, %ecx
-; X86-NEXT:    notl %ecx
-; X86-NEXT:    orl %eax, %ecx
-; X86-NEXT:    movl %ecx, %esi
-; X86-NEXT:    xorl %ecx, %ecx
-; X86-NEXT:    addl %edi, %edi
-; X86-NEXT:    setb %cl
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
-; X86-NEXT:    movl $1, %ebp
-; X86-NEXT:    cmovael %ebp, %edx
+; X86-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
 ; X86-NEXT:    movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    movl $1, %ebp
-; X86-NEXT:    cmovel %eax, %esi
-; X86-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT:    shldl $31, %edi, %ecx
-; X86-NEXT:    shll $31, %edi
+; X86-NEXT:    xorl %eax, %eax
+; X86-NEXT:    addl %ebp, %ebp
+; X86-NEXT:    setb %al
+; X86-NEXT:    shldl $31, %ebp, %eax
+; X86-NEXT:    shll $31, %ebp
 ; X86-NEXT:    pushl $0
-; X86-NEXT:    pushl {{[0-9]+}}(%esp)
-; X86-NEXT:    pushl %ecx
-; X86-NEXT:    pushl %edi
+; X86-NEXT:    pushl %ebx
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    calll __udivdi3
 ; X86-NEXT:    addl $16, %esp
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl $0, %edi
-; X86-NEXT:    sbbl %edi, %edi
-; X86-NEXT:    notl %edi
-; X86-NEXT:    orl %eax, %edi
-; X86-NEXT:    xorl %ecx, %ecx
-; X86-NEXT:    addl %ebx, %ebx
-; X86-NEXT:    setb %cl
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT:    cmovael %ebp, %edx
-; X86-NEXT:    movl %edx, (%esp) # 4-byte Spill
-; X86-NEXT:    cmovel %eax, %edi
-; X86-NEXT:    shldl $31, %ebx, %ecx
-; X86-NEXT:    shll $31, %ebx
+; X86-NEXT:    movl %eax, (%esp) # 4-byte Spill
+; X86-NEXT:    movl %edx, %ebp
+; X86-NEXT:    xorl %eax, %eax
+; X86-NEXT:    addl %edi, %edi
+; X86-NEXT:    setb %al
+; X86-NEXT:    shldl $31, %edi, %eax
+; X86-NEXT:    shll $31, %edi
 ; X86-NEXT:    pushl $0
 ; X86-NEXT:    pushl {{[0-9]+}}(%esp)
-; X86-NEXT:    pushl %ecx
-; X86-NEXT:    pushl %ebx
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    pushl %edi
 ; X86-NEXT:    calll __udivdi3
 ; X86-NEXT:    addl $16, %esp
-; X86-NEXT:    movl %edx, %ebx
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl $0, %ebp
-; X86-NEXT:    sbbl %ebp, %ebp
-; X86-NEXT:    notl %ebp
-; X86-NEXT:    orl %eax, %ebp
-; X86-NEXT:    xorl %ecx, %ecx
+; X86-NEXT:    movl %eax, %ebx
+; X86-NEXT:    movl %edx, %edi
+; X86-NEXT:    xorl %eax, %eax
 ; X86-NEXT:    addl %esi, %esi
-; X86-NEXT:    setb %cl
-; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl $1, %edx
-; X86-NEXT:    cmovael %edx, %ebx
-; X86-NEXT:    cmovel %eax, %ebp
-; X86-NEXT:    shldl $31, %esi, %ecx
+; X86-NEXT:    setb %al
+; X86-NEXT:    shldl $31, %esi, %eax
 ; X86-NEXT:    shll $31, %esi
 ; X86-NEXT:    pushl $0
 ; X86-NEXT:    pushl {{[0-9]+}}(%esp)
-; X86-NEXT:    pushl %ecx
+; X86-NEXT:    pushl %eax
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    calll __udivdi3
 ; X86-NEXT:    addl $16, %esp
 ; X86-NEXT:    cmpl $1, %edx
-; X86-NEXT:    movl $0, %ecx
-; X86-NEXT:    sbbl %ecx, %ecx
-; X86-NEXT:    notl %ecx
-; X86-NEXT:    orl %eax, %ecx
-; X86-NEXT:    cmpl $1, %edx
+; X86-NEXT:    movl $-1, %ecx
+; X86-NEXT:    cmoval %ecx, %eax
+; X86-NEXT:    testl %edx, %edx
 ; X86-NEXT:    movl $1, %esi
-; X86-NEXT:    cmovbl %edx, %esi
-; X86-NEXT:    cmovel %eax, %ecx
-; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT:    shrdl $1, %eax, %edx
+; X86-NEXT:    cmoval %esi, %edx
+; X86-NEXT:    shldl $31, %eax, %edx
+; X86-NEXT:    cmpl $1, %edi
+; X86-NEXT:    cmoval %ecx, %ebx
+; X86-NEXT:    testl %edi, %edi
+; X86-NEXT:    cmoval %esi, %edi
+; X86-NEXT:    shldl $31, %ebx, %edi
+; X86-NEXT:    cmpl $1, %ebp
 ; X86-NEXT:    movl (%esp), %eax # 4-byte Reload
-; X86-NEXT:    shrdl $1, %eax, %edi
-; X86-NEXT:    shrdl $1, %ebx, %ebp
-; X86-NEXT:    shrdl $1, %esi, %ecx
+; X86-NEXT:    cmoval %ecx, %eax
+; X86-NEXT:    testl %ebp, %ebp
+; X86-NEXT:    cmoval %esi, %ebp
+; X86-NEXT:    shldl $31, %eax, %ebp
+; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
+; X86-NEXT:    cmpl $1, %ebx
+; X86-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT:    cmoval %ecx, %eax
+; X86-NEXT:    testl %ebx, %ebx
+; X86-NEXT:    cmovbel %ebx, %esi
+; X86-NEXT:    shldl $31, %eax, %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movl %ecx, 12(%eax)
+; X86-NEXT:    movl %esi, 12(%eax)
 ; X86-NEXT:    movl %ebp, 8(%eax)
 ; X86-NEXT:    movl %edi, 4(%eax)
 ; X86-NEXT:    movl %edx, (%eax)
 ; X86-NEXT:    addl $12, %esp
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx
 ; X86-NEXT:    popl %ebp
 ; X86-NEXT:    retl $4
   %tmp = call <4 x i32> @llvm.udiv.fix.sat.v4i32(<4 x i32> %x, <4 x i32> %y, i32 31)
   ret <4 x i32> %tmp
 }

llvm/test/CodeGen/X86/umul_fix_sat.ll

 ; X64-LABEL: func:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %esi, %eax
 ; X64-NEXT:    movl %edi, %ecx
 ; X64-NEXT:    imulq %rax, %rcx
 ; X64-NEXT:    movq %rcx, %rax
 ; X64-NEXT:    shrq $32, %rax
 ; X64-NEXT:    shrdl $2, %eax, %ecx
-; X64-NEXT:    cmpl $3, %eax
+; X64-NEXT:    cmpl $4, %eax
 ; X64-NEXT:    movl $-1, %eax
-; X64-NEXT:    cmovbel %ecx, %eax
+; X64-NEXT:    cmovbl %ecx, %eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    mull {{[0-9]+}}(%esp)
 ; X86-NEXT:    shrdl $2, %edx, %eax
-; X86-NEXT:    cmpl $3, %edx
+; X86-NEXT:    cmpl $4, %edx
 ; X86-NEXT:    movl $-1, %ecx
-; X86-NEXT:    cmoval %ecx, %eax
+; X86-NEXT:    cmovael %ecx, %eax
 ; X86-NEXT:    retl
   %tmp = call i32 @llvm.umul.fix.sat.i32(i32 %x, i32 %y, i32 2)
   ret i32 %tmp
 }
 
 define i64 @func2(i64 %x, i64 %y) nounwind {
 ; X64-LABEL: func2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    mulq %rsi
 ; X64-NEXT:    shrdq $2, %rdx, %rax
-; X64-NEXT:    cmpq $3, %rdx
+; X64-NEXT:    cmpq $4, %rdx
 ; X64-NEXT:    movq $-1, %rcx
-; X64-NEXT:    cmovaq %rcx, %rax
+; X64-NEXT:    cmovaeq %rcx, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi

 ; X64-NEXT:    imull %esi, %eax
 ; X64-NEXT:    movl %eax, %ecx
 ; X64-NEXT:    shrb $2, %cl
 ; X64-NEXT:    shrl $8, %eax
 ; X64-NEXT:    movl %eax, %edx
 ; X64-NEXT:    shlb $6, %dl
 ; X64-NEXT:    orb %cl, %dl
 ; X64-NEXT:    movzbl %dl, %ecx
-; X64-NEXT:    cmpb $3, %al
+; X64-NEXT:    cmpb $4, %al
 ; X64-NEXT:    movl $255, %eax
-; X64-NEXT:    cmovbel %ecx, %eax
+; X64-NEXT:    cmovbl %ecx, %eax
 ; X64-NEXT:    shrb $4, %al
 ; X64-NEXT:    # kill: def $al killed $al killed $eax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X86-NEXT:    andb $15, %al
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X86-NEXT:    movzbl %al, %edx
 ; X86-NEXT:    shlb $4, %cl
 ; X86-NEXT:    movzbl %cl, %eax
 ; X86-NEXT:    imull %edx, %eax
 ; X86-NEXT:    movb %ah, %cl
 ; X86-NEXT:    shlb $6, %cl
 ; X86-NEXT:    shrb $2, %al
 ; X86-NEXT:    orb %cl, %al
 ; X86-NEXT:    movzbl %al, %ecx
-; X86-NEXT:    cmpb $3, %ah
+; X86-NEXT:    cmpb $4, %ah
 ; X86-NEXT:    movl $255, %eax
-; X86-NEXT:    cmovbel %ecx, %eax
+; X86-NEXT:    cmovbl %ecx, %eax
 ; X86-NEXT:    shrb $4, %al
 ; X86-NEXT:    # kill: def $al killed $al killed $eax
 ; X86-NEXT:    retl
   %tmp = call i4 @llvm.umul.fix.sat.i4(i4 %x, i4 %y, i32 2)
   ret i4 %tmp
 }
 
 define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-LABEL: vec:
 ; X64:       # %bb.0:
 ; X64-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
 ; X64-NEXT:    movd %xmm2, %eax
 ; X64-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
 ; X64-NEXT:    movd %xmm2, %ecx
 ; X64-NEXT:    imulq %rax, %rcx
 ; X64-NEXT:    movq %rcx, %rax
 ; X64-NEXT:    shrq $32, %rax
 ; X64-NEXT:    shrdl $2, %eax, %ecx
-; X64-NEXT:    cmpl $3, %eax
+; X64-NEXT:    cmpl $4, %eax
 ; X64-NEXT:    movl $-1, %eax
-; X64-NEXT:    cmoval %eax, %ecx
+; X64-NEXT:    cmovael %eax, %ecx
 ; X64-NEXT:    movd %ecx, %xmm2
 ; X64-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
 ; X64-NEXT:    movd %xmm3, %ecx
 ; X64-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[2,3,2,3]
 ; X64-NEXT:    movd %xmm3, %edx
 ; X64-NEXT:    imulq %rcx, %rdx
 ; X64-NEXT:    movq %rdx, %rcx
 ; X64-NEXT:    shrq $32, %rcx
 ; X64-NEXT:    shrdl $2, %ecx, %edx
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    cmoval %eax, %edx
+; X64-NEXT:    cmpl $4, %ecx
+; X64-NEXT:    cmovael %eax, %edx
 ; X64-NEXT:    movd %edx, %xmm3
 ; X64-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
 ; X64-NEXT:    movd %xmm1, %ecx
 ; X64-NEXT:    movd %xmm0, %edx
 ; X64-NEXT:    imulq %rcx, %rdx
 ; X64-NEXT:    movq %rdx, %rcx
 ; X64-NEXT:    shrq $32, %rcx
 ; X64-NEXT:    shrdl $2, %ecx, %edx
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    cmoval %eax, %edx
+; X64-NEXT:    cmpl $4, %ecx
+; X64-NEXT:    cmovael %eax, %edx
 ; X64-NEXT:    movd %edx, %xmm2
 ; X64-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
 ; X64-NEXT:    movd %xmm1, %ecx
 ; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
 ; X64-NEXT:    movd %xmm0, %edx
 ; X64-NEXT:    imulq %rcx, %rdx
 ; X64-NEXT:    movq %rdx, %rcx
 ; X64-NEXT:    shrq $32, %rcx
 ; X64-NEXT:    shrdl $2, %ecx, %edx
-; X64-NEXT:    cmpl $3, %ecx
-; X64-NEXT:    cmoval %eax, %edx
+; X64-NEXT:    cmpl $4, %ecx
+; X64-NEXT:    cmovael %eax, %edx
 ; X64-NEXT:    movd %edx, %xmm0
 ; X64-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
 ; X64-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
 ; X64-NEXT:    movdqa %xmm2, %xmm0
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: vec:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ebp
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    mull {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %esi
 ; X86-NEXT:    shrdl $2, %edx, %esi
-; X86-NEXT:    cmpl $3, %edx
+; X86-NEXT:    cmpl $4, %edx
 ; X86-NEXT:    movl $-1, %ecx
-; X86-NEXT:    cmoval %ecx, %esi
+; X86-NEXT:    cmovael %ecx, %esi
 ; X86-NEXT:    movl %ebp, %eax
 ; X86-NEXT:    mull {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %ebp
 ; X86-NEXT:    shrdl $2, %edx, %ebp
-; X86-NEXT:    cmpl $3, %edx
-; X86-NEXT:    cmoval %ecx, %ebp
+; X86-NEXT:    cmpl $4, %edx
+; X86-NEXT:    cmovael %ecx, %ebp
 ; X86-NEXT:    movl %ebx, %eax
 ; X86-NEXT:    mull {{[0-9]+}}(%esp)
 ; X86-NEXT:    movl %eax, %ebx
 ; X86-NEXT:    shrdl $2, %edx, %ebx
-; X86-NEXT:    cmpl $3, %edx
-; X86-NEXT:    cmoval %ecx, %ebx
+; X86-NEXT:    cmpl $4, %edx
+; X86-NEXT:    cmovael %ecx, %ebx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    mull {{[0-9]+}}(%esp)
 ; X86-NEXT:    shrdl $2, %edx, %eax
-; X86-NEXT:    cmpl $3, %edx
-; X86-NEXT:    cmoval %ecx, %eax
+; X86-NEXT:    cmpl $4, %edx
+; X86-NEXT:    cmovael %ecx, %eax
 ; X86-NEXT:    movl %eax, 12(%edi)
 ; X86-NEXT:    movl %ebx, 8(%edi)
 ; X86-NEXT:    movl %ebp, 4(%edi)
 ; X86-NEXT:    movl %esi, (%edi)
 ; X86-NEXT:    movl %edi, %eax
 ; X86-NEXT:    popl %esi
 ; X86-NEXT:    popl %edi
 ; X86-NEXT:    popl %ebx

 }
 
 define i64 @func7(i64 %x, i64 %y) nounwind {
 ; X64-LABEL: func7:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    mulq %rsi
 ; X64-NEXT:    shrdq $32, %rdx, %rax
-; X64-NEXT:    movl $4294967295, %ecx # imm = 0xFFFFFFFF
+; X64-NEXT:    movabsq $4294967296, %rcx # imm = 0x100000000
 ; X64-NEXT:    cmpq %rcx, %rdx
 ; X64-NEXT:    movq $-1, %rcx
-; X64-NEXT:    cmovaq %rcx, %rax
+; X64-NEXT:    cmovaeq %rcx, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func7:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi

 }
 
 define i64 @func8(i64 %x, i64 %y) nounwind {
 ; X64-LABEL: func8:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    mulq %rsi
 ; X64-NEXT:    shrdq $63, %rdx, %rax
-; X64-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
+; X64-NEXT:    movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
 ; X64-NEXT:    cmpq %rcx, %rdx
 ; X64-NEXT:    movq $-1, %rcx
-; X64-NEXT:    cmovaq %rcx, %rax
+; X64-NEXT:    cmovaeq %rcx, %rax
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: func8:
 ; X86:       # %bb.0:
 ; X86-NEXT:    pushl %ebp
 ; X86-NEXT:    pushl %ebx
 ; X86-NEXT:    pushl %edi
 ; X86-NEXT:    pushl %esi

llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X64,SSE2
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefixes=X64,SSE41
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefixes=X64,AVX1
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefixes=X64,AVX2
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefixes=X64,AVX512VL
 
 define i1 @test_urem_odd(i13 %X) nounwind {
 ; X86-LABEL: test_urem_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $3277, {{[0-9]+}}(%esp), %eax # imm = 0xCCD
 ; X86-NEXT:    andl $8191, %eax # imm = 0x1FFF
-; X86-NEXT:    cmpl $1639, %eax # imm = 0x667
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $1638, %eax # imm = 0x666
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $3277, %edi, %eax # imm = 0xCCD
 ; X64-NEXT:    andl $8191, %eax # imm = 0x1FFF
-; X64-NEXT:    cmpl $1639, %eax # imm = 0x667
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $1638, %eax # imm = 0x666
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i13 %X, 5
   %cmp = icmp eq i13 %urem, 0
   ret i1 %cmp
 }
 
 define i1 @test_urem_even(i27 %X) nounwind {
 ; X86-LABEL: test_urem_even:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $115043767, {{[0-9]+}}(%esp), %eax # imm = 0x6DB6DB7
 ; X86-NEXT:    movl %eax, %ecx
 ; X86-NEXT:    shll $26, %ecx
 ; X86-NEXT:    andl $134217726, %eax # imm = 0x7FFFFFE
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    orl %ecx, %eax
 ; X86-NEXT:    andl $134217727, %eax # imm = 0x7FFFFFF
-; X86-NEXT:    cmpl $9586981, %eax # imm = 0x924925
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $9586980, %eax # imm = 0x924924
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_even:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $115043767, %edi, %eax # imm = 0x6DB6DB7
 ; X64-NEXT:    movl %eax, %ecx
 ; X64-NEXT:    shll $26, %ecx
 ; X64-NEXT:    andl $134217726, %eax # imm = 0x7FFFFFE
 ; X64-NEXT:    shrl %eax
 ; X64-NEXT:    orl %ecx, %eax
 ; X64-NEXT:    andl $134217727, %eax # imm = 0x7FFFFFF
-; X64-NEXT:    cmpl $9586981, %eax # imm = 0x924925
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $9586980, %eax # imm = 0x924924
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i27 %X, 14
   %cmp = icmp eq i27 %urem, 0
   ret i1 %cmp
 }
 
 define i1 @test_urem_odd_setne(i4 %X) nounwind {
 ; X86-LABEL: test_urem_odd_setne:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    leal (%eax,%eax,2), %ecx
 ; X86-NEXT:    leal (%eax,%ecx,4), %eax
 ; X86-NEXT:    andb $15, %al
-; X86-NEXT:    cmpb $3, %al
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpb $4, %al
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd_setne:
 ; X64:       # %bb.0:
 ; X64-NEXT:    # kill: def $edi killed $edi def $rdi
 ; X64-NEXT:    leal (%rdi,%rdi,2), %eax
 ; X64-NEXT:    leal (%rdi,%rax,4), %eax
 ; X64-NEXT:    andb $15, %al
-; X64-NEXT:    cmpb $3, %al
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpb $4, %al
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %urem = urem i4 %X, 5
   %cmp = icmp ne i4 %urem, 0
   ret i1 %cmp
 }
 
 define i1 @test_urem_negative_odd(i9 %X) nounwind {
 ; X86-LABEL: test_urem_negative_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $307, {{[0-9]+}}(%esp), %eax # imm = 0x133
 ; X86-NEXT:    andl $511, %eax # imm = 0x1FF
-; X86-NEXT:    cmpw $1, %ax
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpw $2, %ax
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_negative_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $307, %edi, %eax # imm = 0x133
 ; X64-NEXT:    andl $511, %eax # imm = 0x1FF
-; X64-NEXT:    cmpw $1, %ax
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpw $2, %ax
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %urem = urem i9 %X, -5
   %cmp = icmp ne i9 %urem, 0
   ret i1 %cmp
 }
 
 define <3 x i1> @test_urem_vec(<3 x i11> %X) nounwind {
 ; X86-LABEL: test_urem_vec:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $683, {{[0-9]+}}(%esp), %eax # imm = 0x2AB
 ; X86-NEXT:    movl %eax, %ecx
 ; X86-NEXT:    shll $10, %ecx
 ; X86-NEXT:    andl $2046, %eax # imm = 0x7FE
 ; X86-NEXT:    shrl %eax
 ; X86-NEXT:    orl %ecx, %eax
 ; X86-NEXT:    andl $2047, %eax # imm = 0x7FF
-; X86-NEXT:    cmpl $341, %eax # imm = 0x155
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $342, %eax # imm = 0x156
+; X86-NEXT:    setae %al
 ; X86-NEXT:    imull $1463, {{[0-9]+}}(%esp), %ecx # imm = 0x5B7
 ; X86-NEXT:    addl $-1463, %ecx # imm = 0xFA49
 ; X86-NEXT:    andl $2047, %ecx # imm = 0x7FF
-; X86-NEXT:    cmpl $292, %ecx # imm = 0x124
-; X86-NEXT:    seta %dl
+; X86-NEXT:    cmpl $293, %ecx # imm = 0x125
+; X86-NEXT:    setae %dl
 ; X86-NEXT:    imull $819, {{[0-9]+}}(%esp), %ecx # imm = 0x333
 ; X86-NEXT:    addl $-1638, %ecx # imm = 0xF99A
 ; X86-NEXT:    andl $2047, %ecx # imm = 0x7FF
-; X86-NEXT:    cmpw $1, %cx
-; X86-NEXT:    seta %cl
+; X86-NEXT:    cmpw $2, %cx
+; X86-NEXT:    setae %cl
 ; X86-NEXT:    retl
 ;
 ; SSE2-LABEL: test_urem_vec:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    movd %esi, %xmm0
 ; SSE2-NEXT:    movd %edi, %xmm1
 ; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
 ; SSE2-NEXT:    movd %edx, %xmm0

llvm/test/CodeGen/X86/urem-seteq-nonzero.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
 
 define i1 @t32_3_1(i32 %X) nounwind {
 ; X86-LABEL: t32_3_1:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    addl $1431655765, %eax # imm = 0x55555555
-; X86-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $1431655764, %eax # imm = 0x55555554
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_3_1:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    addl $1431655765, %eax # imm = 0x55555555
-; X64-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $1431655764, %eax # imm = 0x55555554
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 3
   %cmp = icmp eq i32 %urem, 1
   ret i1 %cmp
 }
 
 define i1 @t32_3_2(i32 %X) nounwind {
 ; X86-LABEL: t32_3_2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    addl $-1431655766, %eax # imm = 0xAAAAAAAA
-; X86-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $1431655764, %eax # imm = 0x55555554
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_3_2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    addl $-1431655766, %eax # imm = 0xAAAAAAAA
-; X64-NEXT:    cmpl $1431655765, %eax # imm = 0x55555555
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $1431655764, %eax # imm = 0x55555554
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 3
   %cmp = icmp eq i32 %urem, 2
   ret i1 %cmp
 }
 
 
 define i1 @t32_5_1(i32 %X) nounwind {
 ; X86-LABEL: t32_5_1:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $858993459, %eax # imm = 0x33333333
-; X86-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_5_1:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $858993459, %eax # imm = 0x33333333
-; X64-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 5
   %cmp = icmp eq i32 %urem, 1
   ret i1 %cmp
 }
 
 define i1 @t32_5_2(i32 %X) nounwind {
 ; X86-LABEL: t32_5_2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $1717986918, %eax # imm = 0x66666666
-; X86-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_5_2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $1717986918, %eax # imm = 0x66666666
-; X64-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 5
   %cmp = icmp eq i32 %urem, 2
   ret i1 %cmp
 }
 
 define i1 @t32_5_3(i32 %X) nounwind {
 ; X86-LABEL: t32_5_3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $-1717986919, %eax # imm = 0x99999999
-; X86-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_5_3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $-1717986919, %eax # imm = 0x99999999
-; X64-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 5
   %cmp = icmp eq i32 %urem, 3
   ret i1 %cmp
 }
 
 define i1 @t32_5_4(i32 %X) nounwind {
 ; X86-LABEL: t32_5_4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
 ; X86-NEXT:    addl $-858993460, %eax # imm = 0xCCCCCCCC
-; X86-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_5_4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
 ; X64-NEXT:    addl $-858993460, %eax # imm = 0xCCCCCCCC
-; X64-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $858993458, %eax # imm = 0x33333332
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 5
   %cmp = icmp eq i32 %urem, 4
   ret i1 %cmp
 }
 
 
 define i1 @t32_6_1(i32 %X) nounwind {
 ; X86-LABEL: t32_6_1:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    addl $1431655765, %eax # imm = 0x55555555
 ; X86-NEXT:    rorl %eax
-; X86-NEXT:    cmpl $715827883, %eax # imm = 0x2AAAAAAB
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_6_1:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    addl $1431655765, %eax # imm = 0x55555555
 ; X64-NEXT:    rorl %eax
-; X64-NEXT:    cmpl $715827883, %eax # imm = 0x2AAAAAAB
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 6
   %cmp = icmp eq i32 %urem, 1
   ret i1 %cmp
 }
 
 define i1 @t32_6_2(i32 %X) nounwind {
 ; X86-LABEL: t32_6_2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    addl $-1431655766, %eax # imm = 0xAAAAAAAA
 ; X86-NEXT:    rorl %eax
-; X86-NEXT:    cmpl $715827883, %eax # imm = 0x2AAAAAAB
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_6_2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    addl $-1431655766, %eax # imm = 0xAAAAAAAA
 ; X64-NEXT:    rorl %eax
-; X64-NEXT:    cmpl $715827883, %eax # imm = 0x2AAAAAAB
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 6
   %cmp = icmp eq i32 %urem, 2
   ret i1 %cmp
 }
 
 define i1 @t32_6_3(i32 %X) nounwind {
 ; X86-LABEL: t32_6_3:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    decl %eax
 ; X86-NEXT:    rorl %eax
-; X86-NEXT:    cmpl $715827883, %eax # imm = 0x2AAAAAAB
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_6_3:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    decl %eax
 ; X64-NEXT:    rorl %eax
-; X64-NEXT:    cmpl $715827883, %eax # imm = 0x2AAAAAAB
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 6
   %cmp = icmp eq i32 %urem, 3
   ret i1 %cmp
 }
 
 define i1 @t32_6_4(i32 %X) nounwind {
 ; X86-LABEL: t32_6_4:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    addl $1431655764, %eax # imm = 0x55555554
 ; X86-NEXT:    rorl %eax
-; X86-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $715827881, %eax # imm = 0x2AAAAAA9
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_6_4:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    addl $1431655764, %eax # imm = 0x55555554
 ; X64-NEXT:    rorl %eax
-; X64-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $715827881, %eax # imm = 0x2AAAAAA9
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 6
   %cmp = icmp eq i32 %urem, 4
   ret i1 %cmp
 }
 
 define i1 @t32_6_5(i32 %X) nounwind {
 ; X86-LABEL: t32_6_5:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1431655765, {{[0-9]+}}(%esp), %eax # imm = 0xAAAAAAAB
 ; X86-NEXT:    addl $-1431655767, %eax # imm = 0xAAAAAAA9
 ; X86-NEXT:    rorl %eax
-; X86-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $715827881, %eax # imm = 0x2AAAAAA9
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t32_6_5:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1431655765, %edi, %eax # imm = 0xAAAAAAAB
 ; X64-NEXT:    addl $-1431655767, %eax # imm = 0xAAAAAAA9
 ; X64-NEXT:    rorl %eax
-; X64-NEXT:    cmpl $715827882, %eax # imm = 0x2AAAAAAA
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $715827881, %eax # imm = 0x2AAAAAA9
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 6
   %cmp = icmp eq i32 %urem, 5
   ret i1 %cmp
 }
 
 ;-------------------------------------------------------------------------------
 ; Other widths.
 
 define i1 @t16_3_2(i16 %X) nounwind {
 ; X86-LABEL: t16_3_2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-21845, {{[0-9]+}}(%esp), %eax # imm = 0xAAAB
 ; X86-NEXT:    addl $-21846, %eax # imm = 0xAAAA
 ; X86-NEXT:    movzwl %ax, %eax
-; X86-NEXT:    cmpl $21845, %eax # imm = 0x5555
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $21844, %eax # imm = 0x5554
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t16_3_2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-21845, %edi, %eax # imm = 0xAAAB
 ; X64-NEXT:    addl $-21846, %eax # imm = 0xAAAA
 ; X64-NEXT:    movzwl %ax, %eax
-; X64-NEXT:    cmpl $21845, %eax # imm = 0x5555
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $21844, %eax # imm = 0x5554
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i16 %X, 3
   %cmp = icmp eq i16 %urem, 2
   ret i1 %cmp
 }
 
 define i1 @t8_3_2(i8 %X) nounwind {
 ; X86-LABEL: t8_3_2:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-85, {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    addb $-86, %al
-; X86-NEXT:    cmpb $85, %al
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpb $84, %al
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t8_3_2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-85, %edi, %eax
 ; X64-NEXT:    addb $-86, %al
-; X64-NEXT:    cmpb $85, %al
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpb $84, %al
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i8 %X, 3
   %cmp = icmp eq i8 %urem, 2
   ret i1 %cmp
 }
 
 define i1 @t64_3_2(i64 %X) nounwind {
 ; X86-LABEL: t64_3_2:

 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: t64_3_2:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movabsq $-6148914691236517205, %rax # imm = 0xAAAAAAAAAAAAAAAB
 ; X64-NEXT:    imulq %rdi, %rax
 ; X64-NEXT:    movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
 ; X64-NEXT:    addq %rax, %rcx
-; X64-NEXT:    movabsq $6148914691236517205, %rax # imm = 0x5555555555555555
+; X64-NEXT:    movabsq $6148914691236517204, %rax # imm = 0x5555555555555554
 ; X64-NEXT:    cmpq %rax, %rcx
-; X64-NEXT:    setb %al
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i64 %X, 3
   %cmp = icmp eq i64 %urem, 2
   ret i1 %cmp
 }

llvm/test/CodeGen/X86/urem-seteq-optsize.ll

; X64-NEXT:    retq
   %ret = select i1 %cmp, i32 42, i32 -10
   ret i32 %ret
 }
 
 define i32 @test_optsize(i32 %X) optsize nounwind readnone {
 ; X86-LABEL: test_optsize:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %eax # imm = 0xCCCCCCCD
-; X86-NEXT:    cmpl $858993460, %eax # imm = 0x33333334
+; X86-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
 ; X86-NEXT:    movl $42, %eax
-; X86-NEXT:    jb .LBB1_2
+; X86-NEXT:    jbe .LBB1_2
 ; X86-NEXT:  # %bb.1:
 ; X86-NEXT:    movl $-10, %eax
 ; X86-NEXT:  .LBB1_2:
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_optsize:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %eax # imm = 0xCCCCCCCD
-; X64-NEXT:    cmpl $858993460, %eax # imm = 0x33333334
+; X64-NEXT:    cmpl $858993459, %eax # imm = 0x33333333
 ; X64-NEXT:    movl $42, %ecx
 ; X64-NEXT:    movl $-10, %eax
-; X64-NEXT:    cmovbl %ecx, %eax
+; X64-NEXT:    cmovbel %ecx, %eax
 ; X64-NEXT:    retq
   %rem = urem i32 %X, 5
   %cmp = icmp eq i32 %rem, 0
   %ret = select i1 %cmp, i32 42, i32 -10
   ret i32 %ret
 }

llvm/test/CodeGen/X86/urem-seteq.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
 
 ;------------------------------------------------------------------------------;
 ; Odd divisors
 ;------------------------------------------------------------------------------;
 
 define i32 @test_urem_odd(i32 %X) nounwind {
 ; X86-LABEL: test_urem_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $858993460, %ecx # imm = 0x33333334
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $858993460, %ecx # imm = 0x33333334
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 5
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 define i32 @test_urem_odd_25(i32 %X) nounwind {
 ; X86-LABEL: test_urem_odd_25:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1030792151, {{[0-9]+}}(%esp), %ecx # imm = 0xC28F5C29
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $171798692, %ecx # imm = 0xA3D70A4
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $171798691, %ecx # imm = 0xA3D70A3
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd_25:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1030792151, %edi, %ecx # imm = 0xC28F5C29
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $171798692, %ecx # imm = 0xA3D70A4
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $171798691, %ecx # imm = 0xA3D70A3
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 25
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_urem_odd, except the divisor has bit 30 set.
 define i32 @test_urem_odd_bit30(i32 %X) nounwind {
 ; X86-LABEL: test_urem_odd_bit30:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $1789569707, {{[0-9]+}}(%esp), %ecx # imm = 0x6AAAAAAB
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $4, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $3, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd_bit30:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $1789569707, %edi, %ecx # imm = 0x6AAAAAAB
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $4, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $3, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 1073741827
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_urem_odd, except the divisor has bit 31 set.
 define i32 @test_urem_odd_bit31(i32 %X) nounwind {
 ; X86-LABEL: test_urem_odd_bit31:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $715827883, {{[0-9]+}}(%esp), %ecx # imm = 0x2AAAAAAB
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $2, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $1, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd_bit31:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $715827883, %edi, %ecx # imm = 0x2AAAAAAB
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $2, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $1, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 2147483651
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ;------------------------------------------------------------------------------;
 ; Even divisors
 ;------------------------------------------------------------------------------;
 
 define i16 @test_urem_even(i16 %X) nounwind {
 ; X86-LABEL: test_urem_even:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $28087, {{[0-9]+}}(%esp), %eax # imm = 0x6DB7
 ; X86-NEXT:    rorw %ax
 ; X86-NEXT:    movzwl %ax, %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $4681, %ecx # imm = 0x1249
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $4682, %ecx # imm = 0x124A
+; X86-NEXT:    setae %al
 ; X86-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_even:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $28087, %edi, %eax # imm = 0x6DB7
 ; X64-NEXT:    rorw %ax
 ; X64-NEXT:    movzwl %ax, %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $4681, %ecx # imm = 0x1249
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $4682, %ecx # imm = 0x124A
+; X64-NEXT:    setae %al
 ; X64-NEXT:    # kill: def $ax killed $ax killed $eax
 ; X64-NEXT:    retq
   %urem = urem i16 %X, 14
   %cmp = icmp ne i16 %urem, 0
   %ret = zext i1 %cmp to i16
   ret i16 %ret
 }
 
 define i32 @test_urem_even_100(i32 %X) nounwind {
 ; X86-LABEL: test_urem_even_100:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1030792151, {{[0-9]+}}(%esp), %ecx # imm = 0xC28F5C29
 ; X86-NEXT:    rorl $2, %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $42949673, %ecx # imm = 0x28F5C29
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $42949672, %ecx # imm = 0x28F5C28
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_even_100:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1030792151, %edi, %ecx # imm = 0xC28F5C29
 ; X64-NEXT:    rorl $2, %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $42949673, %ecx # imm = 0x28F5C29
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $42949672, %ecx # imm = 0x28F5C28
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 100
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_urem_even, except the divisor has bit 30 set.
 define i32 @test_urem_even_bit30(i32 %X) nounwind {
 ; X86-LABEL: test_urem_even_bit30:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-51622203, {{[0-9]+}}(%esp), %ecx # imm = 0xFCEC4EC5
 ; X86-NEXT:    rorl $3, %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $4, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $3, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_even_bit30:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-51622203, %edi, %ecx # imm = 0xFCEC4EC5
 ; X64-NEXT:    rorl $3, %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $4, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $3, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 1073741928
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; This is like test_urem_odd, except the divisor has bit 31 set.
 define i32 @test_urem_even_bit31(i32 %X) nounwind {
 ; X86-LABEL: test_urem_even_bit31:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-1157956869, {{[0-9]+}}(%esp), %ecx # imm = 0xBAFAFAFB
 ; X86-NEXT:    rorl %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $2, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $1, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_even_bit31:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-1157956869, %edi, %ecx # imm = 0xBAFAFAFB
 ; X64-NEXT:    rorl %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $2, %ecx
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $1, %ecx
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 2147483750
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ;------------------------------------------------------------------------------;
 ; Special case
 ;------------------------------------------------------------------------------;
 
 ; 'NE' predicate is fine too.
 define i32 @test_urem_odd_setne(i32 %X) nounwind {
 ; X86-LABEL: test_urem_odd_setne:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-858993459, {{[0-9]+}}(%esp), %ecx # imm = 0xCCCCCCCD
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $858993460, %ecx # imm = 0x33333334
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_odd_setne:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $858993459, %ecx # imm = 0x33333333
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $858993460, %ecx # imm = 0x33333334
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 5
   %cmp = icmp ne i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; The fold is only valid for positive divisors, negative-ones should be negated.
 define i32 @test_urem_negative_odd(i32 %X) nounwind {
 ; X86-LABEL: test_urem_negative_odd:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $858993459, {{[0-9]+}}(%esp), %ecx # imm = 0x33333333
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $1, %ecx
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $2, %ecx
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_negative_odd:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $858993459, %edi, %ecx # imm = 0x33333333
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $1, %ecx
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $2, %ecx
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, -5
   %cmp = icmp ne i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 define i32 @test_urem_negative_even(i32 %X) nounwind {
 ; X86-LABEL: test_urem_negative_even:
 ; X86:       # %bb.0:
 ; X86-NEXT:    imull $-920350135, {{[0-9]+}}(%esp), %ecx # imm = 0xC9249249
 ; X86-NEXT:    rorl %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $1, %ecx
-; X86-NEXT:    seta %al
+; X86-NEXT:    cmpl $2, %ecx
+; X86-NEXT:    setae %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_negative_even:
 ; X64:       # %bb.0:
 ; X64-NEXT:    imull $-920350135, %edi, %ecx # imm = 0xC9249249
 ; X64-NEXT:    rorl %ecx
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $1, %ecx
-; X64-NEXT:    seta %al
+; X64-NEXT:    cmpl $2, %ecx
+; X64-NEXT:    setae %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, -14
   %cmp = icmp ne i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ;------------------------------------------------------------------------------;

 
 ; We can lower remainder of division by all-ones much better elsewhere.
 define i32 @test_urem_allones(i32 %X) nounwind {
 ; X86-LABEL: test_urem_allones:
 ; X86:       # %bb.0:
 ; X86-NEXT:    xorl %ecx, %ecx
 ; X86-NEXT:    subl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    xorl %eax, %eax
-; X86-NEXT:    cmpl $2, %ecx
-; X86-NEXT:    setb %al
+; X86-NEXT:    cmpl $1, %ecx
+; X86-NEXT:    setbe %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_urem_allones:
 ; X64:       # %bb.0:
 ; X64-NEXT:    negl %edi
 ; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    cmpl $2, %edi
-; X64-NEXT:    setb %al
+; X64-NEXT:    cmpl $1, %edi
+; X64-NEXT:    setbe %al
 ; X64-NEXT:    retq
   %urem = urem i32 %X, 4294967295
   %cmp = icmp eq i32 %urem, 0
   %ret = zext i1 %cmp to i32
   ret i32 %ret
 }
 
 ; Check illegal types.

llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll

 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rsi, %rax
 ; CHECK-NEXT:    movq %rdi, %rdx
 ; CHECK-NEXT:    movl %eax, %ecx
 ; CHECK-NEXT:    shlq %cl, %rdx
 ; CHECK-NEXT:    cmpq $-2, %rdx
 ; CHECK-NEXT:    jg .LBB0_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpq $-3, %rdx
 ; CHECK-NEXT:    movl $1, %ecx
-; CHECK-NEXT:    cmovlq %rcx, %rax
+; CHECK-NEXT:    cmovleq %rcx, %rax
 ; CHECK-NEXT:    imulq %rdi, %rax
 ; CHECK-NEXT:  .LBB0_2: # %return
 ; CHECK-NEXT:    retq
 entry:
   %shl = shl i64 %a, %b
   %cmp = icmp sgt i64 %shl, -2
   br i1 %cmp, label %return, label %if.end
 

 ; CHECK-NEXT:    movq %rdi, %rdx
 ; CHECK-NEXT:    movl %eax, %ecx
 ; CHECK-NEXT:    shlq %cl, %rdx
 ; CHECK-NEXT:    testq %rdx, %rdx
 ; CHECK-NEXT:    js .LBB1_1
 ; CHECK-NEXT:  # %bb.2: # %return
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB1_1: # %if.end
-; CHECK-NEXT:    cmpq $-1, %rdx
+; CHECK-NEXT:    cmpq $-2, %rdx
 ; CHECK-NEXT:    movl $1, %ecx
-; CHECK-NEXT:    cmovlq %rcx, %rax
+; CHECK-NEXT:    cmovleq %rcx, %rax
 ; CHECK-NEXT:    imulq %rdi, %rax
 ; CHECK-NEXT:    retq
 entry:
   %shl = shl i64 %a, %b
   %cmp = icmp sgt i64 %shl, -1
   br i1 %cmp, label %return, label %if.end
 
 if.end:                                           ; preds = %entry

 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rsi, %rax
 ; CHECK-NEXT:    movq %rdi, %rdx
 ; CHECK-NEXT:    movl %eax, %ecx
 ; CHECK-NEXT:    shlq %cl, %rdx
 ; CHECK-NEXT:    cmpq $2, %rdx
 ; CHECK-NEXT:    jg .LBB4_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpq $1, %rdx
 ; CHECK-NEXT:    movl $1, %ecx
-; CHECK-NEXT:    cmovlq %rcx, %rax
+; CHECK-NEXT:    cmovleq %rcx, %rax
 ; CHECK-NEXT:    imulq %rdi, %rax
 ; CHECK-NEXT:  .LBB4_2: # %return
 ; CHECK-NEXT:    retq
 entry:
   %shl = shl i64 %a, %b
   %cmp = icmp sgt i64 %shl, 2
   br i1 %cmp, label %return, label %if.end
 

 
 define i64 @ll_a__2(i64 %a, i64 %b) {
 ; CHECK-LABEL: ll_a__2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rsi, %rax
 ; CHECK-NEXT:    cmpq $-2, %rdi
 ; CHECK-NEXT:    jg .LBB5_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpq $-3, %rdi
 ; CHECK-NEXT:    movl $1, %ecx
-; CHECK-NEXT:    cmovlq %rcx, %rax
+; CHECK-NEXT:    cmovleq %rcx, %rax
 ; CHECK-NEXT:    imulq %rdi, %rax
 ; CHECK-NEXT:  .LBB5_2: # %return
 ; CHECK-NEXT:    retq
 entry:
   %cmp = icmp sgt i64 %a, -2
   br i1 %cmp, label %return, label %if.end
 
 if.end:                                           ; preds = %entry

 ; CHECK-LABEL: ll_a__1:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rsi, %rax
 ; CHECK-NEXT:    testq %rdi, %rdi
 ; CHECK-NEXT:    js .LBB6_1
 ; CHECK-NEXT:  # %bb.2: # %return
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB6_1: # %if.end
-; CHECK-NEXT:    cmpq $-1, %rdi
+; CHECK-NEXT:    cmpq $-2, %rdi
 ; CHECK-NEXT:    movl $1, %ecx
-; CHECK-NEXT:    cmovlq %rcx, %rax
+; CHECK-NEXT:    cmovleq %rcx, %rax
 ; CHECK-NEXT:    imulq %rdi, %rax
 ; CHECK-NEXT:    retq
 entry:
   %cmp = icmp sgt i64 %a, -1
   br i1 %cmp, label %return, label %if.end
 
 if.end:                                           ; preds = %entry
   %cmp1 = icmp eq i64 %a, -1

 
 define i64 @ll_a_2(i64 %a, i64 %b) {
 ; CHECK-LABEL: ll_a_2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq %rsi, %rax
 ; CHECK-NEXT:    cmpq $2, %rdi
 ; CHECK-NEXT:    jg .LBB9_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpq $1, %rdi
 ; CHECK-NEXT:    movl $1, %ecx
-; CHECK-NEXT:    cmovlq %rcx, %rax
+; CHECK-NEXT:    cmovleq %rcx, %rax
 ; CHECK-NEXT:    imulq %rdi, %rax
 ; CHECK-NEXT:  .LBB9_2: # %return
 ; CHECK-NEXT:    retq
 entry:
   %cmp = icmp sgt i64 %a, 2
   br i1 %cmp, label %return, label %if.end
 
 if.end:                                           ; preds = %entry

 ; CHECK-LABEL: i_a_op_b__2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %esi, %ecx
 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    shll %cl, %eax
 ; CHECK-NEXT:    cmpl $-2, %eax
 ; CHECK-NEXT:    jg .LBB10_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpl $-3, %eax
 ; CHECK-NEXT:    movl $1, %eax
-; CHECK-NEXT:    cmovll %eax, %ecx
+; CHECK-NEXT:    cmovlel %eax, %ecx
 ; CHECK-NEXT:    imull %edi, %ecx
 ; CHECK-NEXT:  .LBB10_2: # %return
 ; CHECK-NEXT:    movslq %ecx, %rax
 ; CHECK-NEXT:    retq
 entry:
   %shl = shl i32 %a, %b
   %cmp = icmp sgt i32 %shl, -2
   br i1 %cmp, label %return, label %if.end

 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    shll %cl, %eax
 ; CHECK-NEXT:    testl %eax, %eax
 ; CHECK-NEXT:    js .LBB11_1
 ; CHECK-NEXT:  # %bb.2: # %return
 ; CHECK-NEXT:    movslq %ecx, %rax
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB11_1: # %if.end
-; CHECK-NEXT:    cmpl $-1, %eax
+; CHECK-NEXT:    cmpl $-2, %eax
 ; CHECK-NEXT:    movl $1, %eax
-; CHECK-NEXT:    cmovll %eax, %ecx
+; CHECK-NEXT:    cmovlel %eax, %ecx
 ; CHECK-NEXT:    imull %edi, %ecx
 ; CHECK-NEXT:    movslq %ecx, %rax
 ; CHECK-NEXT:    retq
 entry:
   %shl = shl i32 %a, %b
   %cmp = icmp sgt i32 %shl, -1
   br i1 %cmp, label %return, label %if.end
 

 ; CHECK-LABEL: i_a_op_b_2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movl %esi, %ecx
 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    shll %cl, %eax
 ; CHECK-NEXT:    cmpl $2, %eax
 ; CHECK-NEXT:    jg .LBB14_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpl $1, %eax
 ; CHECK-NEXT:    movl $1, %eax
-; CHECK-NEXT:    cmovll %eax, %ecx
+; CHECK-NEXT:    cmovlel %eax, %ecx
 ; CHECK-NEXT:    imull %edi, %ecx
 ; CHECK-NEXT:  .LBB14_2: # %return
 ; CHECK-NEXT:    movslq %ecx, %rax
 ; CHECK-NEXT:    retq
 entry:
   %shl = shl i32 %a, %b
   %cmp = icmp sgt i32 %shl, 2
   br i1 %cmp, label %return, label %if.end

 }
 
 define i64 @i_a__2(i32 signext %a, i32 signext %b) {
 ; CHECK-LABEL: i_a__2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpl $-2, %edi
 ; CHECK-NEXT:    jg .LBB15_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpl $-3, %edi
 ; CHECK-NEXT:    movl $1, %eax
-; CHECK-NEXT:    cmovll %eax, %esi
+; CHECK-NEXT:    cmovlel %eax, %esi
 ; CHECK-NEXT:    imull %edi, %esi
 ; CHECK-NEXT:  .LBB15_2: # %return
 ; CHECK-NEXT:    movslq %esi, %rax
 ; CHECK-NEXT:    retq
 entry:
   %cmp = icmp sgt i32 %a, -2
   br i1 %cmp, label %return, label %if.end
 

 ; CHECK-LABEL: i_a__1:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    testl %edi, %edi
 ; CHECK-NEXT:    js .LBB16_1
 ; CHECK-NEXT:  # %bb.2: # %return
 ; CHECK-NEXT:    movslq %esi, %rax
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .LBB16_1: # %if.end
-; CHECK-NEXT:    cmpl $-1, %edi
+; CHECK-NEXT:    cmpl $-2, %edi
 ; CHECK-NEXT:    movl $1, %eax
-; CHECK-NEXT:    cmovll %eax, %esi
+; CHECK-NEXT:    cmovlel %eax, %esi
 ; CHECK-NEXT:    imull %edi, %esi
 ; CHECK-NEXT:    movslq %esi, %rax
 ; CHECK-NEXT:    retq
 entry:
   %cmp = icmp sgt i32 %a, -1
   br i1 %cmp, label %return, label %if.end
 
 if.end:                                           ; preds = %entry

 }
 
 define i64 @i_a_2(i32 signext %a, i32 signext %b) {
 ; CHECK-LABEL: i_a_2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpl $2, %edi
 ; CHECK-NEXT:    jg .LBB19_2
 ; CHECK-NEXT:  # %bb.1: # %if.end
+; CHECK-NEXT:    cmpl $1, %edi
 ; CHECK-NEXT:    movl $1, %eax
-; CHECK-NEXT:    cmovll %eax, %esi
+; CHECK-NEXT:    cmovlel %eax, %esi
 ; CHECK-NEXT:    imull %edi, %esi
 ; CHECK-NEXT:  .LBB19_2: # %return
 ; CHECK-NEXT:    movslq %esi, %rax
 ; CHECK-NEXT:    retq
 entry:
   %cmp = icmp sgt i32 %a, 2
   br i1 %cmp, label %return, label %if.end
 

llvm/test/CodeGen/X86/vector-mulfix-legalize.ll

 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    pextrw $2, %xmm0, %eax
 ; CHECK-NEXT:    cwtl
 ; CHECK-NEXT:    leal (%rax,%rax,2), %ecx
 ; CHECK-NEXT:    movl %ecx, %edx
 ; CHECK-NEXT:    shrl $16, %edx
 ; CHECK-NEXT:    shldw $1, %cx, %dx
 ; CHECK-NEXT:    sarl $16, %ecx
-; CHECK-NEXT:    cmpl $16383, %ecx # imm = 0x3FFF
+; CHECK-NEXT:    cmpl $16384, %ecx # imm = 0x4000
 ; CHECK-NEXT:    movl $32767, %r8d # imm = 0x7FFF
-; CHECK-NEXT:    cmovgl %r8d, %edx
-; CHECK-NEXT:    cmpl $-16384, %ecx # imm = 0xC000
+; CHECK-NEXT:    cmovgel %r8d, %edx
+; CHECK-NEXT:    cmpl $-16385, %ecx # imm = 0xBFFF
 ; CHECK-NEXT:    movl $32768, %ecx # imm = 0x8000
-; CHECK-NEXT:    cmovll %ecx, %edx
+; CHECK-NEXT:    cmovlel %ecx, %edx
 ; CHECK-NEXT:    pextrw $1, %xmm0, %esi
 ; CHECK-NEXT:    movswl %si, %edi
 ; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    shrl $16, %eax
 ; CHECK-NEXT:    leal (%rdi,%rdi), %esi
 ; CHECK-NEXT:    shrdw $15, %ax, %si
 ; CHECK-NEXT:    sarl $15, %edi
-; CHECK-NEXT:    cmpl $16383, %edi # imm = 0x3FFF
-; CHECK-NEXT:    cmovgl %r8d, %esi
-; CHECK-NEXT:    cmpl $-16384, %edi # imm = 0xC000
-; CHECK-NEXT:    cmovll %ecx, %esi
+; CHECK-NEXT:    cmpl $16384, %edi # imm = 0x4000
+; CHECK-NEXT:    cmovgel %r8d, %esi
+; CHECK-NEXT:    cmpl $-16385, %edi # imm = 0xBFFF
+; CHECK-NEXT:    cmovlel %ecx, %esi
 ; CHECK-NEXT:    movd %xmm0, %eax
 ; CHECK-NEXT:    cwtl
 ; CHECK-NEXT:    movl %eax, %edi
 ; CHECK-NEXT:    shrl $16, %edi
 ; CHECK-NEXT:    shldw $1, %ax, %di
 ; CHECK-NEXT:    sarl $16, %eax
-; CHECK-NEXT:    cmpl $16383, %eax # imm = 0x3FFF
-; CHECK-NEXT:    cmovgl %r8d, %edi
-; CHECK-NEXT:    cmpl $-16384, %eax # imm = 0xC000
-; CHECK-NEXT:    cmovll %ecx, %edi
+; CHECK-NEXT:    cmpl $16384, %eax # imm = 0x4000
+; CHECK-NEXT:    cmovgel %r8d, %edi
+; CHECK-NEXT:    cmpl $-16385, %eax # imm = 0xBFFF
+; CHECK-NEXT:    cmovlel %ecx, %edi
 ; CHECK-NEXT:    movzwl %di, %eax
 ; CHECK-NEXT:    movd %eax, %xmm1
 ; CHECK-NEXT:    pinsrw $1, %esi, %xmm1
 ; CHECK-NEXT:    pinsrw $2, %edx, %xmm1
 ; CHECK-NEXT:    pextrw $3, %xmm0, %eax
 ; CHECK-NEXT:    cwtl
 ; CHECK-NEXT:    movl %eax, %edx
 ; CHECK-NEXT:    shrl $14, %edx
 ; CHECK-NEXT:    leal (,%rax,4), %esi
 ; CHECK-NEXT:    shrdw $15, %dx, %si
 ; CHECK-NEXT:    sarl $14, %eax
-; CHECK-NEXT:    cmpl $16383, %eax # imm = 0x3FFF
-; CHECK-NEXT:    cmovgl %r8d, %esi
-; CHECK-NEXT:    cmpl $-16384, %eax # imm = 0xC000
-; CHECK-NEXT:    cmovll %ecx, %esi
+; CHECK-NEXT:    cmpl $16384, %eax # imm = 0x4000
+; CHECK-NEXT:    cmovgel %r8d, %esi
+; CHECK-NEXT:    cmpl $-16385, %eax # imm = 0xBFFF
+; CHECK-NEXT:    cmovlel %ecx, %esi
 ; CHECK-NEXT:    pinsrw $3, %esi, %xmm1
 ; CHECK-NEXT:    movdqa %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %t = call <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
   ret <4 x i16> %t
 }
 
 
 define <4 x i16> @umulfixsat(<4 x i16> %a) {
 ; CHECK-LABEL: umulfixsat:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    pextrw $2, %xmm0, %eax
 ; CHECK-NEXT:    leal (%rax,%rax,2), %eax
 ; CHECK-NEXT:    movl %eax, %edx
 ; CHECK-NEXT:    shrl $16, %edx
 ; CHECK-NEXT:    movl %edx, %ecx
 ; CHECK-NEXT:    shldw $1, %ax, %cx
-; CHECK-NEXT:    cmpl $32767, %edx # imm = 0x7FFF
+; CHECK-NEXT:    cmpl $32768, %edx # imm = 0x8000
 ; CHECK-NEXT:    movl $65535, %eax # imm = 0xFFFF
-; CHECK-NEXT:    cmoval %eax, %ecx
+; CHECK-NEXT:    cmovael %eax, %ecx
 ; CHECK-NEXT:    pextrw $1, %xmm0, %edx
 ; CHECK-NEXT:    addl %edx, %edx
 ; CHECK-NEXT:    movl %edx, %esi
 ; CHECK-NEXT:    shrl $16, %esi
 ; CHECK-NEXT:    movl %esi, %edi
 ; CHECK-NEXT:    shldw $1, %dx, %di
-; CHECK-NEXT:    cmpl $32767, %esi # imm = 0x7FFF
-; CHECK-NEXT:    cmoval %eax, %edi
+; CHECK-NEXT:    cmpl $32768, %esi # imm = 0x8000
+; CHECK-NEXT:    cmovael %eax, %edi
 ; CHECK-NEXT:    movd %xmm0, %edx
 ; CHECK-NEXT:    xorl %esi, %esi
 ; CHECK-NEXT:    shldw $1, %dx, %si
-; CHECK-NEXT:    movl $32767, %edx # imm = 0x7FFF
+; CHECK-NEXT:    movl $32768, %edx # imm = 0x8000
 ; CHECK-NEXT:    negl %edx
-; CHECK-NEXT:    cmoval %eax, %esi
+; CHECK-NEXT:    cmovael %eax, %esi
 ; CHECK-NEXT:    movzwl %si, %edx
 ; CHECK-NEXT:    movd %edx, %xmm1
 ; CHECK-NEXT:    pinsrw $1, %edi, %xmm1
 ; CHECK-NEXT:    pinsrw $2, %ecx, %xmm1
 ; CHECK-NEXT:    pextrw $3, %xmm0, %ecx
 ; CHECK-NEXT:    shll $2, %ecx
 ; CHECK-NEXT:    movl %ecx, %edx
 ; CHECK-NEXT:    shrl $16, %edx
 ; CHECK-NEXT:    movl %edx, %esi
 ; CHECK-NEXT:    shldw $1, %cx, %si
-; CHECK-NEXT:    cmpl $32767, %edx # imm = 0x7FFF
-; CHECK-NEXT:    cmoval %eax, %esi
+; CHECK-NEXT:    cmpl $32768, %edx # imm = 0x8000
+; CHECK-NEXT:    cmovael %eax, %esi
 ; CHECK-NEXT:    pinsrw $3, %esi, %xmm1
 ; CHECK-NEXT:    movdqa %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %t = call <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
   ret <4 x i16> %t
 }

llvm/test/CodeGen/X86/zext-sext.ll

 ; CHECK-NEXT:    subq %rax, %rsi
 ; CHECK-NEXT:    movq (%rdx), %rax
 ; CHECK-NEXT:    movswl 8(%rdi), %edx
 ; CHECK-NEXT:    movswl (%rax,%rsi,2), %eax
 ; CHECK-NEXT:    movl $1, %esi
 ; CHECK-NEXT:    imull %edx, %eax
 ; CHECK-NEXT:    xorl %edx, %edx
 ; CHECK-NEXT:    addl $2138875574, %eax # imm = 0x7F7CA6B6
-; CHECK-NEXT:    cmpl $-8608074, %eax # imm = 0xFF7CA6B6
+; CHECK-NEXT:    cmpl $-8608075, %eax # imm = 0xFF7CA6B5
 ; CHECK-NEXT:    movslq %eax, %rdi
-; CHECK-NEXT:    setl %dl
-; CHECK-NEXT:    cmpl $2138875573, %eax # imm = 0x7F7CA6B5
+; CHECK-NEXT:    setle %dl
+; CHECK-NEXT:    cmpl $2138875574, %eax # imm = 0x7F7CA6B6
 ; CHECK-NEXT:    movq %rdi, %r8
 ; CHECK-NEXT:    leal -1(%rdx,%rdx), %edx
-; CHECK-NEXT:    cmovlel %edx, %esi
+; CHECK-NEXT:    cmovll %edx, %esi
 ; CHECK-NEXT:    subq %rax, %r8
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    cmpl $1, %esi
 ; CHECK-NEXT:    cmovneq %rax, %r8
 ; CHECK-NEXT:    testl %edi, %edi
 ; CHECK-NEXT:    cmovnsq %rax, %r8
 ; CHECK-NEXT:    movq (%rcx), %rax
 ; CHECK-NEXT:    subq %r8, %rdi