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Show First 20 Lines • Show All 189 Lines • ▼ Show 20 Lines	class RVVBuiltin<string suffix, string prototype, string type_range,

// If HasMask, this is the ID of the LLVM intrinsic we want to lower to.		// If HasMask, this is the ID of the LLVM intrinsic we want to lower to.
string IRNameMask = NAME #"_mask";		string IRNameMask = NAME #"_mask";

// If non empty, this is the code emitted in the header, otherwise		// If non empty, this is the code emitted in the header, otherwise
// an automatic definition in header is emitted.		// an automatic definition in header is emitted.
string HeaderCode = "";		string HeaderCode = "";

		// Sub extension of vector spec. Currently only support Zvamo or Zvlsseg.
		string RequiredExtension = "";

}		}

//===----------------------------------------------------------------------===//		//===----------------------------------------------------------------------===//
// Basic classes with automatic codegen.		// Basic classes with automatic codegen.
//===----------------------------------------------------------------------===//		//===----------------------------------------------------------------------===//

class RVVOutBuiltin<string suffix, string prototype, string type_range>		class RVVOutBuiltin<string suffix, string prototype, string type_range>
: RVVBuiltin<suffix, prototype, type_range> {		: RVVBuiltin<suffix, prototype, type_range> {
▲ Show 20 Lines • Show All 528 Lines • ▼ Show 20 Lines	let HasMaskedOffOperand = false,
def : RVVBuiltin<"Uv", "0UvPUe" # eew_type # "Uv", type>;		def : RVVBuiltin<"Uv", "0UvPUe" # eew_type # "Uv", type>;
}		}
}		}
}		}
}		}
}		}
}		}

		multiclass RVVAMOBuiltinSet<bit has_signed = false, bit has_unsigned = false,
		bit has_fp = false> {
		defvar type_list = !if(has_fp, ["i","l","f","d"], ["i","l"]);
		foreach type = type_list in
		foreach eew_list = [["8", "(Log2EEW:3)"], ["16", "(Log2EEW:4)"],
		khchenUnsubmitted Done Reply Inline Actions `foreach eew_list = EEWList in {` khchen: `foreach eew_list = EEWList in {`
		["32", "(Log2EEW:5)"], ["64", "(Log2EEW:6)"]] in {
		defvar eew = eew_list[0];
		defvar eew_index = eew_list[1];
		let Name = NAME # "ei" # eew # "_" # "v",
		IRName = NAME,
		IRNameMask = NAME # "_mask",
		HasMaskedOffOperand = false,
		ManualCodegen = [{
		// base, bindex, value, vl
		IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[3]->getType()};
		Ops[0] = Builder.CreateBitCast(Ops[0],
		llvm::PointerType::getUnqual(ResultType));
		}],
		ManualCodegenMask = [{
		IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[4]->getType()};
		Ops[0] = Builder.CreateBitCast(Ops[0],
		llvm::PointerType::getUnqual(ResultType));
		khchenUnsubmitted Done Reply Inline Actions `ResultType->getPointerTo()` khchen: `ResultType->getPointerTo()`
		}] in {
		if has_signed then
		def : RVVBuiltin<"v", "vPe" # eew_index # "Uvv", type>;
		if !and(!ne(type, "f"), !ne(type, "d"), has_unsigned) then
		khchenUnsubmitted Done Reply Inline Actions `if !and(!not(IsFloat<type>.val), has_unsigned) then` khchen: `if !and(!not(IsFloat<type>.val), has_unsigned) then`
		def : RVVBuiltin<"Uv", "UvPUe" # eew_index # "UvUv", type>;
		}
		}
		}

// 6. Configuration-Setting Instructions		// 6. Configuration-Setting Instructions
// 6.1. vsetvli/vsetvl instructions		// 6.1. vsetvli/vsetvl instructions
let HasVL = false,		let HasVL = false,
HasMask = false,		HasMask = false,
HasSideEffects = true,		HasSideEffects = true,
Log2LMUL = [0],		Log2LMUL = [0],
ManualCodegen = [{IntrinsicTypes = {ResultType};}] in // Set XLEN type		ManualCodegen = [{IntrinsicTypes = {ResultType};}] in // Set XLEN type
{		{
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
defm : RVVIndexedStore<"vsoxei">;		defm : RVVIndexedStore<"vsoxei">;

// 7.7. Unit-stride Fault-Only-First Loads		// 7.7. Unit-stride Fault-Only-First Loads
defm vle8ff: RVVVLEFFBuiltin<["c"]>;		defm vle8ff: RVVVLEFFBuiltin<["c"]>;
defm vle16ff: RVVVLEFFBuiltin<["s"]>;		defm vle16ff: RVVVLEFFBuiltin<["s"]>;
defm vle32ff: RVVVLEFFBuiltin<["i", "f"]>;		defm vle32ff: RVVVLEFFBuiltin<["i", "f"]>;
defm vle64ff: RVVVLEFFBuiltin<["l", "d"]>;		defm vle64ff: RVVVLEFFBuiltin<["l", "d"]>;

		// 8. Vector AMO Operations
		let RequiredExtension = "Zvamo" in {
		defm vamoswap : RVVAMOBuiltinSet< /* hasSigned / true, / hasUnsigned / true, / hasFP */ true>;
		defm vamoadd : RVVAMOBuiltinSet< /* hasSigned / true, / hasUnsigned */ true>;
		defm vamoxor : RVVAMOBuiltinSet< /* hasSigned / true, / hasUnsigned */ true>;
		defm vamoand : RVVAMOBuiltinSet< /* hasSigned / true, / hasUnsigned */ true>;
		defm vamoor : RVVAMOBuiltinSet< /* hasSigned / true, / hasUnsigned */ true>;
		defm vamomin : RVVAMOBuiltinSet< /* hasSigned */ true>;
		defm vamomax : RVVAMOBuiltinSet< /* hasSigned */ true>;
		defm vamominu : RVVAMOBuiltinSet< /* hasSigned / false, / hasUnsigned */ true>;
		defm vamomaxu : RVVAMOBuiltinSet< /* hasSigned / false, / hasUnsigned */ true>;
		}

// 12. Vector Integer Arithmetic Instructions		// 12. Vector Integer Arithmetic Instructions
// 12.1. Vector Single-Width Integer Add and Subtract		// 12.1. Vector Single-Width Integer Add and Subtract
defm vadd : RVVIntBinBuiltinSet;		defm vadd : RVVIntBinBuiltinSet;
defm vsub : RVVIntBinBuiltinSet;		defm vsub : RVVIntBinBuiltinSet;
defm vrsub : RVVOutOp1BuiltinSet<"vrsub", "csil",		defm vrsub : RVVOutOp1BuiltinSet<"vrsub", "csil",
[["vx", "v", "vve"],		[["vx", "v", "vve"],
["vx", "Uv", "UvUvUe"]]>;		["vx", "Uv", "UvUvUe"]]>;

▲ Show 20 Lines • Show All 381 Lines • Show Last 20 Lines

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei64(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei64(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei64(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamominei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamominei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamominei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamominei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamominei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamominei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamominei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamominei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei64(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei64(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c

This file was added.

This file has a very large number of changes (3,687 lines). Show File Contents

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.]]) [[ATTR5:#.]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei16(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei32(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei64(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei8(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei16(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei32(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]]) [[ATTR5]]
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei64(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei8_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei8_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei8_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei8_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei8_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei16_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei16_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei16_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei16_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei16_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei32_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei32_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei32_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei32_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei32_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei64_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei64_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei64_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei64_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei8_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei8_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei8_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei8_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei16_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei16_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei16_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei16_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei32_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei32_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei32_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei32_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei64_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei64_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei64_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei64_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei8_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei8_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei8_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei8_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei8_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei16_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei16_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei16_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei16_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei16_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei32_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei32_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei32_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei32_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei32_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei64_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei64_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei64_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei64_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei8_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei8_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei8_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei8_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei16_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei16_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei16_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei16_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei32_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei32_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei32_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei32_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei64_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei64_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei64_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei64_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei8_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei8_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei8_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei8_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei8_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei16_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei16_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei16_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei16_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei16_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei32_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei32_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei32_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei32_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoaddei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoaddei32_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoaddei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoaddei64_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoaddei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoaddei64_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoaddei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoaddei64_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoaddei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoaddei64_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei8_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei8_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei8_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei8_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei16_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei16_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei16_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei16_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei32_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei32_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei32_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei32_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoaddei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoaddei64_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoaddei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoaddei64_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoaddei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoaddei64_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoaddei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoaddei64_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei8_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei8_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei8_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei8_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei8_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei16_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei16_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei16_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei16_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei16_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei32_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei32_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei32_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei32_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoadd.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoaddei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoaddei32_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoadd.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoaddei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoaddei64_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoadd.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoaddei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoaddei64_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoadd.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoaddei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoaddei64_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoadd.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoaddei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoaddei64_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei8_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei8_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei8_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei8_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei16_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei16_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei16_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei16_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei32_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei32_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei32_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei32_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoadd.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoaddei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoaddei64_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoadd.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoaddei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoaddei64_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoadd.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoaddei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoaddei64_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoaddei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoaddei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoadd.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoaddei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoaddei64_v_u64m8_m(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei8_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei8_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei8_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei8_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei8_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei16_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei16_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei16_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei16_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei16_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei32_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei32_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei32_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei32_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei32_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei64_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei64_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei64_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei64_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei8_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei8_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei8_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei8_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei16_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei16_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei16_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei16_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei32_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei32_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei32_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei32_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei64_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei64_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei64_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei64_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei8_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei8_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei8_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei8_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei8_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei16_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei16_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei16_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei16_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei16_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei32_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei32_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei32_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei32_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei32_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei64_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei64_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei64_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei64_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei8_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei8_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei8_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei8_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei16_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei16_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei16_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei16_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei32_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei32_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei32_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei32_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei64_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei64_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei64_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei64_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei8_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei8_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei8_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei8_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei8_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei16_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei16_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei16_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei16_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei16_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei32_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei32_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei32_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei32_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoandei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoandei32_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoandei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoandei64_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoandei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoandei64_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoandei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoandei64_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoandei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoandei64_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei8_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei8_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei8_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei8_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei16_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei16_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei16_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei16_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei32_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei32_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei32_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei32_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoandei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoandei64_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoandei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoandei64_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoandei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoandei64_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoandei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoandei64_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei8_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei8_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei8_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei8_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei8_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei16_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei16_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei16_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei16_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei16_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei32_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei32_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei32_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei32_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoand.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoandei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoandei32_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoand.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoandei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoandei64_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoand.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoandei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoandei64_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoand.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoandei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoandei64_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoand.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoandei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoandei64_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei8_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei8_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei8_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei8_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei16_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei16_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei16_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei16_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei32_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei32_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei32_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei32_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoand.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoandei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoandei64_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoand.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoandei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoandei64_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoand.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoandei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoandei64_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoandei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoandei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoand.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoandei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoandei64_v_u64m8_m(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei8_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei8_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei8_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei8_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei8_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei16_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei16_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei16_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei16_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei16_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei32_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei32_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei32_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei32_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei32_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei64_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei64_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei64_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei64_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei8_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei8_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei8_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei8_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei16_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei16_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei16_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei16_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei32_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei32_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei32_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei32_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei64_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei64_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei64_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei64_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei8_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei8_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei8_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei8_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei8_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei16_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei16_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei16_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei16_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei16_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei32_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei32_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei32_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei32_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei32_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei64_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei64_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei64_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei64_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei8_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei8_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei8_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei8_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei16_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei16_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei16_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei16_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei32_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei32_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei32_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei32_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei64_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei64_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei64_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei64_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei8_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei8_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei8_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei8_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei8_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei16_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei16_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei16_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei16_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei16_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei32_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei32_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei32_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei32_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomax.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamomaxei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamomaxei32_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomax.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamomaxei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamomaxei64_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomax.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamomaxei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamomaxei64_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomax.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamomaxei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamomaxei64_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomax.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamomaxei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamomaxei64_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei8_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei8_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei8_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei8_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei16_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei16_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei16_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei16_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei32_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei32_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei32_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei32_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomax.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamomaxei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamomaxei64_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomax.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamomaxei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamomaxei64_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomax.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamomaxei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamomaxei64_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomax.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamomaxei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamomaxei64_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei8_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei8_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei8_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei8_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei8_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei16_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei16_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei16_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei16_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei16_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei32_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei32_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei32_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei32_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomaxu.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamomaxuei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamomaxuei32_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomaxu.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamomaxuei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamomaxuei64_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomaxu.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamomaxuei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamomaxuei64_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomaxu.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamomaxuei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamomaxuei64_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomaxu.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamomaxuei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamomaxuei64_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei8_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei8_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei8_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei8_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei16_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei16_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei16_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei16_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei32_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei32_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei32_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei32_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomaxu.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamomaxuei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamomaxuei64_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomaxu.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamomaxuei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamomaxuei64_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomaxu.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamomaxuei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamomaxuei64_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamomaxuei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamomaxuei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomaxu.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamomaxuei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamomaxuei64_v_u64m8_m(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei8_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamominei8_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei8_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamominei8_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamominei8_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei16_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei16_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamominei16_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamominei16_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamominei16_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei32_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamominei32_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei32_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamominei32_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamominei32_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei64_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei64_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamominei64_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamominei64_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamominei8_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamominei8_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei8_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamominei8_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamominei16_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei16_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamominei16_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamominei16_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamominei32_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamominei32_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei32_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamominei32_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamominei64_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei64_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamominei64_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamominei64_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei8_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei8_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei8_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei8_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei8_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei16_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei16_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei16_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei16_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei16_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei32_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei32_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei32_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei32_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei32_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei64_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei64_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei64_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei64_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei8_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei8_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei8_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei8_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei16_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei16_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei16_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei16_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei32_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei32_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei32_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei32_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei64_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei64_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei64_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei64_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei8_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamominei8_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei8_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamominei8_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamominei8_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei16_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei16_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamominei16_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamominei16_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamominei16_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei32_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamominei32_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamominei32_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamominei32_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamomin.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamominei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamominei32_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamomin.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamominei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamominei64_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamomin.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamominei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamominei64_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamomin.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamominei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamominei64_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamomin.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamominei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamominei64_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamominei8_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamominei8_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei8_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamominei8_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamominei16_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei16_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamominei16_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamominei16_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamominei32_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamominei32_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamominei32_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamominei32_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamomin.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamominei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamominei64_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamomin.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamominei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamominei64_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamomin.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamominei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamominei64_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamomin.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamominei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamominei64_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei8_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei8_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei8_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei8_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei8_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei16_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei16_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei16_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei16_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei16_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei32_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei32_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei32_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei32_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamominu.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamominuei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamominuei32_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamominu.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamominuei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamominuei64_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamominu.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamominuei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamominuei64_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamominu.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamominuei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamominuei64_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamominu.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamominuei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamominuei64_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei8_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei8_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei8_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei8_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei16_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei16_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei16_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei16_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei32_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei32_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei32_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei32_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamominu.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamominuei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamominuei64_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamominu.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamominuei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamominuei64_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamominu.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamominuei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamominuei64_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamominuei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamominuei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamominu.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamominuei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamominuei64_v_u64m8_m(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei8_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei8_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei8_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei8_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei8_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei16_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei16_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei16_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei16_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei16_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei32_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei32_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei32_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei32_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei32_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei64_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei64_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei64_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei64_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei8_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei8_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei8_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei8_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei16_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei16_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei16_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei16_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei32_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei32_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei32_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei32_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei64_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei64_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei64_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei64_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei8_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei8_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei8_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei8_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei8_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei16_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei16_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei16_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei16_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei16_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei32_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei32_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei32_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei32_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei32_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei64_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei64_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei64_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei64_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei8_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei8_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei8_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei8_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei16_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei16_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei16_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei16_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei32_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei32_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei32_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei32_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei64_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei64_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei64_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei64_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei8_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei8_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei8_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei8_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei8_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei16_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei16_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei16_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei16_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei16_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei32_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei32_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei32_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei32_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoorei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoorei32_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoorei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoorei64_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoorei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoorei64_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoorei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoorei64_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoorei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoorei64_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei8_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei8_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei8_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei8_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei16_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei16_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei16_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei16_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei32_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei32_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei32_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei32_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoorei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoorei64_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoorei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoorei64_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoorei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoorei64_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoorei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoorei64_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei8_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei8_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei8_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei8_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei8_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei16_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei16_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei16_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei16_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei16_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei32_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei32_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei32_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei32_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoorei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoorei32_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoorei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoorei64_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoorei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoorei64_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoorei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoorei64_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoorei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoorei64_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei8_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei8_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei8_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei8_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei16_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei16_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei16_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei16_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei32_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei32_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei32_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei32_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoorei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoorei64_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoorei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoorei64_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoorei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoorei64_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoorei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoorei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoorei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoorei64_v_u64m8_m(mask, base, bindex, value, vl);
				}

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c

This file was added.

This file has a very large number of changes (3,372 lines). Show File Contents

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c

This file was added.

				// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
				// REQUIRES: riscv-registered-target
				// RUN: %clang_cc1 -triple riscv32 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV32 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -disable-O0-optnone -emit-llvm %s -o - \| opt -S -mem2reg \| FileCheck --check-prefix=CHECK-RV64 %s
				// RUN: %clang_cc1 -triple riscv64 -target-feature +m -target-feature +experimental-v -target-feature +experimental-zvamo -Werror -Wall -o - %s -S >/dev/null 2>&1
				// RUN: FileCheck --check-prefix=ASM --allow-empty %s

				// ASM-NOT: warning
				#include <riscv_vector.h>

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei8_v_i32mf2 (int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei8_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei8_v_i32m1 (int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei8_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei8_v_i32m2 (int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei8_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei8_v_i32m4 (int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei8_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei8_v_i32m8 (int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei8_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei16_v_i32mf2 (int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei16_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei16_v_i32m1 (int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei16_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei16_v_i32m2 (int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei16_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei16_v_i32m4 (int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei16_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei16_v_i32m8 (int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei16_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei32_v_i32mf2 (int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei32_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei32_v_i32m1 (int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei32_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei32_v_i32m2 (int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei32_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei32_v_i32m4 (int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei32_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei32_v_i32m8 (int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei32_v_i32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei64_v_i32mf2 (int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei64_v_i32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei64_v_i32m1 (int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei64_v_i32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei64_v_i32m2 (int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei64_v_i32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei64_v_i32m4 (int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei64_v_i32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei8_v_i64m1 (int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei8_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei8_v_i64m2 (int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei8_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei8_v_i64m4 (int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei8_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei8_v_i64m8 (int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei8_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei16_v_i64m1 (int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei16_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei16_v_i64m2 (int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei16_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei16_v_i64m4 (int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei16_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei16_v_i64m8 (int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei16_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei32_v_i64m1 (int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei32_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei32_v_i64m2 (int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei32_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei32_v_i64m4 (int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei32_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei32_v_i64m8 (int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei32_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei64_v_i64m1 (int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei64_v_i64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei64_v_i64m2 (int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei64_v_i64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei64_v_i64m4 (int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei64_v_i64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei64_v_i64m8 (int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei64_v_i64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei8_v_u32mf2 (uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei8_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei8_v_u32m1 (uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei8_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei8_v_u32m2 (uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei8_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei8_v_u32m4 (uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei8_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei8_v_u32m8 (uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei8_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei16_v_u32mf2 (uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei16_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei16_v_u32m1 (uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei16_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei16_v_u32m2 (uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei16_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei16_v_u32m4 (uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei16_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei16_v_u32m8 (uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei16_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei32_v_u32mf2 (uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei32_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei32_v_u32m1 (uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei32_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei32_v_u32m2 (uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei32_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei32_v_u32m4 (uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei32_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei32_v_u32m8 (uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei32_v_u32m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32mf2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32mf2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei64_v_u32mf2 (uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei64_v_u32mf2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei64_v_u32m1 (uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei64_v_u32m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei64_v_u32m2 (uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei64_v_u32m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei64_v_u32m4 (uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei64_v_u32m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei8_v_u64m1 (uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei8_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei8_v_u64m2 (uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei8_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei8_v_u64m4 (uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei8_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei8_v_u64m8 (uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei8_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei16_v_u64m1 (uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei16_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei16_v_u64m2 (uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei16_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei16_v_u64m4 (uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei16_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei16_v_u64m8 (uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei16_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei32_v_u64m1 (uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei32_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei32_v_u64m2 (uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei32_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei32_v_u64m4 (uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei32_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei32_v_u64m8 (uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei32_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m1(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m1(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei64_v_u64m1 (uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei64_v_u64m1(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m2(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m2(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei64_v_u64m2 (uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei64_v_u64m2(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m4(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m4(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei64_v_u64m4 (uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei64_v_u64m4(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m8(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i32 [[VL:%.*]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m8(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], i64 [[VL:%.*]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei64_v_u64m8 (uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei64_v_u64m8(base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei8_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei8_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei8_v_i32m1_m (vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei8_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei8_v_i32m2_m (vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei8_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei8_v_i32m4_m (vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei8_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei8_v_i32m8_m (vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei8_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei16_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei16_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei16_v_i32m1_m (vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei16_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei16_v_i32m2_m (vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei16_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei16_v_i32m4_m (vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei16_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei16_v_i32m8_m (vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei16_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei32_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei32_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei32_v_i32m1_m (vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei32_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei32_v_i32m2_m (vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei32_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei32_v_i32m4_m (vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei32_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vint32m8_t test_vamoxorei32_v_i32m8_m (vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) {
				return vamoxorei32_v_i32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vint32mf2_t test_vamoxorei64_v_i32mf2_m (vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) {
				return vamoxorei64_v_i32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vint32m1_t test_vamoxorei64_v_i32m1_m (vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) {
				return vamoxorei64_v_i32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vint32m2_t test_vamoxorei64_v_i32m2_m (vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) {
				return vamoxorei64_v_i32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vint32m4_t test_vamoxorei64_v_i32m4_m (vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) {
				return vamoxorei64_v_i32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei8_v_i64m1_m (vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei8_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei8_v_i64m2_m (vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei8_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei8_v_i64m4_m (vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei8_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei8_v_i64m8_m (vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei8_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei16_v_i64m1_m (vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei16_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei16_v_i64m2_m (vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei16_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei16_v_i64m4_m (vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei16_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei16_v_i64m8_m (vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei16_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei32_v_i64m1_m (vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei32_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei32_v_i64m2_m (vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei32_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei32_v_i64m4_m (vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei32_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei32_v_i64m8_m (vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei32_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vint64m1_t test_vamoxorei64_v_i64m1_m (vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) {
				return vamoxorei64_v_i64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vint64m2_t test_vamoxorei64_v_i64m2_m (vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) {
				return vamoxorei64_v_i64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vint64m4_t test_vamoxorei64_v_i64m4_m (vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) {
				return vamoxorei64_v_i64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_i64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_i64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vint64m8_t test_vamoxorei64_v_i64m8_m (vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) {
				return vamoxorei64_v_i64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i8.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei8_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei8_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i8.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei8_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei8_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i8.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei8_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei8_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i8.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei8_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei8_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i8.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i8> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei8_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei8_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i16.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei16_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei16_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i16.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei16_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei16_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i16.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei16_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei16_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i16.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei16_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei16_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i16.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i16> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei16_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei16_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i32.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei32_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei32_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei32_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei32_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i32.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei32_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei32_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i32.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei32_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei32_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u32m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i32(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u32m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 16 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 16 x i32> @llvm.riscv.vamoxor.mask.nxv16i32.nxv16i32.i64(<vscale x 16 x i32> [[TMP0]], <vscale x 16 x i32> [[BINDEX:%.]], <vscale x 16 x i32> [[VALUE:%.]], <vscale x 16 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP1]]
				//
				vuint32m8_t test_vamoxorei32_v_u32m8_m (vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) {
				return vamoxorei32_v_u32m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32mf2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i32(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32mf2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 1 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i32> @llvm.riscv.vamoxor.mask.nxv1i32.nxv1i64.i64(<vscale x 1 x i32> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i32> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP1]]
				//
				vuint32mf2_t test_vamoxorei64_v_u32mf2_m (vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) {
				return vamoxorei64_v_u32mf2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i32(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 2 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i32> @llvm.riscv.vamoxor.mask.nxv2i32.nxv2i64.i64(<vscale x 2 x i32> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i32> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP1]]
				//
				vuint32m1_t test_vamoxorei64_v_u32m1_m (vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) {
				return vamoxorei64_v_u32m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i32(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 4 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i32> @llvm.riscv.vamoxor.mask.nxv4i32.nxv4i64.i64(<vscale x 4 x i32> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i32> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP1]]
				//
				vuint32m2_t test_vamoxorei64_v_u32m2_m (vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) {
				return vamoxorei64_v_u32m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u32m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i32(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u32m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i32 [[BASE:%.]] to <vscale x 8 x i32>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i32> @llvm.riscv.vamoxor.mask.nxv8i32.nxv8i64.i64(<vscale x 8 x i32> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i32> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP1]]
				//
				vuint32m4_t test_vamoxorei64_v_u32m4_m (vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) {
				return vamoxorei64_v_u32m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i8.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i8> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei8_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei8_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i8.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i8> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei8_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei8_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i8.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i8> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei8_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei8_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei8_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei8_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i8.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i8> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei8_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei8_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i16.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i16> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei16_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei16_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i16.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i16> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei16_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei16_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i16.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i16> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei16_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei16_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei16_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei16_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i16.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i16> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei16_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei16_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i32.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i32> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei32_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei32_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i32.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i32> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei32_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei32_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i32.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i32> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei32_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei32_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei32_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei32_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i32.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i32> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei32_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei32_v_u64m8_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m1_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i32(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m1_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 1 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 1 x i64> @llvm.riscv.vamoxor.mask.nxv1i64.nxv1i64.i64(<vscale x 1 x i64> [[TMP0]], <vscale x 1 x i64> [[BINDEX:%.]], <vscale x 1 x i64> [[VALUE:%.]], <vscale x 1 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP1]]
				//
				vuint64m1_t test_vamoxorei64_v_u64m1_m (vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) {
				return vamoxorei64_v_u64m1_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m2_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i32(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m2_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 2 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 2 x i64> @llvm.riscv.vamoxor.mask.nxv2i64.nxv2i64.i64(<vscale x 2 x i64> [[TMP0]], <vscale x 2 x i64> [[BINDEX:%.]], <vscale x 2 x i64> [[VALUE:%.]], <vscale x 2 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP1]]
				//
				vuint64m2_t test_vamoxorei64_v_u64m2_m (vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) {
				return vamoxorei64_v_u64m2_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m4_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i32(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m4_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 4 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 4 x i64> @llvm.riscv.vamoxor.mask.nxv4i64.nxv4i64.i64(<vscale x 4 x i64> [[TMP0]], <vscale x 4 x i64> [[BINDEX:%.]], <vscale x 4 x i64> [[VALUE:%.]], <vscale x 4 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP1]]
				//
				vuint64m4_t test_vamoxorei64_v_u64m4_m (vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) {
				return vamoxorei64_v_u64m4_m(mask, base, bindex, value, vl);
				}

				// CHECK-RV32-LABEL: @test_vamoxorei64_v_u64m8_m(
				// CHECK-RV32-NEXT: entry:
				// CHECK-RV32-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV32-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i32(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i32 [[VL:%.]])
				// CHECK-RV32-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				// CHECK-RV64-LABEL: @test_vamoxorei64_v_u64m8_m(
				// CHECK-RV64-NEXT: entry:
				// CHECK-RV64-NEXT: [[TMP0:%.]] = bitcast i64 [[BASE:%.]] to <vscale x 8 x i64>
				// CHECK-RV64-NEXT: [[TMP1:%.]] = call <vscale x 8 x i64> @llvm.riscv.vamoxor.mask.nxv8i64.nxv8i64.i64(<vscale x 8 x i64> [[TMP0]], <vscale x 8 x i64> [[BINDEX:%.]], <vscale x 8 x i64> [[VALUE:%.]], <vscale x 8 x i1> [[MASK:%.]], i64 [[VL:%.]])
				// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP1]]
				//
				vuint64m8_t test_vamoxorei64_v_u64m8_m (vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) {
				return vamoxorei64_v_u64m8_m(mask, base, bindex, value, vl);
				}

clang/utils/TableGen/RISCVVEmitter.cpp

Show First 20 Lines • Show All 133 Lines • ▼ Show 20 Lines

using RVVTypePtr = RVVType *;		using RVVTypePtr = RVVType *;
using RVVTypes = std::vector<RVVTypePtr>;		using RVVTypes = std::vector<RVVTypePtr>;

enum RISCVExtension : uint8_t {		enum RISCVExtension : uint8_t {
Basic = 0,		Basic = 0,
F = 1 << 1,		F = 1 << 1,
D = 1 << 2,		D = 1 << 2,
Zfh = 1 << 3		Zfh = 1 << 3,
		Zvamo = 1 << 4,
};		};

// TODO refactor RVVIntrinsic class design after support all intrinsic		// TODO refactor RVVIntrinsic class design after support all intrinsic
// combination. This represents an instantiation of an intrinsic with a		// combination. This represents an instantiation of an intrinsic with a
// particular type and prototype		// particular type and prototype
class RVVIntrinsic {		class RVVIntrinsic {

private:		private:
Show All 18 Lines	private:
uint8_t RISCVExtensions = 0;		uint8_t RISCVExtensions = 0;

public:		public:
RVVIntrinsic(StringRef Name, StringRef Suffix, StringRef MangledName,		RVVIntrinsic(StringRef Name, StringRef Suffix, StringRef MangledName,
StringRef IRName, bool HasSideEffects, bool IsMask,		StringRef IRName, bool HasSideEffects, bool IsMask,
bool HasMaskedOffOperand, bool HasVL, bool HasNoMaskedOverloaded,		bool HasMaskedOffOperand, bool HasVL, bool HasNoMaskedOverloaded,
bool HasAutoDef, StringRef ManualCodegen, const RVVTypes &Types,		bool HasAutoDef, StringRef ManualCodegen, const RVVTypes &Types,
const std::vector<int64_t> &IntrinsicTypes,		const std::vector<int64_t> &IntrinsicTypes,
const std::vector<int64_t> &PermuteOperands);		const std::vector<int64_t> &PermuteOperands,
		StringRef RequiredExtension);
~RVVIntrinsic() = default;		~RVVIntrinsic() = default;

StringRef getName() const { return Name; }		StringRef getName() const { return Name; }
StringRef getMangledName() const { return MangledName; }		StringRef getMangledName() const { return MangledName; }
bool hasSideEffects() const { return HasSideEffects; }		bool hasSideEffects() const { return HasSideEffects; }
bool hasMaskedOffOperand() const { return HasMaskedOffOperand; }		bool hasMaskedOffOperand() const { return HasMaskedOffOperand; }
bool hasVL() const { return HasVL; }		bool hasVL() const { return HasVL; }
bool hasNoMaskedOverloaded() const { return HasNoMaskedOverloaded; }		bool hasNoMaskedOverloaded() const { return HasNoMaskedOverloaded; }
▲ Show 20 Lines • Show All 525 Lines • ▼ Show 20 Lines
//===----------------------------------------------------------------------===//		//===----------------------------------------------------------------------===//
RVVIntrinsic::RVVIntrinsic(StringRef NewName, StringRef Suffix,		RVVIntrinsic::RVVIntrinsic(StringRef NewName, StringRef Suffix,
StringRef NewMangledName, StringRef IRName,		StringRef NewMangledName, StringRef IRName,
bool HasSideEffects, bool IsMask,		bool HasSideEffects, bool IsMask,
bool HasMaskedOffOperand, bool HasVL,		bool HasMaskedOffOperand, bool HasVL,
bool HasNoMaskedOverloaded, bool HasAutoDef,		bool HasNoMaskedOverloaded, bool HasAutoDef,
StringRef ManualCodegen, const RVVTypes &OutInTypes,		StringRef ManualCodegen, const RVVTypes &OutInTypes,
const std::vector<int64_t> &NewIntrinsicTypes,		const std::vector<int64_t> &NewIntrinsicTypes,
const std::vector<int64_t> &PermuteOperands)		const std::vector<int64_t> &PermuteOperands,
		StringRef RequiredExtension)
: IRName(IRName), HasSideEffects(HasSideEffects), IsMask(IsMask),		: IRName(IRName), HasSideEffects(HasSideEffects), IsMask(IsMask),
HasMaskedOffOperand(HasMaskedOffOperand), HasVL(HasVL),		HasMaskedOffOperand(HasMaskedOffOperand), HasVL(HasVL),
HasNoMaskedOverloaded(HasNoMaskedOverloaded), HasAutoDef(HasAutoDef),		HasNoMaskedOverloaded(HasNoMaskedOverloaded), HasAutoDef(HasAutoDef),
ManualCodegen(ManualCodegen.str()) {		ManualCodegen(ManualCodegen.str()) {

// Init Name and MangledName		// Init Name and MangledName
Name = NewName.str();		Name = NewName.str();
if (NewMangledName.empty())		if (NewMangledName.empty())
Show All 9 Lines	RVVIntrinsic::RVVIntrinsic(StringRef NewName, StringRef Suffix,
for (const auto &T : OutInTypes) {		for (const auto &T : OutInTypes) {
if (T->isFloatVector(16))		if (T->isFloatVector(16))
RISCVExtensions \|= RISCVExtension::Zfh;		RISCVExtensions \|= RISCVExtension::Zfh;
else if (T->isFloatVector(32))		else if (T->isFloatVector(32))
RISCVExtensions \|= RISCVExtension::F;		RISCVExtensions \|= RISCVExtension::F;
else if (T->isFloatVector(64))		else if (T->isFloatVector(64))
RISCVExtensions \|= RISCVExtension::D;		RISCVExtensions \|= RISCVExtension::D;
}		}
		if (RequiredExtension == "Zvamo")
		RISCVExtensions \|= RISCVExtension::Zvamo;

// Init OutputType and InputTypes		// Init OutputType and InputTypes
OutputType = OutInTypes[0];		OutputType = OutInTypes[0];
InputTypes.assign(OutInTypes.begin() + 1, OutInTypes.end());		InputTypes.assign(OutInTypes.begin() + 1, OutInTypes.end());
CTypeOrder.resize(InputTypes.size());		CTypeOrder.resize(InputTypes.size());
std::iota(CTypeOrder.begin(), CTypeOrder.end(), 0);		std::iota(CTypeOrder.begin(), CTypeOrder.end(), 0);
// Update default order if we need permutate.		// Update default order if we need permutate.
if (!PermuteOperands.empty()) {		if (!PermuteOperands.empty()) {
▲ Show 20 Lines • Show All 315 Lines • ▼ Show 20 Lines	for (auto *R : RV) {
bool HasSideEffects = R->getValueAsBit("HasSideEffects");		bool HasSideEffects = R->getValueAsBit("HasSideEffects");
std::vector<int64_t> Log2LMULList = R->getValueAsListOfInts("Log2LMUL");		std::vector<int64_t> Log2LMULList = R->getValueAsListOfInts("Log2LMUL");
StringRef ManualCodegen = R->getValueAsString("ManualCodegen");		StringRef ManualCodegen = R->getValueAsString("ManualCodegen");
StringRef ManualCodegenMask = R->getValueAsString("ManualCodegenMask");		StringRef ManualCodegenMask = R->getValueAsString("ManualCodegenMask");
std::vector<int64_t> IntrinsicTypes =		std::vector<int64_t> IntrinsicTypes =
R->getValueAsListOfInts("IntrinsicTypes");		R->getValueAsListOfInts("IntrinsicTypes");
std::vector<int64_t> PermuteOperands =		std::vector<int64_t> PermuteOperands =
R->getValueAsListOfInts("PermuteOperands");		R->getValueAsListOfInts("PermuteOperands");
		StringRef RequiredExtension = R->getValueAsString("RequiredExtension");
StringRef IRName = R->getValueAsString("IRName");		StringRef IRName = R->getValueAsString("IRName");
StringRef IRNameMask = R->getValueAsString("IRNameMask");		StringRef IRNameMask = R->getValueAsString("IRNameMask");

StringRef HeaderCodeStr = R->getValueAsString("HeaderCode");		StringRef HeaderCodeStr = R->getValueAsString("HeaderCode");
bool HasAutoDef = HeaderCodeStr.empty();		bool HasAutoDef = HeaderCodeStr.empty();
if (!HeaderCodeStr.empty()) {		if (!HeaderCodeStr.empty()) {
HeaderCode += HeaderCodeStr.str();		HeaderCode += HeaderCodeStr.str();
}		}
Show All 28 Lines	for (char I : TypeRange) {
continue;		continue;

auto SuffixStr = getSuffixStr(I, Log2LMUL, SuffixProto);		auto SuffixStr = getSuffixStr(I, Log2LMUL, SuffixProto);
// Create a non-mask intrinsic		// Create a non-mask intrinsic
Out.push_back(std::make_unique<RVVIntrinsic>(		Out.push_back(std::make_unique<RVVIntrinsic>(
Name, SuffixStr, MangledName, IRName, HasSideEffects,		Name, SuffixStr, MangledName, IRName, HasSideEffects,
/IsMask=/false, /HasMaskedOffOperand=/false, HasVL,		/IsMask=/false, /HasMaskedOffOperand=/false, HasVL,
HasNoMaskedOverloaded, HasAutoDef, ManualCodegen, Types.getValue(),		HasNoMaskedOverloaded, HasAutoDef, ManualCodegen, Types.getValue(),
IntrinsicTypes, PermuteOperands));		IntrinsicTypes, PermuteOperands, RequiredExtension));
if (HasMask) {		if (HasMask) {
// Create a mask intrinsic		// Create a mask intrinsic
Optional<RVVTypes> MaskTypes =		Optional<RVVTypes> MaskTypes =
computeTypes(I, Log2LMUL, ProtoMaskSeq);		computeTypes(I, Log2LMUL, ProtoMaskSeq);
Out.push_back(std::make_unique<RVVIntrinsic>(		Out.push_back(std::make_unique<RVVIntrinsic>(
Name, SuffixStr, MangledName, IRNameMask, HasSideEffects,		Name, SuffixStr, MangledName, IRNameMask, HasSideEffects,
/IsMask=/true, HasMaskedOffOperand, HasVL,		/IsMask=/true, HasMaskedOffOperand, HasVL,
HasNoMaskedOverloaded, HasAutoDef, ManualCodegenMask,		HasNoMaskedOverloaded, HasAutoDef, ManualCodegenMask,
MaskTypes.getValue(), IntrinsicTypes, PermuteOperands));		MaskTypes.getValue(), IntrinsicTypes, PermuteOperands,
		RequiredExtension));
}		}
} // end for Log2LMULList		} // end for Log2LMULList
} // end for TypeRange		} // end for TypeRange
}		}
}		}

Optional<RVVTypes>		Optional<RVVTypes>
RVVEmitter::computeTypes(BasicType BT, int Log2LMUL,		RVVEmitter::computeTypes(BasicType BT, int Log2LMUL,
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines	bool RVVEmitter::emitExtDefStr(uint8_t Extents, raw_ostream &OS) {
OS << "#if ";		OS << "#if ";
ListSeparator LS(" && ");		ListSeparator LS(" && ");
if (Extents & RISCVExtension::F)		if (Extents & RISCVExtension::F)
OS << LS << "defined(__riscv_f)";		OS << LS << "defined(__riscv_f)";
if (Extents & RISCVExtension::D)		if (Extents & RISCVExtension::D)
OS << LS << "defined(__riscv_d)";		OS << LS << "defined(__riscv_d)";
if (Extents & RISCVExtension::Zfh)		if (Extents & RISCVExtension::Zfh)
OS << LS << "defined(__riscv_zfh)";		OS << LS << "defined(__riscv_zfh)";
		if (Extents & RISCVExtension::Zvamo)
		OS << LS << "defined(__riscv_zvamo)";
OS << "\n";		OS << "\n";
return true;		return true;
}		}

namespace clang {		namespace clang {
void EmitRVVHeader(RecordKeeper &Records, raw_ostream &OS) {		void EmitRVVHeader(RecordKeeper &Records, raw_ostream &OS) {
RVVEmitter(Records).createHeader(OS);		RVVEmitter(Records).createHeader(OS);
}		}
Show All 10 Lines

This is an archive of the discontinued LLVM Phabricator instance.

[RISCV][Clang] Add RVV AMO builtinsClosedPublic

Details

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Revision Contents

Diff 337346

clang/include/clang/Basic/riscv_vector.td

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoadd.c

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoand.c

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomax.c

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamomin.c

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoor.c

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoswap.c

clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vamoxor.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoadd.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoand.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamomax.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamomin.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoor.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoswap.c

clang/test/CodeGen/RISCV/rvv-intrinsics/vamoxor.c

clang/utils/TableGen/RISCVVEmitter.cpp

[RISCV][Clang] Add RVV AMO builtins
ClosedPublic