If we don't consider inverting the zero_extend placement, it seems that we can also combine on MGATHER. I'll update patch later. Thanks.

In D158163#4643531, @reames wrote:

I want to suggest a different approach here. I think this should be a combine on MGATHER (and variants), not a combine on the RISCV specific nodes. It might make sense to have this be a target specific combine, but I don't think it needs to be a combine on custom nodes.

Looking at one of your tests, I see this state immediately before lowering:

    t15: v8i64 = zero_extend t6
    t17: v8i64 = BUILD_VECTOR Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>, Constant:i64<1>
  t18: v8i64 = shl t15, t17
t27: v8i16,ch = masked_gather<(load unknown-size, align 2), signed unscaled offset> t0, t12, t9, t2, t18, TargetConstant:i64<1>

The MGATHER node supports scaled offsets, and allows the index type to differ from the native type (i.e. there's implicit extend on the operand). The later seems like it's the right tool here. See refineIndexType in DAGCombine for an example of some code which is related. Basically, we're just inverting the zero_extend placement, and then running that transform. We might even be able to do this in fully generic code.

1. Rebase.
2. Update RISCVISAInfoTest.cpp

Another solution, enabling the isExtractVecEltCheap when XlenVT == vector_element_type, It's working for pr65068.ll.

In D159190#4628397, @luke wrote:

In D159190#4628357, @luke wrote:

In D159190#4628284, @liaolucy wrote:

In D159190#4628179, @luke wrote:

Thanks for the patch. Did you take a look at scalarizeBinOpOfSplats in DAGCombiner? I think that might be more generic, it's the combine that kicks in for the scalable vector test case in that issue. I was wondering if it would be possible to get it to work on fixed vectors too.

I have a question, this ir has been optimized in the opt phase. https://godbolt.org/z/MPvvTG5dT Maybe we don't need another combine in codegen?

Good point, I didn't realise opt already took care of this. I guess it depends if this pattern is introduced during codegen at all

I originally noticed this when looking at the code generated whilst expanding ISD::ROT{L,R}, e.g. https://godbolt.org/z/Wh99EPbja
So it can be introduced after the middle-end (but it might not be that common)

Okay, making sure it's back-end introduced looks like it can be optimized. thanks

In D159190#4628179, @luke wrote:

Thanks for the patch. Did you take a look at scalarizeBinOpOfSplats in DAGCombiner? I think that might be more generic, it's the combine that kicks in for the scalable vector test case in that issue. I was wondering if it would be possible to get it to work on fixed vectors too.

I have a question, this ir has been optimized in the opt phase. https://godbolt.org/z/MPvvTG5dT Maybe we don't need another combine in codegen?

Address comments from Jim, thanks.

1. core-v -> CORE-V to be consistent with other places
2. rebase

address comments, thanks.

Rebase. Thanks for review.

Address comments, thanks.
Sorry for the late update.

1.skip creating the non-VP node this node if it's a VPOpcode
2.use DAG.getVPZExtOrTrunc
3.rebase
Thanks

I don't find a better way to implement it, I'll create new patch if I have a better idea, thanks for the review.

This patch relies on the D153934.
Otherwise, I tried another method:

diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index ef9e96b6cca4..9a46455017c6 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13020,7 +13020,7 @@ bool RISCVTargetLowering::targetShrinkDemandedConstant(

Add testcase for riscv.
The testcase is copied from instcombine.
Without this patch:
https://godbolt.org/z/M1nxxf163

address comments, thanks

updated

1. Add Verifier.cpp to make sure only legal bits are set.
2. Add more testcase
3. address more comments

thanks

address comments, use APInt methods, thanks.

1. change name to: vp.is.fpclass
2. update docs/LangRef.rst, add `llvm.vp.is.fpclass.*`' Intrinsics

Rebase and remove two temporary variables, clearer now.

After I changed it correctly and found that this patch is not needed anymore, thanks for review.

revert the last commit.

[RISCV]Fold xor(setcc x, y, cond), 1 --> setcc (x, y, inverted(cond))

revert the last commit.sorry

[RISCV]Fold xor(setcc x, y, cond), 1 --> setcc (x, y, inverted(cond))

Update, add hasOneUse()

Address comments. Thanks.

Using xor to replace setcc.
A DAGCombine patch may be needed here. I can send a new patch.

Deleted two ZERO_EXTEND.
The second ZERO_EXTEND should not be needed either. Setcc and zext are all XLenVT.

If the select true/false are 1.0 and 0.0 we can replace the select with a sint_to_fp.
(select cc, 1.0, 0.0) -> (sint_to_fp (zext cc))
https://alive2.llvm.org/ce/z/aoEcd9
thanks

Reuse RISCVISD::FPCLASS_VL
change the value name to VMSNE

1. support scalable vector
2. add more testcases

Thanks Jessica and Craig.

Update try to address comments.
Use AND and SETNE.
Update test case.

clang-format

In D149743#4323739, @craig.topper wrote:

In D149743#4323730, @craig.topper wrote:

In D149743#4323729, @liaolucy wrote:

Maybe we shouldn't expand the Pseudo in RISCVExpandPseudoInsts.cpp.
It seems that one more MI would get the following error.

llc: /home/liaochunyu/llvm-project/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp:83: virtual bool (anonymous namespace)::RISCVExpandPseudo::runOnMachineFunction(llvm::MachineFunction &): Assertion `OldSize >= NewSize' failed.

That error means you're missing a let Size = 8 on the pseudo in tablegen.

Maybe I don’t know you meant by one more MI

In D149743#4323730, @craig.topper wrote:

In D149743#4323729, @liaolucy wrote:

Maybe we shouldn't expand the Pseudo in RISCVExpandPseudoInsts.cpp.
It seems that one more MI would get the following error.

llc: /home/liaochunyu/llvm-project/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp:83: virtual bool (anonymous namespace)::RISCVExpandPseudo::runOnMachineFunction(llvm::MachineFunction &): Assertion `OldSize >= NewSize' failed.

That error means you're missing a let Size = 8 on the pseudo in tablegen.

Here, it looks like there is

let isCall = 0, mayLoad = 1, mayStore = 0, Size = 8, isCodeGenOnly = 1 in
def PseudoRV32ZdinxLD : Pseudo<(outs GPRPF64:$dst), (ins GPR:$rs1, simm12:$imm12), []>;
defm : LdPat<load, PseudoRV32ZdinxLD, f64>;

Maybe we shouldn't expand the Pseudo in RISCVExpandPseudoInsts.cpp.
It seems that one more MI would get the following error.

llc: /home/liaochunyu/llvm-project/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp:83: virtual bool (anonymous namespace)::RISCVExpandPseudo::runOnMachineFunction(llvm::MachineFunction &): Assertion `OldSize >= NewSize' failed.

Maybe we should learn from jrtc27's reference https://github.com/CTSRD-CHERI/llvm-project/pull/635/files

isnotfinite_fpclasee -> isnotfinite_fpclass
Re-update, I don't know why I didn't modify it correctly just now

update