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[RISCV][Clang] Add RVV AMO builtins
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Authored by arcbbb on Apr 13 2021, 11:42 PM.

Details

Summary

Add vamo[swap/add/xor/and/or/min/max/minu/maxu] builtins.

Diff Detail

Event Timeline

arcbbb created this revision.Apr 13 2021, 11:42 PM
arcbbb requested review of this revision.Apr 13 2021, 11:42 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 13 2021, 11:42 PM
khchen added inline comments.Apr 16 2021, 7:31 AM
clang/include/clang/Basic/riscv_vector.td
764

foreach eew_list = EEWList in {

781

ResultType->getPointerTo()

785

if !and(!not(IsFloat<type>.val), has_unsigned) then

arcbbb updated this revision to Diff 338416.Apr 18 2021, 7:35 PM
arcbbb marked 3 inline comments as done.

Addressed @khchen's comment.

arcbbb updated this revision to Diff 338419.Apr 18 2021, 7:49 PM

re-formatted.

khchen accepted this revision.Apr 18 2021, 9:10 PM

LGTM. Please remove the ASM check in upstream patches.

This revision is now accepted and ready to land.Apr 18 2021, 9:10 PM
This revision was automatically updated to reflect the committed changes.