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[MS] Add more 128bit cmpxchg intrinsics for AArch64
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Authored by rnk on Nov 24 2020, 4:06 PM.

Details

Summary

The MSVC STL for requires this on ARM64.
Requested in https://llvm.org/pr47099

Depends on D92061

Diff Detail

Event Timeline

rnk created this revision.Nov 24 2020, 4:06 PM
Herald added a project: Restricted Project. · View Herald TranscriptNov 24 2020, 4:06 PM
rnk requested review of this revision.Nov 24 2020, 4:06 PM
thakis accepted this revision.Nov 25 2020, 7:31 AM
thakis added inline comments.
clang/lib/CodeGen/CGBuiltin.cpp
340

Why?

364

why?

14062

Oh, I guess it just moved around. Still not obvious to me :)

clang/test/CodeGen/ms-intrinsics.c
441–442

should this test some of the new aarc64-only intrins too if __aarch64__?

This revision is now accepted and ready to land.Nov 25 2020, 7:31 AM
rnk marked an inline comment as done.Nov 25 2020, 12:06 PM
rnk added inline comments.
clang/lib/CodeGen/CGBuiltin.cpp
340

Honestly, I don't know. It's copied from above.

364

Truly, I don't think we should mark these volatile, but MSVC marks the destination pointer as volatile. I think it would be fine if we treated _Interlocked* atomic instructions as regular atomic instructions. I guess we just mark them volatile for safety. There are a few atomic instr optimizations, and volatile blocks them.

clang/test/CodeGen/ms-intrinsics.c
441–442

Yeah, let's add them, but just check for the key cmpxchg instruction.

rnk updated this revision to Diff 307678.Nov 25 2020, 12:06 PM
rnk marked an inline comment as done.
  • add tests
This revision was landed with ongoing or failed builds.Nov 25 2020, 12:09 PM
This revision was automatically updated to reflect the committed changes.