[mlir][openacc] Add shutdown operation

[clementval]

Summary

This patch introduces the acc.shutdown operation that represents an OpenACC shutdown directive.
Clauses are derived from the spec 2.14.2

[rriddle]

mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

649

You can return the error directly. Also, you can use emitOpError to prefix the message with the op name.

[clementval]

Address review comments

[kiranchandramohan]

mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

648

Would it be good to add an isComputeOperation function?

mlir/test/Dialect/OpenACC/invalid.mlir

71

Can you add a test where the check has to skip at least on level of parentOp before finding a compute operation?

[clementval]

Address review comment

[clementval]

mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

648

I added one since it will be shared with at least acc.init

[ftynse]

mlir/test/Dialect/OpenACC/invalid.mlir

1

Why do you need to allow unregistered dialects?

90

I'd rather use a dummy op with a generic syntax to avoid spurious test breakages if scf.if decides to change somehow.

[clementval]

Address review comments , rebase

[clementval]

mlir/test/Dialect/OpenACC/invalid.mlir

1

I was plaining on using a dummy op and I now switched the scf.if with a dummy so now it is needed.

[mehdi_amini]

mlir/test/Dialect/OpenACC/invalid.mlir

1

Can we use a test op and avoid unregistered-dialect?
This makes the verifier a bit lose, which is undesirable for test I believe.

[clementval]

mlir/test/Dialect/OpenACC/invalid.mlir

1

Sure. Are there test op that we can use directly?

[mehdi_amini]

mlir/test/Dialect/OpenACC/invalid.mlir

1

You can looking the op definitions for the test dialect, but it also accept any unregistered op directly.
Using an op name after the test is likely "safe" (no one will register it in the test dialect later):

"test.openacc_dummy_op"() : () -> ()

[clementval]

mlir/test/Dialect/OpenACC/invalid.mlir

1

Ok, I'll send a patch today which will also remove the -allow-unregistered-dialect in the mlir/test/Dialect/OpenACC/ops.mlir tests.

1

@mehdi_amini Done in D88587

mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td

def OpenACC_InitOp : OpenACC_Op<"init", [AttrSizedOperandSegments]> {
   let assemblyFormat = [{
     ( `device_type` `(` $deviceTypeOperands^ `:` type($deviceTypeOperands) `)` )?
     ( `device_num` `(` $deviceNumOperand^ `:` type($deviceNumOperand) `)` )?
     ( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
   }];
 }
 
 //===----------------------------------------------------------------------===//
+// 2.14.2. Shutdown
+//===----------------------------------------------------------------------===//
+
+def OpenACC_ShutdownOp : OpenACC_Op<"shutdown", [AttrSizedOperandSegments]> {
+  let summary = "shutdown operation";
+
+  let description = [{
+    The "acc.shutdown" operation represents the OpenACC shutdown executable
+    directive.
+
+    Example:
+
+    ```mlir
+    acc.shutdown
+    acc.shutdown device_num(%dev1 : i32)
+    ```
+  }];
+
+  let arguments = (ins Variadic<AnyInteger>:$deviceTypeOperands,
+                       Optional<IntOrIndex>:$deviceNumOperand,
+                       Optional<I1>:$ifCond);
+
+  let assemblyFormat = [{
+    ( `device_type` `(` $deviceTypeOperands^ `:` type($deviceTypeOperands) `)` )?
+    ( `device_num` `(` $deviceNumOperand^ `:` type($deviceNumOperand) `)` )?
+    ( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
+  }];
+}
+
+//===----------------------------------------------------------------------===//
 // 2.14.4. Update Directive
 //===----------------------------------------------------------------------===//
 
 def OpenACC_UpdateOp : OpenACC_Op<"update", [AttrSizedOperandSegments]> {
   let summary = "update operation";
 
   let description = [{
     The "acc.udpate" operation represents the OpenACC update executable

mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

static OptionalParseResult parserOptionalOperandAndTypeWithPrefix(
     OpAsmParser &parser, OperationState &result, StringRef prefixKeyword) {
   if (succeeded(parser.parseOptionalKeyword(prefixKeyword))) {
     parser.parseEqual();
     return parseOperandAndType(parser, result);
   }
   return llvm::None;
 }
 
+static bool isComputeOperation(Operation *op) {
+  return isa<acc::ParallelOp>(op) || isa<acc::LoopOp>(op);
+}
+
 //===----------------------------------------------------------------------===//
 // ParallelOp
 //===----------------------------------------------------------------------===//
 
 /// Parse acc.parallel operation
 /// operation := `acc.parallel` `async` `(` index `)`?
 ///                             `wait` `(` index-list `)`?
 ///                             `num_gangs` `(` value `)`?

 
 //===----------------------------------------------------------------------===//
 // DataOp
 //===----------------------------------------------------------------------===//
 
 static LogicalResult verify(acc::DataOp dataOp) {
   // 2.6.5. Data Construct restriction
   // At least one copy, copyin, copyout, create, no_create, present, deviceptr,
   // attach, or default clause must appear on a data construct.
   if (dataOp.getOperands().size() == 0 && !dataOp.defaultAttr())
     return dataOp.emitError("at least one operand or the default attribute "
                             "must appear on the data operation");
   return success();
 }
 
 //===----------------------------------------------------------------------===//
 // InitOp
 //===----------------------------------------------------------------------===//
 
 static LogicalResult verify(acc::InitOp initOp) {
   Operation *currOp = initOp;
   while ((currOp = currOp->getParentOp())) {
-    if (isa<acc::ParallelOp>(currOp) || isa<acc::LoopOp>(currOp))
+    if (isComputeOperation(currOp))
       return initOp.emitOpError("cannot be nested in a compute operation");
   }
   return success();
 }
 
 //===----------------------------------------------------------------------===//
+// ShutdownOp
+//===----------------------------------------------------------------------===//
+
+static LogicalResult verify(acc::ShutdownOp op) {
+  Operation *currOp = op;
+  while ((currOp = currOp->getParentOp())) {
+    if (isComputeOperation(currOp))
+      return op.emitOpError("cannot be nested in a compute operation");
+  }
+  return success();
+}
+
+//===----------------------------------------------------------------------===//
 // UpdateOp
 //===----------------------------------------------------------------------===//
 
 static LogicalResult verify(acc::UpdateOp updateOp) {
   // At least one of host or device should have a value.
   if (updateOp.hostOperands().size() == 0 &&
       updateOp.deviceOperands().size() == 0)
     return updateOp.emitError("at least one value must be present in"

mlir/test/Dialect/OpenACC/invalid.mlir

-// RUN: mlir-opt -split-input-file -verify-diagnostics %s
+// RUN: mlir-opt -allow-unregistered-dialect -split-input-file -verify-diagnostics %s
 
 // expected-error@+1 {{gang, worker or vector cannot appear with the seq attr}}
 acc.loop gang {
   "some.op"() : () -> ()
   acc.yield
 } attributes {seq}
 
 // -----

 // -----
 
 // expected-error@+1 {{only one of auto, independent, seq can be present at the same time}}
 acc.loop {
   acc.yield
 } attributes {auto_, seq}
 
 // -----
 
 // expected-error@+1 {{at least one operand or the default attribute must appear on the data operation}}
 acc.data {
   acc.yield
 }
 
 // -----
 
 // expected-error@+1 {{at least one value must be present in hostOperands or deviceOperands}}
 acc.update
 
 // -----
 
 %cst = constant 1 : index
 %value = alloc() : memref<10xf32>
 // expected-error@+1 {{wait_devnum cannot appear without waitOperands}}
 acc.update wait_devnum(%cst: index) host(%value: memref<10xf32>)
 
 // -----
 
 %cst = constant 1 : index
 %value = alloc() : memref<10xf32>
 // expected-error@+1 {{async attribute cannot appear with  asyncOperand}}
 acc.update async(%cst: index) host(%value: memref<10xf32>) attributes {async}
 
 // -----
 
 %cst = constant 1 : index

 
 // -----
 
 acc.loop {
 // expected-error@+1 {{'acc.init' op cannot be nested in a compute operation}}
   acc.init
   acc.yield
 }
+
+// -----
+
+acc.parallel {
+// expected-error@+1 {{'acc.shutdown' op cannot be nested in a compute operation}}
+  acc.shutdown
+  acc.yield
+}
+
+// -----
+
+acc.loop {
+// expected-error@+1 {{'acc.shutdown' op cannot be nested in a compute operation}}
+  acc.shutdown
+  acc.yield
+}
+
+// -----
+
+acc.loop {
+  "some.op"() ({
+    // expected-error@+1 {{'acc.shutdown' op cannot be nested in a compute operation}}
+    acc.shutdown
+  }) : () -> ()
+  acc.yield
+}

mlir/test/Dialect/OpenACC/ops.mlir

 // CHECK: [[IFCOND:%.*]] = constant true
 // CHECK: acc.init
 // CHECK: acc.init device_type([[I32VALUE]] : i32)
 // CHECK: acc.init device_type([[I32VALUE]], [[I32VALUE2]] : i32, i32)
 // CHECK: acc.init device_num([[I64VALUE]] : i64)
 // CHECK: acc.init device_num([[I32VALUE]] : i32)
 // CHECK: acc.init device_num([[IDXVALUE]] : index)
 // CHECK: acc.init if([[IFCOND]])
+
+// -----
+
+%i64Value = constant 1 : i64
+%i32Value = constant 1 : i32
+%i32Value2 = constant 2 : i32
+%idxValue = constant 1 : index
+%ifCond = constant true
+acc.shutdown
+acc.shutdown device_type(%i32Value : i32)
+acc.shutdown device_type(%i32Value, %i32Value2 : i32, i32)
+acc.shutdown device_num(%i64Value : i64)
+acc.shutdown device_num(%i32Value : i32)
+acc.shutdown device_num(%idxValue : index)
+acc.shutdown if(%ifCond)
+
+// CHECK: [[I64VALUE:%.*]] = constant 1 : i64
+// CHECK: [[I32VALUE:%.*]] = constant 1 : i32
+// CHECK: [[I32VALUE2:%.*]] = constant 2 : i32
+// CHECK: [[IDXVALUE:%.*]] = constant 1 : index
+// CHECK: [[IFCOND:%.*]] = constant true
+// CHECK: acc.shutdown
+// CHECK: acc.shutdown device_type([[I32VALUE]] : i32)
+// CHECK: acc.shutdown device_type([[I32VALUE]], [[I32VALUE2]] : i32, i32)
+// CHECK: acc.shutdown device_num([[I64VALUE]] : i64)
+// CHECK: acc.shutdown device_num([[I32VALUE]] : i32)
+// CHECK: acc.shutdown device_num([[IDXVALUE]] : index)
+// CHECK: acc.shutdown if([[IFCOND]])