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[SVE] Fall back on DAG ISel at -O0 when encountering scalable types

Authored by david-arm on Jun 10 2020, 5:37 AM.



At the moment we use Global ISel by default at -O0, however it is
currently not capable of dealing with scalable vectors for two

  1. The register banks know nothing about SVE registers.
  2. The LLT (Low Level Type) class knows nothing about scalable


For now, the easiest way to avoid users hitting issues when using
the SVE ACLE is to fall back on normal DAG ISel when encountering
instructions that operate on scalable vector types.

I've added a couple of RUN lines to existing SVE tests to ensure
we can compile at -O0. I've also added some new tests to


that demonstrate we correctly fallback to DAG ISel at -O0 when
lowering formal arguments or translating instructions that involve
scalable vector types.

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david-arm created this revision.Jun 10 2020, 5:37 AM
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Do we also need to check here for SVE arguments? I doubt the current call lowering is going to work with scalable vectors so we might need a check there too in lowerFormalArguments.

aemerson accepted this revision.Jun 12 2020, 10:09 AM

LGTM but please also add a test that we fall back to DAG for the argument lowering in the arm64-fallbacks.ll test.

This revision is now accepted and ready to land.Jun 12 2020, 10:09 AM
david-arm updated this revision to Diff 270975.Jun 16 2020, 1:01 AM
david-arm edited the summary of this revision. (Show Details)

Hi @aemerson are you happy with the new test I added before I commit?

Yes, but I meant add them to the existing test file in test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll

Otherwise it's fine.

david-arm updated this revision to Diff 271642.Jun 18 2020, 3:23 AM
david-arm edited the summary of this revision. (Show Details)

Hi @aemerson I've moved the test now - hope this is ok now! Thanks.

This revision was automatically updated to reflect the committed changes.