[lld-macho] Support X86_64_RELOC_UNSIGNED

[int3]

Summary

Note that it's only used for non-pc-relative contexts.

Depends on D79926.

[smeenai]

ld64 emits an entry in the rebase table so that the relocation can be adjusted for whatever the final load address ends up being. (I'm assuming it does this for all non-pcrel relocations.) Certainly not something we need to support in this diff, but we should add a TODO.

LGTM.

lld/test/MachO/x86-64-reloc-unsigned.s

7

Ah, it's annoying that endianness means we can't do the usual nice arithmetic checks here :/

[MaskRay]

LGTM.

lld/MachO/Target.h

32

unrelated?

[int3]

lld/MachO/Target.h

32

kind of? I thought a linebreak there made sense because the next two methods are specifically dealing with manipulating relocations

lld/MachO/Arch/X86_64.cpp

uint64_t X86_64::getImplicitAddend(const uint8_t *loc, uint8_t type) const {
   switch (type) {
   case X86_64_RELOC_BRANCH:
   case X86_64_RELOC_SIGNED:
   case X86_64_RELOC_SIGNED_1:
   case X86_64_RELOC_SIGNED_2:
   case X86_64_RELOC_SIGNED_4:
   case X86_64_RELOC_GOT_LOAD:
     return read32le(loc);
+  case X86_64_RELOC_UNSIGNED:
+    return read64le(loc);
   default:
     error("TODO: Unhandled relocation type " + std::to_string(type));
     return 0;
   }
 }
 
 void X86_64::relocateOne(uint8_t *loc, uint8_t type, uint64_t val) const {
   switch (type) {
   case X86_64_RELOC_BRANCH:
   case X86_64_RELOC_SIGNED:
   case X86_64_RELOC_SIGNED_1:
   case X86_64_RELOC_SIGNED_2:
   case X86_64_RELOC_SIGNED_4:
   case X86_64_RELOC_GOT_LOAD:
     // These types are only used for pc-relative relocations, so offset by 4
     // since the RIP has advanced by 4 at this point.
     write32le(loc, val - 4);
     break;
+  case X86_64_RELOC_UNSIGNED:
+    write64le(loc, val);
+    break;
   default:
     llvm_unreachable(
         "getImplicitAddend should have flagged all unhandled relocation types");
   }
 }
 
 // The following methods emit a number of assembly sequences with RIP-relative
 // addressing. Note that RIP-relative addressing on X86-64 has the RIP pointing

lld/MachO/InputFiles.cpp

ArrayRef<any_relocation_info> relInfos(
       reinterpret_cast<const any_relocation_info *>(buf + sec.reloff),
       sec.nreloc);
 
   for (const any_relocation_info &anyRel : relInfos) {
     if (anyRel.r_word0 & R_SCATTERED)
       fatal("TODO: Scattered relocations not supported");
 
     auto rel = reinterpret_cast<const relocation_info &>(anyRel);
-    if (!rel.r_pcrel)
-      fatal("TODO: Only pcrel relocations are supported");
 
     Reloc r;
     r.type = rel.r_type;
+    r.pcrel = rel.r_pcrel;
     uint32_t secRelOffset = rel.r_address;
     uint64_t rawAddend =
         target->getImplicitAddend(buf + sec.offset + secRelOffset, r.type);
 
     if (rel.r_extern) {
       r.target = symbols[rel.r_symbolnum];
       r.addend = rawAddend;
     } else {
+      if (!rel.r_pcrel)
+        fatal("TODO: Only pcrel section relocations are supported");
+
       if (rel.r_symbolnum == 0 || rel.r_symbolnum > subsections.size())
         fatal("invalid section index in relocation for offset " +
               std::to_string(r.offset) + " in section " + sec.sectname +
               " of " + getName());
 
       SubsectionMap &targetSubsecMap = subsections[rel.r_symbolnum - 1];
       const section_64 &targetSec = sectionHeaders[rel.r_symbolnum - 1];
       // The implicit addend for pcrel section relocations is the pcrel offset

lld/MachO/InputSection.h

 
 class InputFile;
 class InputSection;
 class OutputSection;
 class Symbol;
 
 struct Reloc {
   uint8_t type;
-  // Adding this offset to the address of the target symbol or subsection gives
-  // the destination that this relocation refers to.
-  uint32_t addend;
+  bool pcrel;
   // The offset from the start of the subsection that this relocation belongs
   // to.
   uint32_t offset;
+  // Adding this offset to the address of the target symbol or subsection gives
+  // the destination that this relocation refers to.
+  uint64_t addend;
   llvm::PointerUnion<Symbol *, InputSection *> target;
 };
 
 class InputSection {
 public:
   virtual ~InputSection() = default;
   virtual size_t getSize() const { return data.size(); }
   virtual uint64_t getFileSize() const { return getSize(); }

lld/MachO/InputSection.cpp

if (auto *s = r.target.dyn_cast<Symbol *>()) {
       } else {
         va = s->getVA();
       }
     } else if (auto *isec = r.target.dyn_cast<InputSection *>()) {
       va = isec->getVA();
     }
 
     uint64_t val = va + r.addend;
-    if (1) // TODO: handle non-pcrel relocations
+    if (r.pcrel)
       val -= getVA() + r.offset;
     target->relocateOne(buf + r.offset, r.type, val);
   }
 }

lld/MachO/Target.h

enum {
   PageSize = 4096,
   ImageBase = 4096,
   MaxAlignmentPowerOf2 = 32,
 };
 
 class TargetInfo {
 public:
   virtual ~TargetInfo() = default;
+
   virtual uint64_t getImplicitAddend(const uint8_t *loc,
                                      uint8_t type) const = 0;
   virtual void relocateOne(uint8_t *loc, uint8_t type, uint64_t val) const = 0;
 
   // Write code for lazy binding. See the comments on StubsSection for more
   // details.
   virtual void writeStub(uint8_t *buf, const DylibSymbol &) const = 0;
   virtual void writeStubHelperHeader(uint8_t *buf) const = 0;

lld/test/MachO/x86-64-reloc-unsigned.s

+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t.o
+# RUN: lld -flavor darwinnew -o %t %t.o
+# RUN: llvm-objdump --full-contents %t | FileCheck %s
+# CHECK: Contents of section foo:
+# CHECK:  2000 08200000 00000000
+# CHECK: Contents of section bar:
+# CHECK:  2008 11311111 01000000
+
+.globl _main, _foo, _bar
+
+.section __DATA,foo
+_foo:
+.quad _bar
+
+.section __DATA,bar
+_bar:
+## The unsigned relocation should support 64-bit addends
+.quad _foo + 0x111111111
+
+.text
+_main:
+  mov $0, %rax
+  ret