When building a VPlan, BasicBlock::instructionsWithoutDebug() is used to
iterate over the instructions in a block. This means that no recipes
should be created for debug info intrinsics already and we can turn the
early exit into an assertion.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Perhaps worth moving here the TODO comment about handling debug intrinsics / representing them in VPlan.