Implement IR intrinsics for stack tagging. Generated code is very
unoptimized for now.
Two special intrinsics, llvm.aarch64.irg.sp and llvm.aarch64.tagp are
used to implement a tagged stack frame pointer in a virtual register.
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| Differential D64172
Basic codegen for MTE stack tagging. ClosedPublic Authored by eugenis on Jul 3 2019, 4:42 PM.
Details Summary Implement IR intrinsics for stack tagging. Generated code is very Two special intrinsics, llvm.aarch64.irg.sp and llvm.aarch64.tagp are
Diff Detail
Event Timelineeugenis added a child revision: D64173: Basic MTE stack tagging instrumentation..Jul 3 2019, 4:44 PM Comment Actions I think this could do with some more tests covering different stack layouts. In particular, we should check that we do the correct thing for functions which use frame or base pointers, and when large stack frames cause the immediates in STG and ADDG instructions go out of range.
eugenis added inline comments.
eugenis marked an inline comment as not done. Comment Actionsaddress review comments & remove @earlyclobber from STGPreIndex / STGPostIndex Comment Actions What about the tests for large stack frames?
Comment Actions Made aarch64.irg.sp IntrInaccessibleMemOnly cause it has side effects. Comment Actions PTAL. I've added tests for various frame layouts. Stg offset overflow is covered by existing tests (settag.ll).
This revision is now accepted and ready to land.Jul 16 2019, 1:59 AM Closed by commit rL366360: Basic codegen for MTE stack tagging. (authored by eugenis). · Explain WhyJul 17 2019, 12:28 PM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 210390 llvm/trunk/include/llvm/CodeGen/SelectionDAGTargetInfo.h
llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
llvm/trunk/lib/Analysis/ValueTracking.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h
llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/trunk/lib/Target/AArch64/AArch64SelectionDAGInfo.h
llvm/trunk/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
llvm/trunk/test/Analysis/ValueTracking/aarch64.irg.ll
llvm/trunk/test/CodeGen/AArch64/irg.ll
llvm/trunk/test/CodeGen/AArch64/irg_sp_tagp.ll
llvm/trunk/test/CodeGen/AArch64/settag.ll
llvm/trunk/test/CodeGen/AArch64/stgp.ll
llvm/trunk/test/CodeGen/AArch64/tagp.ll
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