Page MenuHomePhabricator

[DAGCombiner][X86][AArch64][SPARC][SystemZ] y - (x + C) -> (y - x) - C fold
ClosedPublic

Authored by lebedev.ri on Wed, May 22, 6:31 AM.

Details

Summary

Direct sibling of D62223 patch.
While i don't have a direct motivational pattern for this,
it would seem to make sense to handle both patterns (or none),
for symmetry?

The aarch64 changes look neutral;
sparc and systemz look like improvement (one less instruction each);
x86 changes - 32bit case improves, 64bit case shows that LEA no longer
gets constructed, which may be because that whole test is -mattr=+slow-lea,+slow-3ops-lea

https://rise4fun.com/Alive/ffh

Diff Detail

Repository
rL LLVM

Event Timeline

lebedev.ri created this revision.Wed, May 22, 6:31 AM
t.p.northover accepted this revision.Wed, May 22, 7:01 AM
t.p.northover added a subscriber: t.p.northover.

Looks reasonable to me.

This revision is now accepted and ready to land.Wed, May 22, 7:01 AM

Better test coverage.

@t.p.northover thanks! awaiting @RKSimon / etc, and a parent patch

Rebased, NFC.

This revision was automatically updated to reflect the committed changes.
lebedev.ri reopened this revision.Tue, May 28, 12:04 PM

One of the patches seems to have introduced a hang in test-suite, reverted.

This revision is now accepted and ready to land.Tue, May 28, 12:04 PM
This revision was automatically updated to reflect the committed changes.
lebedev.ri reopened this revision.Thu, May 30, 9:05 AM

And once more.
rL362109 + rL362110

This revision is now accepted and ready to land.Thu, May 30, 9:05 AM
This revision was automatically updated to reflect the committed changes.