[DWARF] Handle DW_OP_entry_value operand

[djtodoro]

Summary

IR and AsmPrinter parts for handling of DW_OP_entry_values DWARF operation.

Authors: @asowda, @NikolaPrica, @djtodoro, @ivanbaev

[aprantl]

This looks mostly good, IMO what's missing is

• an entry in SourceLevelDebugging.rst (or LangRef.rst?) explaining the semantics and limitations of our DW_OP_entry_value support
• a Verifier check that yells when a DW_OP_entry_value is not at position 0
• bonus points for refactoring the With* parameters to a flag enum that is slightly less error-prone to use.

[djtodoro]

This looks mostly good, IMO what's missing is

Thanks!

an entry in SourceLevelDebugging.rst (or LangRef.rst?) explaining the semantics and limitations of our DW_OP_entry_value support

Done.

a Verifier check that yells when a DW_OP_entry_value is not at position 0

Done.

bonus points for refactoring the With* parameters to a flag enum that is slightly less error-prone to use.

Since there are a lot of places using With* it is better doing this as a separate commit. I am working on the patch. :)

[djtodoro]

-Add documentation
-Add a verifier check

[aprantl]

docs/LangRef.rst

4697

How about:

If an expression is marked with ``DW_OP_entry_value `` all register and memory read operations refer to the respective value at the function entry. ``DW_OP_entry_value `` may only appear after instruction selection. At this point LLVM only supports entry values for function parameters that are unmodified throughout a function and that are described as simple register location descriptions.

4700

The Verifier must enforce this.

[aprantl]

lib/IR/DebugInfoMetadata.cpp

880

Also, we must enforce the "simple register location" property.

[djtodoro]

@aprantl Thanks again for the comments!

Let us summarize the whole picture of the feature here. In .debug_info section DW_TAG_call_site_parameter information with its attributes allows us to print @entry value from a debugger (e.g. #1 foo (val=<optimized out>, val@entry=5)). That information we try to generate during AsmPrinter phase.

The second thing of the feature is using @entry for representing real value (DBG_VALUE) of a parameter (additional input in .debug_loc). It is done by generating additional DW_OP_entry_value in LiveDebugValues. So, it will allow us to see situations in a backtrace such as #1 foo (val=val@entry=5).

In addition, we see that GCC in some situations generate DW_OP_entry_value for representing call site parameters value (see DwarfDebug.cpp file), but that is an enhancement, not a fundamental thing.

docs/LangRef.rst

4697

This?

If an expression is marked with DW_OP_entry_value all register and memory read operations refer to the respective value at the function entry. DW_OP_entry_value may appear after livedebugvalues pass. At this point LLVM only supports entry values for function parameters that are unmodified throughout a function and that are described as simple register location descriptions. DW_OP_entry_value may also appear after asembler printer phase when a call site parameter value (DW_AT_call_site_parameter_value) is representd as entry value of the parameter.

In addition, we should add documentation for DW_TAG_call_site and DW_TAG_call_site_parameter as well.

4700

I think that it is hard to verify it at this place. Maybe when printing DWARF expression ?

[aprantl]

docs/LangRef.rst

4697

typos: assembler and represented

I realized that there are more things that we need to add:

Before DW_OP_entry_value, DIExpression did not support DW_OP_reg or similar, but if I understand correctly the idea is that LiveDebugValues will now directly inject register operations into the expression. If that's so:

1. we need to also document which DW_OP_reg operations are supported
2. verify that they only appear after a DW_OP_entry_value
3. We need to document what the value of the first argument of DW_OP_entry_value is

4700

Can you explain why? DIExpression::isValid() walks the entire expression. When we encounter a DW_OP_entry_value, we enforce that the next arg0 elements are out of a limited set of operations. Would that work?

[dstenb]

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

349

This appears to be an unintentional change (which does not compile).

[djtodoro]

docs/LangRef.rst

4697

I think we should document usage of DW_OP_reg. It introduces a confusion here. The operand is used only at the place where we are trying to describe loaded value into parameter's forwarding register (expression of DW_AT_call_site_parameter_value used for printing @entry in debugger). So, the operand could appear in DIExpression after describeLoadedValue() called from DwarfDebug::collectCallSiteParameters(). Basically, DwarfDebug::collectCallSiteParameters() is the place where we prepare info for producing DW_TAG_call_site_parameter, but within LiveDebugValues we generate just additional entries (with DW_OP_entry_value) in .debug_loc that should try using benefits of DW_TAG_call_site_parameter debug info (it means we should try reconstructing a real value for the parameter from @entry).

After LiveDebugValues pass, entry value DIExpression could have only DW_OP_entry_value operand, but final entry value DWARF expression will be printed over a register from corresponding DBG_VALUE.

4700

Entry value DIExpression can have only DW_OP_entry_value for now.

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

349

Sure. The mistake was annul with the last patch from the stack. We will update this.

[aprantl]

docs/LangRef.rst

4697

Perhaps a reasonable restriction (that we could enforce in the Verifier) would be that DW_OP_reg is only allowed inside a DW_OP_entry_value?

[djtodoro]

docs/LangRef.rst

4697

We added a documentation for DW_OP_reg in the last patch of the stack. I think that will clarify picture here. The operand has nothing to do with this part here.
Sorry for the confusion. :)

[djtodoro]

-Refactor the code a bit
-Improve the documentation

[aprantl]

include/llvm/BinaryFormat/Dwarf.def

635

This comment is fine.

636

We don't usually include links in the comments. This can probably be found with a search anyway.

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

327

Could we make this a verifier error instead and an assertion here?

lib/CodeGen/AsmPrinter/DwarfExpression.h

127

Can we do this as a separate NFC patch in preparation?

[djtodoro]

@aprantl As soon as NFC patches (D61943 and D62002) got accepted we will update this.

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

327

Sure.

lib/CodeGen/AsmPrinter/DwarfExpression.h

127

Sure.

[djtodoro]

-Address suggestions
-Improve the documentation
-Improve the verifier

[aprantl]

docs/LangRef.rst

4700

... may only appear after the ... pass.

4701

LLVM only supports ...

[aprantl]

lib/IR/DebugInfoMetadata.cpp

883

Why is it not necessary to check DW_OP_reg here?

[djtodoro]

lib/IR/DebugInfoMetadata.cpp

883

At this point, entry value DIExpression could have only DW_OP_entry_value and 1 as the size of following DWARF expression. Since we are supporting only simple register locations the size is always 1 for now. The assembler printer will use the expression and the register operand from the DBG_VALUE (we don't embed the register info into the DIExpression explicitly) when printing it into DWARF section. This is generated during the LiveDebugValues pass to describe normal value of the parameter through the entry value (new special kind of value).

DW_OP_reg that we introduced in the last patch has nothing to do with this part and it is not used here.

[djtodoro]

-Address suggestions

[aprantl]

lib/IR/DebugInfoMetadata.cpp

883

I also saw that this is in the other patch later. Thanks for clarifying!

It still looks like we should verify the length / rest of the expression instead of returning without checking the later elements? We're checking the length /argument/ of the entry value, but not that the expression actually has the promised 1 argument and nothing else.

This should also be very simple to test (cf. llvm/test/Verifier/diexpression-swap.ll)

[djtodoro]

-Improve the verifier for entry values
-Add test for the verifier

[aprantl]

include/llvm/IR/DebugInfoMetadata.h

2542

Note to self: this is being refactored in another review.

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

44

If "the" location is "an" entry value

lib/DebugInfo/DWARF/DWARFExpression.cpp

278

An llvm-dwarfdump test for this would be nice, too.

test/Verifier/diexpression-entry-value.ll

3

, !1, !2

5

!1 = !DIExpression(DW_OP_constu, 0, DW_OP_entry_value, 1, DW_OP_constu, 0)
!2 = !DIExpression(DW_OP_entry_value, 100, DW_OP_constu, 0)

and then perhaps also a positive test

[djtodoro]

-Addressing comments
-Add llvm-dwarfdump tests for DW_OP_entry_value

TODO: Rebase this on top of NFCs D61943 and D62002

[djtodoro]

-Refactor the code a bit
-Rebase

[aprantl]

include/llvm/IR/DebugInfoMetadata.h

2597

/// Check if the expression consists of exactly one entry value operand.
/// (This is the only configuration of entry values that is supported.)

[djtodoro]

-Addressing suggestions

[djtodoro]

-Rebase

docs/LangRef.rst

- ``DW_OP_LLVM_convert, 16, DW_ATE_signed`` specifies a bit size and encoding
   (``16`` and ``DW_ATE_signed`` here, respectively) to which the top of the
   expression stack is to be converted. Maps into a ``DW_OP_convert`` operation
   that references a base type constructed from the supplied values.
 - ``DW_OP_swap`` swaps top two stack entries.
 - ``DW_OP_xderef`` provides extended dereference mechanism. The entry at the top
   of the stack is treated as an address. The second stack entry is treated as an
   address space identifier.
 - ``DW_OP_stack_value`` marks a constant value.
+- If an expression is marked with ``DW_OP_entry_value`` all register and
+  memory read operations refer to the respective value at the function entry.
+  The first operand of ``DW_OP_entry_value`` is the size of following
+  DWARF expression.
+  ``DW_OP_entry_value`` may appear after the ``LiveDebugValues`` pass.
+  LLVM only supports entry values for function parameters
+  that are unmodified throughout a function and that are described as
+  simple register location descriptions.
+  ``DW_OP_entry_value`` may also appear after the ``AsmPrinter`` pass when
+  a call site parameter value (``DW_AT_call_site_parameter_value``)
+  is represented as entry value of the parameter.
 
 DWARF specifies three kinds of simple location descriptions: Register, memory,
 and implicit location descriptions.  Note that a location description is
 defined over certain ranges of a program, i.e the location of a variable may
 change over the course of the program. Register and memory location
 descriptions describe the *concrete location* of a source variable (in the
 sense that a debugger might modify its value), whereas *implicit locations*
 describe merely the actual *value* of a source variable which might not exist

include/llvm/BinaryFormat/Dwarf.def

 HANDLE_DW_OP(0xa5, regval_type, 5, DWARF)
 HANDLE_DW_OP(0xa6, deref_type, 5, DWARF)
 HANDLE_DW_OP(0xa7, xderef_type, 5, DWARF)
 HANDLE_DW_OP(0xa8, convert, 5, DWARF)
 HANDLE_DW_OP(0xa9, reinterpret, 5, DWARF)
 // Vendor extensions:
 // Extensions for GNU-style thread-local storage.
 HANDLE_DW_OP(0xe0, GNU_push_tls_address, 0, GNU)
+// The GNU entry value extension.
+HANDLE_DW_OP(0xf3, GNU_entry_value, 0, GNU)
 // Extensions for Fission proposal.
 HANDLE_DW_OP(0xfb, GNU_addr_index, 0, GNU)
 HANDLE_DW_OP(0xfc, GNU_const_index, 0, GNU)
 
 // DWARF languages.
 HANDLE_DW_LANG(0x0001, C89, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0002, C, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0003, Ada83, 1, 2, DWARF)

include/llvm/IR/DebugInfoMetadata.h

public:
 
   /// Checks if the last 4 elements of the expression are DW_OP_constu <DWARF
   /// Address Space> DW_OP_swap DW_OP_xderef and extracts the <DWARF Address
   /// Space>.
   static const DIExpression *extractAddressClass(const DIExpression *Expr,
                                                  unsigned &AddrClass);
 
   /// Constants for DIExpression::prepend.
-  enum { NoDeref = false, WithDeref = true, WithStackValue = true };
+  enum { NoDeref = false, WithDeref = true, WithStackValue = true,
+         WithEntryValue = true };
 
   /// Prepend \p DIExpr with a deref and offset operation and optionally turn it
-  /// into a stack value.
+  /// into a stack value or/and an entry value.
   static DIExpression *prepend(const DIExpression *Expr, bool DerefBefore,
                                int64_t Offset = 0, bool DerefAfter = false,
-                               bool StackValue = false);
+                               bool StackValue = false, bool EntryValue = false);
 
   /// Prepend \p DIExpr with the given opcodes and optionally turn it into a
   /// stack value.
   static DIExpression *prependOpcodes(const DIExpression *Expr,
                                       SmallVectorImpl<uint64_t> &Ops,
-                                      bool StackValue = false);
+                                      bool StackValue = false,
+                                      bool EntryValue = false);
 
   /// Append the opcodes \p Ops to \p DIExpr. Unlike \ref appendToStack, the
   /// returned expression is a stack value only if \p DIExpr is a stack value.
   /// If \p DIExpr describes a fragment, the returned expression will describe
   /// the same fragment.
   static DIExpression *append(const DIExpression *Expr, ArrayRef<uint64_t> Ops);
 
   /// Convert \p DIExpr into a stack value if it isn't one already by appending
public:
   }
 
   /// Check if fragments overlap between this DIExpression and \p Other.
   bool fragmentsOverlap(const DIExpression *Other) const {
     if (!isFragment() || !Other->isFragment())
       return true;
     return fragmentCmp(Other) == 0;
   }
+
+  /// Check if the expression contains entry value operand.
+  bool isEntryValue() const {
+    return getNumElements() > 0 &&
+           getElement(0) == dwarf::DW_OP_entry_value;
+  }
 };
 
 /// Global variables.
 ///
 /// TODO: Remove DisplayName.  It's always equal to Name.
 class DIGlobalVariable : public DIVariable {
   friend class LLVMContextImpl;
   friend class MDNode;

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

 }
 
 // If @MI is a DBG_VALUE with debug value described by a
 // defined register, returns the number of this register.
 // In the other case, returns 0.
 static unsigned isDescribedByReg(const MachineInstr &MI) {
   assert(MI.isDebugValue());
   assert(MI.getNumOperands() == 4);
+  // If location of variable is entry value (DW_OP_entry_value)
+  // do not consider it as a register location.
+  if (MI.getDebugExpression()->isEntryValue())
+    return 0;
   // If location of variable is described using a register (directly or
   // indirectly), this register is always a first operand.
   return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
 }
 
 bool DbgValueHistoryMap::startDbgValue(InlinedEntity Var,
                                        const MachineInstr &MI,
                                        EntryIndex &NewIndex) {

lib/CodeGen/AsmPrinter/DebugLocEntry.h

struct Value {
     bool isInt() const { return EntryKind == E_Integer; }
     bool isConstantFP() const { return EntryKind == E_ConstantFP; }
     bool isConstantInt() const { return EntryKind == E_ConstantInt; }
     int64_t getInt() const { return Constant.Int; }
     const ConstantFP *getConstantFP() const { return Constant.CFP; }
     const ConstantInt *getConstantInt() const { return Constant.CIP; }
     MachineLocation getLoc() const { return Loc; }
     bool isFragment() const { return getExpression()->isFragment(); }
+    bool isEntryVal() const { return getExpression()->isEntryValue(); }
     const DIExpression *getExpression() const { return Expression; }
     friend bool operator==(const Value &, const Value &);
     friend bool operator<(const Value &, const Value &);
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
     LLVM_DUMP_METHOD void dump() const {
       if (isLocation()) {
         llvm::dbgs() << "Loc = { reg=" << Loc.getReg() << " ";
         if (Loc.isIndirect())

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

if (Global) {
         DD->addArangeLabel(SymbolCU(this, Sym));
         addOpAddress(*Loc, Sym);
       }
     }
     // Global variables attached to symbols are memory locations.
     // It would be better if this were unconditional, but malformed input that
     // mixes non-fragments and fragments for the same variable is too expensive
     // to detect in the verifier.
-    if (DwarfExpr->isUnknownLocation())
-      DwarfExpr->setMemoryLocationKind();
+    if (DwarfExpr->isLocationUnknown())
+      DwarfExpr->setMemoryLocationFlag();
     DwarfExpr->addExpression(Expr);
   }
   if (Asm->TM.getTargetTriple().isNVPTX() && DD->tuneForGDB()) {
     // According to
     // https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf
     // cuda-gdb requires DW_AT_address_class for all variables to be able to
     // correctly interpret address space of the variable address.
     const unsigned NVPTX_ADDR_global_space = 5;
if (Asm->TM.getTargetTriple().isNVPTX() && DD->tuneForGDB()) {
       if (NewExpr != Expr) {
         Expr = NewExpr;
         NVPTXAddressSpace = LocalNVPTXAddressSpace;
       }
     }
     if (Expr)
       Ops.append(Expr->elements_begin(), Expr->elements_end());
     DIExpressionCursor Cursor(Ops);
-    DwarfExpr.setMemoryLocationKind();
+    DwarfExpr.setMemoryLocationFlag();
     if (const MCSymbol *FrameSymbol = Asm->getFunctionFrameSymbol())
       addOpAddress(*Loc, FrameSymbol);
     else
       DwarfExpr.addMachineRegExpression(
           *Asm->MF->getSubtarget().getRegisterInfo(), Cursor, FrameReg);
     DwarfExpr.addExpression(std::move(Cursor));
   }
   if (Asm->TM.getTargetTriple().isNVPTX() && DD->tuneForGDB()) {

 }
 
 /// Add an address attribute to a die based on the location provided.
 void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute,
                                   const MachineLocation &Location) {
   DIELoc *Loc = new (DIEValueAllocator) DIELoc;
   DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
   if (Location.isIndirect())
-    DwarfExpr.setMemoryLocationKind();
+    DwarfExpr.setMemoryLocationFlag();
 
   DIExpressionCursor Cursor({});
   const TargetRegisterInfo &TRI = *Asm->MF->getSubtarget().getRegisterInfo();
   if (!DwarfExpr.addMachineRegExpression(TRI, Cursor, Location.getReg()))
     return;
   DwarfExpr.addExpression(std::move(Cursor));
 
   // Now attach the location information to the DIE.
   addBlock(Die, Attribute, DwarfExpr.finalize());
 }
 
 /// Start with the address based on the location provided, and generate the
 /// DWARF information necessary to find the actual variable given the extra
 /// address information encoded in the DbgVariable, starting from the starting
 /// location.  Add the DWARF information to the die.
 void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die,
                                          dwarf::Attribute Attribute,
                                          const MachineLocation &Location) {
   DIELoc *Loc = new (DIEValueAllocator) DIELoc;
   DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
   const DIExpression *DIExpr = DV.getSingleExpression();
   DwarfExpr.addFragmentOffset(DIExpr);
   if (Location.isIndirect())
-    DwarfExpr.setMemoryLocationKind();
+    DwarfExpr.setMemoryLocationFlag();
 
   DIExpressionCursor Cursor(DIExpr);
   const TargetRegisterInfo &TRI = *Asm->MF->getSubtarget().getRegisterInfo();
   if (!DwarfExpr.addMachineRegExpression(TRI, Cursor, Location.getReg()))
     return;
   DwarfExpr.addExpression(std::move(Cursor));
 
   // Now attach the location information to the DIE.

lib/CodeGen/AsmPrinter/DwarfDebug.h

 //===- llvm/CodeGen/DwarfDebug.h - Dwarf Debug Framework --------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains support for writing dwarf debug info into asm files.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFDEBUG_H
 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFDEBUG_H
 
 #include "AddressPool.h"
+#include "DebugLocEntry.h"
 #include "DebugLocStream.h"
 #include "DwarfFile.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DenseSet.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SetVector.h"

 
 namespace llvm {
 
 class AsmPrinter;
 class ByteStreamer;
 class DebugLocEntry;
 class DIE;
 class DwarfCompileUnit;
+class DwarfExpression;
 class DwarfTypeUnit;
 class DwarfUnit;
 class LexicalScope;
 class MachineFunction;
 class MCSection;
 class MCSymbol;
 class MDNode;
 class Module;
public:
   /// @{
   bool tuneForGDB() const { return DebuggerTuning == DebuggerKind::GDB; }
   bool tuneForLLDB() const { return DebuggerTuning == DebuggerKind::LLDB; }
   bool tuneForSCE() const { return DebuggerTuning == DebuggerKind::SCE; }
   /// @}
 
   void addSectionLabel(const MCSymbol *Sym);
   const MCSymbol *getSectionLabel(const MCSection *S);
+
+  static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
+                                const DebugLocEntry::Value &Value,
+                                DwarfExpression &DwarfExpr);
 };
 
 } // end namespace llvm
 
 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFDEBUG_H

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

for (unsigned I = 0; I < 2; ++I) {
           Streamer.EmitInt8(Data.getData()[J], Comment != End ? *(Comment++) : "");
       }
       Offset = Op.getOperandEndOffset(I);
     }
     assert(Offset == Op.getEndOffset());
   }
 }
 
-static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
+void DwarfDebug::emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
                                    const DebugLocEntry::Value &Value,
                                    DwarfExpression &DwarfExpr) {
   auto *DIExpr = Value.getExpression();
   DIExpressionCursor ExprCursor(DIExpr);
   DwarfExpr.addFragmentOffset(DIExpr);
   // Regular entry.
   if (Value.isInt()) {
     if (BT && (BT->getEncoding() == dwarf::DW_ATE_signed ||
                BT->getEncoding() == dwarf::DW_ATE_signed_char))
       DwarfExpr.addSignedConstant(Value.getInt());
     else
       DwarfExpr.addUnsignedConstant(Value.getInt());
   } else if (Value.isLocation()) {
     MachineLocation Location = Value.getLoc();
-    if (Location.isIndirect())
-      DwarfExpr.setMemoryLocationKind();
     DIExpressionCursor Cursor(DIExpr);
+    if (Location.isIndirect())
+      DwarfExpr.setMemoryLocationFlag();
+
+    if (DIExpr->isEntryValue()) {
+      DwarfExpr.setEntryValueLocationFlag();
+      if (!DwarfExpr.addEntryValueExpression(Cursor))
+        return;
+    }
+
     const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
     if (!DwarfExpr.addMachineRegExpression(TRI, Cursor, Location.getReg()))
       return;
     return DwarfExpr.addExpression(std::move(Cursor));
   } else if (Value.isConstantFP()) {
     APInt RawBytes = Value.getConstantFP()->getValueAPF().bitcastToAPInt();
     DwarfExpr.addUnsignedConstant(RawBytes);
   }
if (Value.isFragment()) {
     // Emit all fragments that belong to the same variable and range.
     assert(llvm::all_of(Values, [](DebugLocEntry::Value P) {
           return P.isFragment();
         }) && "all values are expected to be fragments");
     assert(std::is_sorted(Values.begin(), Values.end()) &&
            "fragments are expected to be sorted");
 
     for (auto Fragment : Values)
-      emitDebugLocValue(AP, BT, Fragment, DwarfExpr);
+      DwarfDebug::emitDebugLocValue(AP, BT, Fragment, DwarfExpr);
 
   } else {
     assert(Values.size() == 1 && "only fragments may have >1 value");
-    emitDebugLocValue(AP, BT, Value, DwarfExpr);
+    DwarfDebug::emitDebugLocValue(AP, BT, Value, DwarfExpr);
   }
   DwarfExpr.finalize();
 }
 
 void DwarfDebug::emitDebugLocEntryLocation(const DebugLocStream::Entry &Entry,
                                            const DwarfCompileUnit *CU) {
   // Emit the size.
   Asm->OutStreamer->AddComment("Loc expr size");

lib/CodeGen/AsmPrinter/DwarfExpression.h

protected:
   /// Current Fragment Offset in Bits.
   uint64_t OffsetInBits = 0;
   unsigned DwarfVersion;
 
   /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
   unsigned SubRegisterSizeInBits = 0;
   unsigned SubRegisterOffsetInBits = 0;
 
-  /// The kind of location description being produced.
-  enum { Unknown = 0, Register, Memory, Implicit } LocationKind = Unknown;
+  /// The flags of location description being produced.
+  enum LocationFlags {
+    Unknown        = 0,
+    Register       = 1,
+    Memory         = 1 << 1,
+    Implicit       = 1 << 2,
+    EntryValueExpr = 1 << 3
+  };
+
+  uint8_t LocationFlags = 0;
+
+public:
+  bool isLocationUnknown() {
+    return LocationFlags == Unknown;
+  }
+
+  bool isLocationRegister() {
+    return LocationFlags & Register;
+  }
+
+  bool isLocationMemory() {
+    return LocationFlags & Memory;
+  }
 
+  bool isLocationImplicit() {
+    return LocationFlags & Implicit;
+  }
+
+  bool isLocationEntryValueExpr() {
+    return LocationFlags & EntryValueExpr;
+  }
+protected:
   /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
   /// to represent a subregister.
   void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
     SubRegisterSizeInBits = SizeInBits;
     SubRegisterOffsetInBits = OffsetInBits;
   }
 
   /// Add masking operations to stencil out a subregister.
public:
   void addSignedConstant(int64_t Value);
 
   /// Emit an unsigned constant.
   void addUnsignedConstant(uint64_t Value);
 
   /// Emit an unsigned constant.
   void addUnsignedConstant(const APInt &Value);
 
-  bool isMemoryLocation() const { return LocationKind == Memory; }
-  bool isUnknownLocation() const { return LocationKind == Unknown; }
-
   /// Lock this down to become a memory location description.
-  void setMemoryLocationKind() {
-    assert(LocationKind == Unknown);
-    LocationKind = Memory;
+  void setMemoryLocationFlag() {
+    assert(isLocationUnknown() || isLocationEntryValueExpr());
+    LocationFlags |= Memory;
+  }
+
+  /// Lock this down to become an entry value location.
+  void setEntryValueLocationFlag() {
+    LocationFlags |= EntryValueExpr;
   }
 
   /// Emit a machine register location. As an optimization this may also consume
   /// the prefix of a DwarfExpression if a more efficient representation for
   /// combining the register location and the first operation exists.
   ///
   /// \param FragmentOffsetInBits     If this is one fragment out of a
   /// fragmented
   ///                                 location, this is the offset of the
   ///                                 fragment inside the entire variable.
   /// \return                         false if no DWARF register exists
   ///                                 for MachineReg.
   bool addMachineRegExpression(const TargetRegisterInfo &TRI,
                                DIExpressionCursor &Expr, unsigned MachineReg,
                                unsigned FragmentOffsetInBits = 0);
 
+  /// Emit entry value dwarf operation.
+  bool addEntryValueExpression(DIExpressionCursor &ExprCursor);
+
   /// Emit all remaining operations in the DIExpressionCursor.
   ///
   /// \param FragmentOffsetInBits     If this is one fragment out of multiple
   ///                                 locations, this is the offset of the
   ///                                 fragment inside the entire variable.
   void addExpression(DIExpressionCursor &&Expr,
                      unsigned FragmentOffsetInBits = 0);
 

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

void DwarfExpression::emitConstu(uint64_t Value) {
   } else {
     emitOp(dwarf::DW_OP_constu);
     emitUnsigned(Value);
   }
 }
 
 void DwarfExpression::addReg(int DwarfReg, const char *Comment) {
  assert(DwarfReg >= 0 && "invalid negative dwarf register number");
- assert((LocationKind == Unknown || LocationKind == Register) &&
+ assert((isLocationUnknown() || isLocationRegister() ||
+         isLocationEntryValueExpr()) &&
         "location description already locked down");
- LocationKind = Register;
+ LocationFlags |= Register;
  if (DwarfReg < 32) {
    emitOp(dwarf::DW_OP_reg0 + DwarfReg, Comment);
   } else {
     emitOp(dwarf::DW_OP_regx, Comment);
     emitUnsigned(DwarfReg);
   }
 }
 
 void DwarfExpression::addBReg(int DwarfReg, int Offset) {
   assert(DwarfReg >= 0 && "invalid negative dwarf register number");
-  assert(LocationKind != Register && "location description already locked down");
+  assert(!isLocationRegister() && "location description already locked down");
   if (DwarfReg < 32) {
     emitOp(dwarf::DW_OP_breg0 + DwarfReg);
   } else {
     emitOp(dwarf::DW_OP_bregx);
     emitUnsigned(DwarfReg);
   }
   emitSigned(Offset);
 }

 }
 
 void DwarfExpression::addStackValue() {
   if (DwarfVersion >= 4)
     emitOp(dwarf::DW_OP_stack_value);
 }
 
 void DwarfExpression::addSignedConstant(int64_t Value) {
-  assert(LocationKind == Implicit || LocationKind == Unknown);
-  LocationKind = Implicit;
+  assert(isLocationImplicit() || isLocationUnknown() ||
+         isLocationEntryValueExpr());
+  LocationFlags |= Implicit;
   emitOp(dwarf::DW_OP_consts);
   emitSigned(Value);
 }
 
 void DwarfExpression::addUnsignedConstant(uint64_t Value) {
-  assert(LocationKind == Implicit || LocationKind == Unknown);
-  LocationKind = Implicit;
+  assert(isLocationImplicit() || isLocationUnknown() ||
+         isLocationEntryValueExpr());
+  LocationFlags |= Implicit;
   emitConstu(Value);
 }
 
 void DwarfExpression::addUnsignedConstant(const APInt &Value) {
-  assert(LocationKind == Implicit || LocationKind == Unknown);
-  LocationKind = Implicit;
+  assert(isLocationImplicit() || isLocationUnknown() ||
+         isLocationEntryValueExpr());
+  LocationFlags |= Implicit;
 
   unsigned Size = Value.getBitWidth();
   const uint64_t *Data = Value.getRawData();
 
   // Chop it up into 64-bit pieces, because that's the maximum that
   // addUnsignedConstant takes.
   unsigned Offset = 0;
   while (Offset < Size) {
     addUnsignedConstant(*Data++);
     if (Offset == 0 && Size <= 64)
       break;
     addStackValue();
     addOpPiece(std::min(Size - Offset, 64u), Offset);
     Offset += 64;
   }
 }
 
 bool DwarfExpression::addMachineRegExpression(const TargetRegisterInfo &TRI,
                                               DIExpressionCursor &ExprCursor,
                                               unsigned MachineReg,
                                               unsigned FragmentOffsetInBits) {
   auto Fragment = ExprCursor.getFragmentInfo();
   if (!addMachineReg(TRI, MachineReg, Fragment ? Fragment->SizeInBits : ~1U)) {
-    LocationKind = Unknown;
+    LocationFlags = Unknown;
     return false;
   }
 
   bool HasComplexExpression = false;
   auto Op = ExprCursor.peek();
   if (Op && Op->getOp() != dwarf::DW_OP_LLVM_fragment)
     HasComplexExpression = true;
 
   // If the register can only be described by a complex expression (i.e.,
   // multiple subregisters) it doesn't safely compose with another complex
   // expression. For example, it is not possible to apply a DW_OP_deref
   // operation to multiple DW_OP_pieces.
   if (HasComplexExpression && DwarfRegs.size() > 1) {
     DwarfRegs.clear();
-    LocationKind = Unknown;
+    LocationFlags = Unknown;
     return false;
   }
 
   // Handle simple register locations.
-  if (LocationKind != Memory && !HasComplexExpression) {
+  if (!isLocationMemory() && !HasComplexExpression) {
     for (auto &Reg : DwarfRegs) {
       if (Reg.DwarfRegNo >= 0)
         addReg(Reg.DwarfRegNo, Reg.Comment);
       addOpPiece(Reg.Size);
     }
+
+    if (isLocationEntryValueExpr() && DwarfVersion >= 4)
+      emitOp(dwarf::DW_OP_stack_value);
+
     DwarfRegs.clear();
     return true;
   }
 
   // Don't emit locations that cannot be expressed without DW_OP_stack_value.
   if (DwarfVersion < 4)
     if (any_of(ExprCursor, [](DIExpression::ExprOperand Op) -> bool {
           return Op.getOp() == dwarf::DW_OP_stack_value;
         })) {
       DwarfRegs.clear();
-      LocationKind = Unknown;
+      LocationFlags = Unknown;
       return false;
     }
 
   assert(DwarfRegs.size() == 1);
   auto Reg = DwarfRegs[0];
   bool FBReg = isFrameRegister(TRI, MachineReg);
   int SignedOffset = 0;
   assert(Reg.Size == 0 && "subregister has same size as superregister");
case dwarf::DW_OP_LLVM_fragment:
       break;
     default:
       return false;
     }
   }
   return true;
 }
 
+bool DwarfExpression::addEntryValueExpression(DIExpressionCursor &ExprCursor) {
+  auto Op = ExprCursor.take();
+  assert(Op && Op->getOp() == dwarf::DW_OP_entry_value);
+  assert(!isLocationMemory() &&
+         "We don't support entry values of memory locations yet");
+
+  if (DwarfVersion >= 5)
+    emitOp(dwarf::DW_OP_entry_value);
+  else
+    emitOp(dwarf::DW_OP_GNU_entry_value);
+  emitUnsigned(Op->getArg(0));
+
+  return true;
+}
+
 void DwarfExpression::addExpression(DIExpressionCursor &&ExprCursor,
                                     unsigned FragmentOffsetInBits) {
   // If we need to mask out a subregister, do it now, unless the next
   // operation would emit an OpPiece anyway.
   auto N = ExprCursor.peek();
   if (SubRegisterSizeInBits && N && (N->getOp() != dwarf::DW_OP_LLVM_fragment))
     maskSubRegister();
 
   Optional<DIExpression::ExprOperand> PrevConvertOp = None;
 
   while (ExprCursor) {
     auto Op = ExprCursor.take();
     switch (Op->getOp()) {
     case dwarf::DW_OP_LLVM_fragment: {
       unsigned SizeInBits = Op->getArg(1);
       unsigned FragmentOffset = Op->getArg(0);
       // The fragment offset must have already been adjusted by emitting an
       // empty DW_OP_piece / DW_OP_bit_piece before we emitted the base
       // location.
       assert(OffsetInBits >= FragmentOffset && "fragment offset not added?");
 
       // If addMachineReg already emitted DW_OP_piece operations to represent
       // a super-register by splicing together sub-registers, subtract the size
       // of the pieces that was already emitted.
       SizeInBits -= OffsetInBits - FragmentOffset;
 
       // If addMachineReg requested a DW_OP_bit_piece to stencil out a
       // sub-register that is smaller than the current fragment's size, use it.
       if (SubRegisterSizeInBits)
         SizeInBits = std::min<unsigned>(SizeInBits, SubRegisterSizeInBits);
 
       // Emit a DW_OP_stack_value for implicit location descriptions.
-      if (LocationKind == Implicit)
+      if (isLocationImplicit())
         addStackValue();
 
       // Emit the DW_OP_piece.
       addOpPiece(SizeInBits, SubRegisterOffsetInBits);
       setSubRegisterPiece(0, 0);
       // Reset the location description kind.
-      LocationKind = Unknown;
+      LocationFlags = Unknown;
       return;
     }
     case dwarf::DW_OP_plus_uconst:
-      assert(LocationKind != Register);
+      assert(!isLocationRegister());
       emitOp(dwarf::DW_OP_plus_uconst);
       emitUnsigned(Op->getArg(0));
       break;
     case dwarf::DW_OP_plus:
     case dwarf::DW_OP_minus:
     case dwarf::DW_OP_mul:
     case dwarf::DW_OP_div:
     case dwarf::DW_OP_mod:
     case dwarf::DW_OP_or:
     case dwarf::DW_OP_and:
     case dwarf::DW_OP_xor:
     case dwarf::DW_OP_shl:
     case dwarf::DW_OP_shr:
     case dwarf::DW_OP_shra:
     case dwarf::DW_OP_lit0:
     case dwarf::DW_OP_not:
     case dwarf::DW_OP_dup:
       emitOp(Op->getOp());
       break;
     case dwarf::DW_OP_deref:
-      assert(LocationKind != Register);
-      if (LocationKind != Memory && ::isMemoryLocation(ExprCursor))
+      assert(!isLocationRegister());
+      if (!isLocationMemory() && isMemoryLocation(ExprCursor))
         // Turning this into a memory location description makes the deref
         // implicit.
-        LocationKind = Memory;
+        LocationFlags |= Memory;
       else
         emitOp(dwarf::DW_OP_deref);
       break;
     case dwarf::DW_OP_constu:
-      assert(LocationKind != Register);
+      assert(!isLocationRegister());
       emitConstu(Op->getArg(0));
       break;
     case dwarf::DW_OP_LLVM_convert: {
       unsigned BitSize = Op->getArg(0);
       dwarf::TypeKind Encoding = static_cast<dwarf::TypeKind>(Op->getArg(1));
       if (DwarfVersion >= 5) {
         emitOp(dwarf::DW_OP_convert);
         // Reuse the base_type if we already have one in this CU otherwise we
case dwarf::DW_OP_LLVM_convert: {
           PrevConvertOp = None;
         } else {
           PrevConvertOp = Op;
         }
       }
       break;
     }
     case dwarf::DW_OP_stack_value:
-      LocationKind = Implicit;
+      LocationFlags |= Implicit;
       break;
     case dwarf::DW_OP_swap:
-      assert(LocationKind != Register);
+      assert(!isLocationRegister());
       emitOp(dwarf::DW_OP_swap);
       break;
     case dwarf::DW_OP_xderef:
-      assert(LocationKind != Register);
+      assert(!isLocationRegister());
       emitOp(dwarf::DW_OP_xderef);
       break;
     default:
       llvm_unreachable("unhandled opcode found in expression");
     }
   }
 
-  if (LocationKind == Implicit)
+  if (isLocationImplicit())
     // Turn this into an implicit location description.
     addStackValue();
 }
 
 /// add masking operations to stencil out a subregister.
 void DwarfExpression::maskSubRegister() {
   assert(SubRegisterSizeInBits && "no subregister was registered");
   if (SubRegisterOffsetInBits > 0)

lib/DebugInfo/DWARF/DWARFExpression.cpp

static DescVector getDescriptions() {
   Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
   Descriptions[DW_OP_implicit_value] =
       Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
   Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
   Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
   Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
   Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
   Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
+  Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
 
   Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
+  Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
 
   return Descriptions;
 }
 
 static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode) {
   // FIXME: Make this constexpr once all compilers are smart enough to do it.
   static DescVector Descriptions = getDescriptions();
   // Handle possible corrupted or unsupported operation.
if (Size == Operation::BaseTypeRef && U) {
       }
     } else if (Size == Operation::SizeBlock) {
       uint32_t Offset = Operands[Operand];
       for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
         OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
     } else {
       if (Signed)
         OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
-      else
+      else if (Opcode != DW_OP_entry_value &&
+               Opcode != DW_OP_GNU_entry_value)
         OS << format(" 0x%" PRIx64, Operands[Operand]);
     }
   }
   return true;
 }
 
 void DWARFExpression::print(raw_ostream &OS, const MCRegisterInfo *RegInfo,
                             DWARFUnit *U, bool IsEH) const {
+  uint32_t EntryValExprSize = 0;
   for (auto &Op : *this) {
     if (!Op.print(OS, this, RegInfo, U, IsEH)) {
       uint32_t FailOffset = Op.getEndOffset();
       while (FailOffset < Data.getData().size())
         OS << format(" %02x", Data.getU8(&FailOffset));
       return;
     }
+
+    if (Op.getCode() == DW_OP_entry_value ||
+        Op.getCode() == DW_OP_GNU_entry_value) {
+      OS << "(";
+      EntryValExprSize = Op.getRawOperand(0);
+      continue;
+    }
+
+    if (EntryValExprSize) {
+      EntryValExprSize--;
+      if (EntryValExprSize == 0)
+        OS << ")";
+    }
+
     if (Op.getEndOffset() < Data.getData().size())
       OS << ", ";
   }
 }
 
 bool DWARFExpression::Operation::verify(DWARFUnit *U) {
 
   for (unsigned Operand = 0; Operand < 2; ++Operand) {

lib/IR/DebugInfoMetadata.cpp

 
 unsigned DIExpression::ExprOperand::getSize() const {
   switch (getOp()) {
   case dwarf::DW_OP_LLVM_convert:
   case dwarf::DW_OP_LLVM_fragment:
     return 3;
   case dwarf::DW_OP_constu:
   case dwarf::DW_OP_plus_uconst:
+  case dwarf::DW_OP_entry_value:
     return 2;
   default:
     return 1;
   }
 }
 
 bool DIExpression::isValid() const {
   for (auto I = expr_op_begin(), E = expr_op_end(); I != E; ++I) {
case dwarf::DW_OP_swap: {
       // that keeps track of the stack depth and introduce something like a
       // DW_LLVM_OP_implicit_location as a placeholder for the location this
       // DIExpression is attached to, or else pass the number of implicit stack
       // elements into isValid.
       if (getNumElements() == 1)
         return false;
       break;
     }
+    case dwarf::DW_OP_entry_value:
+      // An entry value operator must appear at the begin and the size
+      // of following expression should be 1, because we support only
+      // entry values of a simple register location.
+      return I->get() == expr_op_begin()->get() && I->getArg(0) == 1 &&
+             getNumElements() == 2;
     case dwarf::DW_OP_LLVM_convert:
     case dwarf::DW_OP_constu:
     case dwarf::DW_OP_plus_uconst:
     case dwarf::DW_OP_plus:
     case dwarf::DW_OP_minus:
     case dwarf::DW_OP_mul:
     case dwarf::DW_OP_div:
     case dwarf::DW_OP_mod:
return DIExpression::get(Expr->getContext(),
                              makeArrayRef(&*Expr->Elements.begin(),
                                           Expr->Elements.size() - PatternSize));
   }
   return Expr;
 }
 
 DIExpression *DIExpression::prepend(const DIExpression *Expr, bool DerefBefore,
                                     int64_t Offset, bool DerefAfter,
-                                    bool StackValue) {
+                                    bool StackValue, bool EntryValue) {
   SmallVector<uint64_t, 8> Ops;
   if (DerefBefore)
     Ops.push_back(dwarf::DW_OP_deref);
 
   appendOffset(Ops, Offset);
   if (DerefAfter)
     Ops.push_back(dwarf::DW_OP_deref);
 
-  return prependOpcodes(Expr, Ops, StackValue);
+  return prependOpcodes(Expr, Ops, StackValue, EntryValue);
 }
 
 DIExpression *DIExpression::prependOpcodes(const DIExpression *Expr,
                                            SmallVectorImpl<uint64_t> &Ops,
-                                           bool StackValue) {
+                                           bool StackValue, bool EntryValue) {
   assert(Expr && "Can't prepend ops to this expression");
 
+  if (EntryValue) {
+    Ops.push_back(dwarf::DW_OP_entry_value);
+    // Add size info needed for entry value expression.
+    // Add plus one for target register operand.
+    Ops.push_back(Expr->getNumElements() + 1);
+  }
+
   // If there are no ops to prepend, do not even add the DW_OP_stack_value.
   if (Ops.empty())
     StackValue = false;
   for (auto Op : Expr->expr_ops()) {
     // A DW_OP_stack_value comes at the end, but before a DW_OP_LLVM_fragment.
     if (StackValue) {
       if (Op.getOp() == dwarf::DW_OP_stack_value)
         StackValue = false;

test/Verifier/diexpression-entry-value.ll

+; RUN: not opt -S < %s 2>&1 | FileCheck %s
+
+!named = !{!0}
+; CHECK: invalid expression
+!0 = !DIExpression(DW_OP_entry_value, 4, DW_OP_constu, 0, DW_OP_stack_value)