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[AArch64][SVE] Add StepVector Intrinsic
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Authored by huntergr on Jun 5 2018, 5:37 AM.

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Summary

Adds the following:

  • experimental_vector_stepvector intrinsic, which represents a runtime vector containing a monotically increasing sequence of the form <0, 1, 2, ....n-1>, where 'n' is the total number of elements of the given type.
  • AArch64ISD::SERIES_VECTOR, a target specific ISD to represent this sequence concept in the AArch64 backend, along with code to lower the stepvector intrinsic to this node.
  • ISel patterns to select 'index' instructions for series_vector nodes.
  • Unit tests for scalable vectors of the various integer types.

Part of the initial SVE codegen series, rfc will be posted soon. Note: this patch is currently just to support the scalable vector codegen rfc, and does not need a full review yet.

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Event Timeline

huntergr created this revision.Jun 5 2018, 5:37 AM
huntergr planned changes to this revision.Mar 22 2019, 3:00 AM

Needs to be updated with better isel patterns, instead of just the bare minimum required for demonstration.