Add SysV Abi for PPC64le

[alexandreyy]

Summary

This patch implements the ABI Plugin for PPC64le. It was based on the
ABI for PPC64. It also enables LLDB to evaluate expressions using JIT.

[alexandreyy]

Thanks, @clayborg.

@labath , Could you commit this patch?

[labath]

Is the only difference between ppc64 and ppc64le ABIs in the endianness of the values?
If so, could we make one unified ABI which takes the endianness as an argument (in the constructor, or as a template argument, or deduces it from target endiannes, ...) ?

[hfinkel]

In D41702#969179, @labath wrote:

Is the only difference between ppc64 and ppc64le ABIs in the endianness of the values?
If so, could we make one unified ABI which takes the endianness as an argument (in the constructor, or as a template argument, or deduces it from target endiannes, ...) ?

The ABIs have some other differences. The largest difference between the ABIs is how indirect-calls (and, thus, function pointers) work. There are some other more-minor differences, for example, some of the call-frame offsets are different. It still might be possible to unify the support (we certainly have one backend in LLVM for both), but it's a bit more involved than just switching the endianness.

[labath]

In D41702#969294, @hfinkel wrote:

In D41702#969179, @labath wrote:

Is the only difference between ppc64 and ppc64le ABIs in the endianness of the values?
If so, could we make one unified ABI which takes the endianness as an argument (in the constructor, or as a template argument, or deduces it from target endiannes, ...) ?

The ABIs have some other differences. The largest difference between the ABIs is how indirect-calls (and, thus, function pointers) work. There are some other more-minor differences, for example, some of the call-frame offsets are different. It still might be possible to unify the support (we certainly have one backend in LLVM for both), but it's a bit more involved than just switching the endianness.

Thanks for the explanation. These don't sound like major differences. Could you take a look the possibility of merging these two plugins? I scanned through the source code, and it looks like a large part of it is the same, so I'm hoping that we can make like 80% of this code go away with a unified plugin.
If you hit some major roadblock which would prevent doing that, then that's fine, but I would at least like to know what the blocker is.

(And sorry for the delays, I've been OOO last week.)

[alexandreyy]

In D41702#970844, @labath wrote:

In D41702#969294, @hfinkel wrote:

In D41702#969179, @labath wrote:

Is the only difference between ppc64 and ppc64le ABIs in the endianness of the values?
If so, could we make one unified ABI which takes the endianness as an argument (in the constructor, or as a template argument, or deduces it from target endiannes, ...) ?

The ABIs have some other differences. The largest difference between the ABIs is how indirect-calls (and, thus, function pointers) work. There are some other more-minor differences, for example, some of the call-frame offsets are different. It still might be possible to unify the support (we certainly have one backend in LLVM for both), but it's a bit more involved than just switching the endianness.

Thanks for the explanation. These don't sound like major differences. Could you take a look the possibility of merging these two plugins? I scanned through the source code, and it looks like a large part of it is the same, so I'm hoping that we can make like 80% of this code go away with a unified plugin.
If you hit some major roadblock which would prevent doing that, then that's fine, but I would at least like to know what the blocker is.

(And sorry for the delays, I've been OOO last week.)

Thanks, @labath .
The ABI plugin for PPC64be is not working: https://reviews.llvm.org/D5988 .
It was implemented based on the x86_64 plugin and needs to be fixed.
We could commit this patch and merge the plugins when both plugins work properly.

[labath]

In D41702#970887, @alexandreyy wrote:

Thanks, @labath .
The ABI plugin for PPC64be is not working: https://reviews.llvm.org/D5988 .
It was implemented based on the x86_64 plugin and needs to be fixed.
We could commit this patch and merge the plugins when both plugins work properly.

Hmm.. that complicates things a bit. How badly is it broken, do you estimate? Would it be any better than if we just made your new plugin handle the the big-endian target as well (just a best effort, I'm not asking you to actually test it on that target)?

If the ppc64be FreeBSD target is really broken, and there is no desire to fix it, maybe we should just delete the relevant plugin.

@emaste, @jhibbits: do you know what's the state of ppc64 lldb support in freebsd?

[jhibbits]

In D41702#971012, @labath wrote:

Hmm.. that complicates things a bit. How badly is it broken, do you estimate? Would it be any better than if we just made your new plugin handle the the big-endian target as well (just a best effort, I'm not asking you to actually test it on that target)?

If the ppc64be FreeBSD target is really broken, and there is no desire to fix it, maybe we should just delete the relevant plugin.

@emaste, @jhibbits: do you know what's the state of ppc64 lldb support in freebsd?

It's broken because LLDB doesn't yet handle function descriptors, and I haven't yet made the effort (ENOTIME) to fix that. I think our eventual goal is to move even BE to ELFv2 on FreeBSD, to do away with function descriptors, and it should then Just Work, as powerpc (32-bit) works fine for most cases right now.

That said, if anyone knows enough to add function descriptor knowledge to LLDB, I think that's the only missing piece, or the biggest missing piece. I do want to finish the effort, since I started it 3.5 years ago, but I do need help with understanding that ABI detail and how it fits with LLDB.

[labath]

In D41702#971076, @jhibbits wrote:

@emaste, @jhibbits: do you know what's the state of ppc64 lldb support in freebsd?

It's broken because LLDB doesn't yet handle function descriptors, and I haven't yet made the effort (ENOTIME) to fix that. I think our eventual goal is to move even BE to ELFv2 on FreeBSD, to do away with function descriptors, and it should then Just Work, as powerpc (32-bit) works fine for most cases right now.

That said, if anyone knows enough to add function descriptor knowledge to LLDB, I think that's the only missing piece, or the biggest missing piece. I do want to finish the effort, since I started it 3.5 years ago, but I do need help with understanding that ABI detail and how it fits with LLDB.

Thanks for the explanation. How badly is it broken would you say? Do you think that using this ABI plugin for the big endian target (instead of the one from 2014) would make things any worse? Could you take a quick look to see if there is anything in this plugin that would be completely wrong for the big endian target ? (I couldn't find anything, apart from the obvious things like register constants in CreateDefaultUnwindPlan, but then again, I don't know the ABIs).

I'm trying to avoid making bad design decisions now because of legacy code that is known to be broken and has no clear maintainer nor a plan to fix it.

[alexandreyy]

I think the stack frame structure is not correct for the PPC64be plugin.
But it is hard to say how bad it is broken and fix the plugin without testing it.
The register numbers and stack frame structures are different from the ABI 1.9 to the ABI 2.0.

In D41702#971012, @labath wrote:

In D41702#970887, @alexandreyy wrote:

Thanks, @labath .
The ABI plugin for PPC64be is not working: https://reviews.llvm.org/D5988 .
It was implemented based on the x86_64 plugin and needs to be fixed.
We could commit this patch and merge the plugins when both plugins work properly.

Hmm.. that complicates things a bit. How badly is it broken, do you estimate? Would it be any better than if we just made your new plugin handle the the big-endian target as well (just a best effort, I'm not asking you to actually test it on that target)?

If the ppc64be FreeBSD target is really broken, and there is no desire to fix it, maybe we should just delete the relevant plugin.

@emaste, @jhibbits: do you know what's the state of ppc64 lldb support in freebsd?

[chmeee]

In D41702#972009, @labath wrote:

In D41702#971076, @jhibbits wrote:

@emaste, @jhibbits: do you know what's the state of ppc64 lldb support in freebsd?

It's broken because LLDB doesn't yet handle function descriptors, and I haven't yet made the effort (ENOTIME) to fix that. I think our eventual goal is to move even BE to ELFv2 on FreeBSD, to do away with function descriptors, and it should then Just Work, as powerpc (32-bit) works fine for most cases right now.

That said, if anyone knows enough to add function descriptor knowledge to LLDB, I think that's the only missing piece, or the biggest missing piece. I do want to finish the effort, since I started it 3.5 years ago, but I do need help with understanding that ABI detail and how it fits with LLDB.

Thanks for the explanation. How badly is it broken would you say? Do you think that using this ABI plugin for the big endian target (instead of the one from 2014) would make things any worse? Could you take a quick look to see if there is anything in this plugin that would be completely wrong for the big endian target ? (I couldn't find anything, apart from the obvious things like register constants in CreateDefaultUnwindPlan, but then again, I don't know the ABIs).

I'm trying to avoid making bad design decisions now because of legacy code that is known to be broken and has no clear maintainer nor a plan to fix it.

I don't see anything glaring. I also cross-referenced with the 64-bit BE ABI reference (http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html) and didn't see anything obvious that would hinder using your plugin as a replacement to mine (as mentioned before, symbol handling is the big problem right now, and that's not handled within the ABI plugin), if yours is fully tested.

[labath]

Thank you for looking at this @chmeee. @alexandreyy, could you update this plugin to handle big-endian as well, and then delete the old plugin?

[alexandreyy]

Thanks, @labath and @chmeee .
I will do the merge and send the update soon.

In D41702#975873, @chmeee wrote:

In D41702#972009, @labath wrote:

In D41702#971076, @jhibbits wrote:

@emaste, @jhibbits: do you know what's the state of ppc64 lldb support in freebsd?

It's broken because LLDB doesn't yet handle function descriptors, and I haven't yet made the effort (ENOTIME) to fix that. I think our eventual goal is to move even BE to ELFv2 on FreeBSD, to do away with function descriptors, and it should then Just Work, as powerpc (32-bit) works fine for most cases right now.

That said, if anyone knows enough to add function descriptor knowledge to LLDB, I think that's the only missing piece, or the biggest missing piece. I do want to finish the effort, since I started it 3.5 years ago, but I do need help with understanding that ABI detail and how it fits with LLDB.

Thanks for the explanation. How badly is it broken would you say? Do you think that using this ABI plugin for the big endian target (instead of the one from 2014) would make things any worse? Could you take a quick look to see if there is anything in this plugin that would be completely wrong for the big endian target ? (I couldn't find anything, apart from the obvious things like register constants in CreateDefaultUnwindPlan, but then again, I don't know the ABIs).

I'm trying to avoid making bad design decisions now because of legacy code that is known to be broken and has no clear maintainer nor a plan to fix it.

I don't see anything glaring. I also cross-referenced with the 64-bit BE ABI reference (http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html) and didn't see anything obvious that would hinder using your plugin as a replacement to mine (as mentioned before, symbol handling is the big problem right now, and that's not handled within the ABI plugin), if yours is fully tested.

[alexandreyy]

Merged ppc64le and ppc64 plugins.

[clayborg]

Looks nice. Only nit is we probably don't need the m_endian member variable. See inlined comment.

source/Plugins/ABI/SysV-ppc64/ABISysV_ppc64.h

114 ↗

(On Diff #130180)

Most other code uses "m_byte_order" as the name. That being said, you can always just ask the process since it is store in the lldb_private::ABI class so you really don't need to store it here if you don't want to, you could add an accessor:

lldb::ByteOrder GetByteOrder() const { return GetProcessSP()->GetByteOrder(); }

[alexandreyy]

Removed m_endian variable.

[alexandreyy]

In D41702#978836, @clayborg wrote:

Looks nice. Only nit is we probably don't need the m_endian member variable. See inlined comment.

Thanks. I have changed the code to get the byte order.

[labath]

Thank you for taking the time to do this.
@chmeee, do you want to take a quick look at this?

[jhibbits]

Looks fine to me. We should eventually add tests for this, for both endians.

[davide]

Wait a minute. Is there any reason why we can't add tests now?

[labath]

Well.. whether this plugin is tested depends on what machine you're running on. If you're running on a ppc machine, plenty of tests will exercise this code (TestReturnValue, and pretty much any test doing expression evaluation). Correct me if I am wrong, but I am assuming you guys are running the lldb testsuite as a part of ppc64le bringup.

Given that our entire test suite is based on compiling things and running them on the host, I don't think it's fair to ask a random contributor to come up with a new test strategy.

(Of course, I would still very much like to have tests which are not host-dependent).

[alexandreyy]

In D41702#981456, @labath wrote:

Well.. whether this plugin is tested depends on what machine you're running on. If you're running on a ppc machine, plenty of tests will exercise this code (TestReturnValue, and pretty much any test doing expression evaluation). Correct me if I am wrong, but I am assuming you guys are running the lldb testsuite as a part of ppc64le bringup.

Given that our entire test suite is based on compiling things and running them on the host, I don't think it's fair to ask a random contributor to come up with a new test strategy.

(Of course, I would still very much like to have tests which are not host-dependent).

We are running the lldb suite as part of our development process.
And we know that there are still some issues with the PPC64le code.
But we are already working on that.
Later, we will send other patches to fix them.
Thanks!

[alexandreyy]

In D41702#980893, @davide wrote:

Wait a minute. Is there any reason why we can't add tests now?

Thanks.
We are running the default tests of the lldb suite.
Currently, we have 48 failures that we are working on.
Could we proceed with this patch?
We will send fixes for these issues soon.

[davide]

lgtm, feel free to go ahead.

[alexandreyy]

In D41702#981651, @alexandreyy wrote:

In D41702#980893, @davide wrote:

Wait a minute. Is there any reason why we can't add tests now?

Thanks.
We are running the default tests of the lldb suite.
Currently, we have 48 failures that we are working on.
Could we proceed with this patch?
We will send fixes for these issues soon.

@labath , Could you please commit this patch?

lldb/trunk/source/Plugins/ABI/SysV-ppc64/ABISysV_ppc64.h

GetReturnValueObjectSimple(lldb_private::Thread &thread,
                              lldb_private::CompilerType &ast_type) const;
 
   bool RegisterIsCalleeSaved(const lldb_private::RegisterInfo *reg_info);
 
 private:
   ABISysV_ppc64(lldb::ProcessSP process_sp) : lldb_private::ABI(process_sp) {
     // Call CreateInstance instead.
   }
+
+  lldb::ByteOrder GetByteOrder() const;
 };
 
 #endif // liblldb_ABISysV_ppc64_h_

lldb/trunk/source/Plugins/ABI/SysV-ppc64/ABISysV_ppc64.cpp

 #include "lldb/Target/RegisterContext.h"
 #include "lldb/Target/StackFrame.h"
 #include "lldb/Target/Target.h"
 #include "lldb/Target/Thread.h"
 #include "lldb/Utility/ConstString.h"
 #include "lldb/Utility/DataExtractor.h"
 #include "lldb/Utility/Log.h"
 #include "lldb/Utility/Status.h"
+#include "Utility/PPC64_DWARF_Registers.h"
+#include "Utility/PPC64LE_DWARF_Registers.h"
+
+#define DECLARE_REGISTER_INFOS_PPC64_STRUCT
+#include "Plugins/Process/Utility/RegisterInfos_ppc64.h"
+#undef DECLARE_REGISTER_INFOS_PPC64_STRUCT
+
+#define DECLARE_REGISTER_INFOS_PPC64LE_STRUCT
+#include "Plugins/Process/Utility/RegisterInfos_ppc64le.h"
+#undef DECLARE_REGISTER_INFOS_PPC64LE_STRUCT
 
 using namespace lldb;
 using namespace lldb_private;
 
-enum dwarf_regnums {
-  dwarf_r0 = 0,
-  dwarf_r1,
-  dwarf_r2,
-  dwarf_r3,
-  dwarf_r4,
-  dwarf_r5,
-  dwarf_r6,
-  dwarf_r7,
-  dwarf_r8,
-  dwarf_r9,
-  dwarf_r10,
-  dwarf_r11,
-  dwarf_r12,
-  dwarf_r13,
-  dwarf_r14,
-  dwarf_r15,
-  dwarf_r16,
-  dwarf_r17,
-  dwarf_r18,
-  dwarf_r19,
-  dwarf_r20,
-  dwarf_r21,
-  dwarf_r22,
-  dwarf_r23,
-  dwarf_r24,
-  dwarf_r25,
-  dwarf_r26,
-  dwarf_r27,
-  dwarf_r28,
-  dwarf_r29,
-  dwarf_r30,
-  dwarf_r31,
-  dwarf_f0,
-  dwarf_f1,
-  dwarf_f2,
-  dwarf_f3,
-  dwarf_f4,
-  dwarf_f5,
-  dwarf_f6,
-  dwarf_f7,
-  dwarf_f8,
-  dwarf_f9,
-  dwarf_f10,
-  dwarf_f11,
-  dwarf_f12,
-  dwarf_f13,
-  dwarf_f14,
-  dwarf_f15,
-  dwarf_f16,
-  dwarf_f17,
-  dwarf_f18,
-  dwarf_f19,
-  dwarf_f20,
-  dwarf_f21,
-  dwarf_f22,
-  dwarf_f23,
-  dwarf_f24,
-  dwarf_f25,
-  dwarf_f26,
-  dwarf_f27,
-  dwarf_f28,
-  dwarf_f29,
-  dwarf_f30,
-  dwarf_f31,
-  dwarf_cr,
-  dwarf_fpscr,
-  dwarf_xer = 101,
-  dwarf_lr = 108,
-  dwarf_ctr,
-  dwarf_pc,
-  dwarf_cfa,
-};
-
-// Note that the size and offset will be updated by platform-specific classes.
-#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)                       \
-  {                                                                            \
-    #reg, alt, 8, 0, eEncodingUint, eFormatHex, {kind1, kind2, kind3, kind4 }, \
-                                                 nullptr, nullptr, nullptr, 0  \
-  }
-
-static const RegisterInfo g_register_infos[] = {
-    // General purpose registers.            eh_frame,                  DWARF,
-    // Generic,     Process Plugin
-    DEFINE_GPR(r0, nullptr, dwarf_r0, dwarf_r0, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r1, "sp", dwarf_r1, dwarf_r1, LLDB_REGNUM_GENERIC_SP,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r2, nullptr, dwarf_r2, dwarf_r2, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r3, "arg1", dwarf_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG1,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r4, "arg2", dwarf_r4, dwarf_r4, LLDB_REGNUM_GENERIC_ARG2,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r5, "arg3", dwarf_r5, dwarf_r5, LLDB_REGNUM_GENERIC_ARG3,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r6, "arg4", dwarf_r6, dwarf_r6, LLDB_REGNUM_GENERIC_ARG4,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r7, "arg5", dwarf_r7, dwarf_r7, LLDB_REGNUM_GENERIC_ARG5,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r8, "arg6", dwarf_r8, dwarf_r8, LLDB_REGNUM_GENERIC_ARG6,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r9, "arg7", dwarf_r9, dwarf_r9, LLDB_REGNUM_GENERIC_ARG7,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r10, "arg8", dwarf_r10, dwarf_r10, LLDB_REGNUM_GENERIC_ARG8,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r11, nullptr, dwarf_r11, dwarf_r11, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r12, nullptr, dwarf_r12, dwarf_r12, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r13, nullptr, dwarf_r13, dwarf_r13, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r14, nullptr, dwarf_r14, dwarf_r14, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r15, nullptr, dwarf_r15, dwarf_r15, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r16, nullptr, dwarf_r16, dwarf_r16, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r17, nullptr, dwarf_r17, dwarf_r17, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r18, nullptr, dwarf_r18, dwarf_r18, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r19, nullptr, dwarf_r19, dwarf_r19, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r20, nullptr, dwarf_r20, dwarf_r20, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r21, nullptr, dwarf_r21, dwarf_r21, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r22, nullptr, dwarf_r22, dwarf_r22, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r23, nullptr, dwarf_r23, dwarf_r23, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r24, nullptr, dwarf_r24, dwarf_r24, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r25, nullptr, dwarf_r25, dwarf_r25, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r26, nullptr, dwarf_r26, dwarf_r26, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r27, nullptr, dwarf_r27, dwarf_r27, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r28, nullptr, dwarf_r28, dwarf_r28, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r29, nullptr, dwarf_r29, dwarf_r29, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r30, nullptr, dwarf_r30, dwarf_r30, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(r31, nullptr, dwarf_r31, dwarf_r31, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(lr, "lr", dwarf_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(cr, "cr", dwarf_cr, dwarf_cr, LLDB_REGNUM_GENERIC_FLAGS,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(xer, "xer", dwarf_xer, dwarf_xer, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(ctr, "ctr", dwarf_ctr, dwarf_ctr, LLDB_INVALID_REGNUM,
-               LLDB_INVALID_REGNUM),
-    DEFINE_GPR(pc, "pc", dwarf_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC,
-               LLDB_INVALID_REGNUM),
-    {nullptr,
-     nullptr,
-     8,
-     0,
-     eEncodingUint,
-     eFormatHex,
-     {dwarf_cfa, dwarf_cfa, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
-     nullptr,
-     nullptr,
-     nullptr,
-     0}};
-
-static const uint32_t k_num_register_infos =
-    llvm::array_lengthof(g_register_infos);
-
 const lldb_private::RegisterInfo *
 ABISysV_ppc64::GetRegisterInfoArray(uint32_t &count) {
-  count = k_num_register_infos;
-  return g_register_infos;
+  if (GetByteOrder() == lldb::eByteOrderLittle)
+  {
+    count = llvm::array_lengthof (g_register_infos_ppc64le);
+    return g_register_infos_ppc64le;
+  } else {
+    count = llvm::array_lengthof (g_register_infos_ppc64);
+    return g_register_infos_ppc64;
+  }
 }
 
 size_t ABISysV_ppc64::GetRedZoneSize() const { return 224; }
 
+lldb::ByteOrder ABISysV_ppc64::GetByteOrder() const {
+  return GetProcessSP()->GetByteOrder();
+}
+
 //------------------------------------------------------------------
 // Static Functions
 //------------------------------------------------------------------
 
 ABISP
 ABISysV_ppc64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) {
   static ABISP g_abi_sp;
-  if (arch.GetTriple().getArch() == llvm::Triple::ppc64) {
+  if (arch.GetTriple().getArch() == llvm::Triple::ppc64 ||
+      arch.GetTriple().getArch() == llvm::Triple::ppc64le) {
     if (!g_abi_sp)
       g_abi_sp.reset(new ABISysV_ppc64(process_sp));
     return g_abi_sp;
   }
   return ABISP();
 }
 
 bool ABISysV_ppc64::PrepareTrivialCall(Thread &thread, addr_t sp,
bool ABISysV_ppc64::PrepareTrivialCall(Thread &thread, addr_t sp,
   // First, align the SP
 
   if (log)
     log->Printf("16-byte aligning SP: 0x%" PRIx64 " to 0x%" PRIx64,
                 (uint64_t)sp, (uint64_t)(sp & ~0xfull));
 
   sp &= ~(0xfull); // 16-byte alignment
 
-  sp -= 8;
+  sp -= 544; // allocate frame to save TOC, RA and SP.
 
   Status error;
+  uint64_t reg_value;
   const RegisterInfo *pc_reg_info =
       reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
   const RegisterInfo *sp_reg_info =
       reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP);
   ProcessSP process_sp(thread.GetProcess());
+  const RegisterInfo *lr_reg_info =
+      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA);
+  const RegisterInfo *r2_reg_info = reg_ctx->GetRegisterInfoAtIndex(2);
+  const RegisterInfo *r12_reg_info = reg_ctx->GetRegisterInfoAtIndex(12);
 
-  RegisterValue reg_value;
-
+  // Save return address onto the stack.
   if (log)
     log->Printf("Pushing the return address onto the stack: 0x%" PRIx64
-                ": 0x%" PRIx64,
-                (uint64_t)sp, (uint64_t)return_addr);
+                "(+16): 0x%" PRIx64, (uint64_t)sp, (uint64_t)return_addr);
+  if (!process_sp->WritePointerToMemory(sp + 16, return_addr, error))
+    return false;
 
-  // Save return address onto the stack
-  if (!process_sp->WritePointerToMemory(sp, return_addr, error))
+  // Write the return address to link register.
+  if (log)
+    log->Printf("Writing LR: 0x%" PRIx64, (uint64_t)return_addr);
+  if (!reg_ctx->WriteRegisterFromUnsigned(lr_reg_info, return_addr))
     return false;
 
-  // %r1 is set to the actual stack value.
+  // Write target address to %r12 register.
+  if (log)
+    log->Printf("Writing R12: 0x%" PRIx64, (uint64_t)func_addr);
+  if (!reg_ctx->WriteRegisterFromUnsigned(r12_reg_info, func_addr))
+    return false;
+
+  // Read TOC pointer value.
+  reg_value = reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0);
+
+  // Write TOC pointer onto the stack.
+  uint64_t stack_offset;
+  if (GetByteOrder() == lldb::eByteOrderLittle)
+    stack_offset = 24;
+  else
+    stack_offset = 40;
+
+  if (log)
+    log->Printf("Writing R2 (TOC) at SP(0x%" PRIx64 ")+%d: 0x%" PRIx64,
+        (uint64_t)(sp + stack_offset), (int) stack_offset, (uint64_t)reg_value);
+  if (!process_sp->WritePointerToMemory(sp + stack_offset, reg_value, error))
+    return false;
+
+  // Read the current SP value.
+  reg_value = reg_ctx->ReadRegisterAsUnsigned(sp_reg_info, 0);
+
+  // Save current SP onto the stack.
+  if (log)
+    log->Printf("Writing SP at SP(0x%" PRIx64 ")+0: 0x%" PRIx64,
+      (uint64_t)sp, (uint64_t)reg_value);
+  if (!process_sp->WritePointerToMemory(sp, reg_value, error))
+    return false;
 
+  // %r1 is set to the actual stack value.
   if (log)
     log->Printf("Writing SP: 0x%" PRIx64, (uint64_t)sp);
 
   if (!reg_ctx->WriteRegisterFromUnsigned(sp_reg_info, sp))
     return false;
 
   // %pc is set to the address of the called function.
 
bool ABISysV_ppc64::GetArgumentValues(Thread &thread, ValueList &values) const {
   // Get the pointer to the first stack argument so we have a place to start
   // when reading data
 
   addr_t sp = reg_ctx->GetSP(0);
 
   if (!sp)
     return false;
 
-  addr_t current_stack_argument = sp + 48; // jump over return address
+  uint64_t stack_offset;
+  if (GetByteOrder() == lldb::eByteOrderLittle)
+    stack_offset = 32;
+  else
+    stack_offset = 48;
 
+  // jump over return address.
+  addr_t current_stack_argument = sp + stack_offset;
   uint32_t argument_register_ids[8];
 
-  argument_register_ids[0] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[1] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[2] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG3)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[3] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG4)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[4] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG5)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[5] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG6)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[6] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG7)
-          ->kinds[eRegisterKindLLDB];
-  argument_register_ids[7] =
-      reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG8)
-          ->kinds[eRegisterKindLLDB];
+  for (size_t i = 0; i < 8; ++i) {
+    argument_register_ids[i] = reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
+        LLDB_REGNUM_GENERIC_ARG1 + i)->kinds[eRegisterKindLLDB];
+  }
 
   unsigned int current_argument_register = 0;
 
   for (value_index = 0; value_index < num_values; ++value_index) {
     Value *value = values.GetValueAtIndex(value_index);
 
     if (!value)
       return false;
if (type_flags & eTypeIsScalar) {
     value.GetScalar() =
         (uint64_t)thread.GetRegisterContext()->ReadRegisterAsUnsigned(r3_id, 0);
     value.SetValueType(Value::eValueTypeScalar);
     return_valobj_sp = ValueObjectConstResult::Create(
         thread.GetStackFrameAtIndex(0).get(), value, ConstString(""));
   } else if (type_flags & eTypeIsVector) {
     const size_t byte_size = return_compiler_type.GetByteSize(nullptr);
     if (byte_size > 0) {
-      const RegisterInfo *altivec_reg = reg_ctx->GetRegisterInfoByName("v2", 0);
+      const RegisterInfo *altivec_reg =
+          reg_ctx->GetRegisterInfoByName("vr2",  0);
       if (altivec_reg) {
         if (byte_size <= altivec_reg->byte_size) {
           ProcessSP process_sp(thread.GetProcess());
           if (process_sp) {
             std::unique_ptr<DataBufferHeap> heap_data_ap(
                 new DataBufferHeap(byte_size, 0));
             const ByteOrder byte_order = process_sp->GetByteOrder();
             RegisterValue reg_value;
if (byte_size > 0) {
         }
       }
     }
   }
 
   return return_valobj_sp;
 }
 
-ValueObjectSP ABISysV_ppc64::GetReturnValueObjectImpl(
-    Thread &thread, CompilerType &return_compiler_type) const {
-  ValueObjectSP return_valobj_sp;
-
-  if (!return_compiler_type)
-    return return_valobj_sp;
-
-  ExecutionContext exe_ctx(thread.shared_from_this());
-  return_valobj_sp = GetReturnValueObjectSimple(thread, return_compiler_type);
-  if (return_valobj_sp)
-    return return_valobj_sp;
-
-  RegisterContextSP reg_ctx_sp = thread.GetRegisterContext();
-  if (!reg_ctx_sp)
-    return return_valobj_sp;
-
-  const size_t bit_width = return_compiler_type.GetBitSize(&thread);
-  if (return_compiler_type.IsAggregateType()) {
-    Target *target = exe_ctx.GetTargetPtr();
-    bool is_memory = true;
-    if (bit_width <= 128) {
-      ByteOrder target_byte_order = target->GetArchitecture().GetByteOrder();
-      DataBufferSP data_sp(new DataBufferHeap(16, 0));
-      DataExtractor return_ext(data_sp, target_byte_order,
-                               target->GetArchitecture().GetAddressByteSize());
-
-      const RegisterInfo *r3_info = reg_ctx_sp->GetRegisterInfoByName("r3", 0);
-      const RegisterInfo *rdx_info =
-          reg_ctx_sp->GetRegisterInfoByName("rdx", 0);
-
-      RegisterValue r3_value, rdx_value;
-      reg_ctx_sp->ReadRegister(r3_info, r3_value);
-      reg_ctx_sp->ReadRegister(rdx_info, rdx_value);
-
-      DataExtractor r3_data, rdx_data;
-
-      r3_value.GetData(r3_data);
-      rdx_value.GetData(rdx_data);
-
-      uint32_t fp_bytes =
-          0; // Tracks how much of the xmm registers we've consumed so far
-      uint32_t integer_bytes =
-          0; // Tracks how much of the r3/rds registers we've consumed so far
-
-      const uint32_t num_children = return_compiler_type.GetNumFields();
-
-      // Since we are in the small struct regime, assume we are not in memory.
-      is_memory = false;
-
-      for (uint32_t idx = 0; idx < num_children; idx++) {
-        std::string name;
-        uint64_t field_bit_offset = 0;
-        bool is_signed;
-        bool is_complex;
-        uint32_t count;
-
-        CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(
-            idx, name, &field_bit_offset, nullptr, nullptr);
-        const size_t field_bit_width = field_compiler_type.GetBitSize(&thread);
-
-        // If there are any unaligned fields, this is stored in memory.
-        if (field_bit_offset % field_bit_width != 0) {
-          is_memory = true;
-          break;
-        }
-
-        uint32_t field_byte_width = field_bit_width / 8;
-        uint32_t field_byte_offset = field_bit_offset / 8;
-
-        DataExtractor *copy_from_extractor = nullptr;
-        uint32_t copy_from_offset = 0;
-
-        if (field_compiler_type.IsIntegerOrEnumerationType(is_signed) ||
-            field_compiler_type.IsPointerType()) {
-          if (integer_bytes < 8) {
-            if (integer_bytes + field_byte_width <= 8) {
-              // This is in RAX, copy from register to our result structure:
-              copy_from_extractor = &r3_data;
-              copy_from_offset = integer_bytes;
-              integer_bytes += field_byte_width;
-            } else {
-              // The next field wouldn't fit in the remaining space, so we
-              // pushed it to rdx.
-              copy_from_extractor = &rdx_data;
-              copy_from_offset = 0;
-              integer_bytes = 8 + field_byte_width;
-            }
-          } else if (integer_bytes + field_byte_width <= 16) {
-            copy_from_extractor = &rdx_data;
-            copy_from_offset = integer_bytes - 8;
-            integer_bytes += field_byte_width;
-          } else {
-            // The last field didn't fit.  I can't see how that would happen w/o
-            // the overall size being
-            // greater than 16 bytes.  For now, return a nullptr return value
-            // object.
-            return return_valobj_sp;
-          }
-        } else if (field_compiler_type.IsFloatingPointType(count, is_complex)) {
-          // Structs with long doubles are always passed in memory.
-          if (field_bit_width == 128) {
-            is_memory = true;
-            break;
-          } else if (field_bit_width == 64) {
-            copy_from_offset = 0;
-            fp_bytes += field_byte_width;
-          } else if (field_bit_width == 32) {
-            // This one is kind of complicated.  If we are in an "eightbyte"
-            // with another float, we'll
-            // be stuffed into an xmm register with it.  If we are in an
-            // "eightbyte" with one or more ints,
-            // then we will be stuffed into the appropriate GPR with them.
-            bool in_gpr;
-            if (field_byte_offset % 8 == 0) {
-              // We are at the beginning of one of the eightbytes, so check the
-              // next element (if any)
-              if (idx == num_children - 1)
-                in_gpr = false;
-              else {
-                uint64_t next_field_bit_offset = 0;
-                CompilerType next_field_compiler_type =
-                    return_compiler_type.GetFieldAtIndex(idx + 1, name,
-                                                         &next_field_bit_offset,
-                                                         nullptr, nullptr);
-                if (next_field_compiler_type.IsIntegerOrEnumerationType(
-                        is_signed))
-                  in_gpr = true;
-                else {
-                  copy_from_offset = 0;
-                  in_gpr = false;
-                }
-              }
-            } else if (field_byte_offset % 4 == 0) {
-              // We are inside of an eightbyte, so see if the field before us is
-              // floating point:
-              // This could happen if somebody put padding in the structure.
-              if (idx == 0)
-                in_gpr = false;
-              else {
-                uint64_t prev_field_bit_offset = 0;
-                CompilerType prev_field_compiler_type =
-                    return_compiler_type.GetFieldAtIndex(idx - 1, name,
-                                                         &prev_field_bit_offset,
-                                                         nullptr, nullptr);
-                if (prev_field_compiler_type.IsIntegerOrEnumerationType(
-                        is_signed))
-                  in_gpr = true;
-                else {
-                  copy_from_offset = 4;
-                  in_gpr = false;
-                }
-              }
-            } else {
-              is_memory = true;
-              continue;
-            }
-
-            // Okay, we've figured out whether we are in GPR or XMM, now figure
-            // out which one.
-            if (in_gpr) {
-              if (integer_bytes < 8) {
-                // This is in RAX, copy from register to our result structure:
-                copy_from_extractor = &r3_data;
-                copy_from_offset = integer_bytes;
-                integer_bytes += field_byte_width;
-              } else {
-                copy_from_extractor = &rdx_data;
-                copy_from_offset = integer_bytes - 8;
-                integer_bytes += field_byte_width;
-              }
-            } else {
-              fp_bytes += field_byte_width;
-            }
-          }
-        }
-
-        // These two tests are just sanity checks.  If I somehow get the
-        // type calculation wrong above it is better to just return nothing
-        // than to assert or crash.
-        if (!copy_from_extractor)
-          return return_valobj_sp;
-        if (copy_from_offset + field_byte_width >
-            copy_from_extractor->GetByteSize())
-          return return_valobj_sp;
-
-        copy_from_extractor->CopyByteOrderedData(
-            copy_from_offset, field_byte_width,
-            data_sp->GetBytes() + field_byte_offset, field_byte_width,
-            target_byte_order);
-      }
-
-      if (!is_memory) {
-        // The result is in our data buffer.  Let's make a variable object out
-        // of it:
-        return_valobj_sp = ValueObjectConstResult::Create(
-            &thread, return_compiler_type, ConstString(""), return_ext);
-      }
-    }
-
-    // FIXME: This is just taking a guess, r3 may very well no longer hold the
-    // return storage location.
-    // If we are going to do this right, when we make a new frame we should
-    // check to see if it uses a memory
-    // return, and if we are at the first instruction and if so stash away the
-    // return location.  Then we would
-    // only return the memory return value if we know it is valid.
-
-    if (is_memory) {
-      unsigned r3_id =
-          reg_ctx_sp->GetRegisterInfoByName("r3", 0)->kinds[eRegisterKindLLDB];
-      lldb::addr_t storage_addr =
-          (uint64_t)thread.GetRegisterContext()->ReadRegisterAsUnsigned(r3_id,
-                                                                        0);
-      return_valobj_sp = ValueObjectMemory::Create(
-          &thread, "", Address(storage_addr, nullptr), return_compiler_type);
-    }
-  }
-
-  return return_valobj_sp;
+ValueObjectSP ABISysV_ppc64::GetReturnValueObjectImpl(Thread &thread,
+    CompilerType &return_compiler_type) const {
+  return GetReturnValueObjectSimple(thread, return_compiler_type);
 }
 
 bool ABISysV_ppc64::CreateFunctionEntryUnwindPlan(UnwindPlan &unwind_plan) {
   unwind_plan.Clear();
   unwind_plan.SetRegisterKind(eRegisterKindDWARF);
 
-  uint32_t lr_reg_num = dwarf_lr;
-  uint32_t sp_reg_num = dwarf_r1;
-  uint32_t pc_reg_num = dwarf_pc;
+  uint32_t lr_reg_num;
+  uint32_t sp_reg_num;
+  uint32_t pc_reg_num;
+
+  if (GetByteOrder() == lldb::eByteOrderLittle) {
+    lr_reg_num = ppc64le_dwarf::dwarf_lr_ppc64le;
+    sp_reg_num = ppc64le_dwarf::dwarf_r1_ppc64le;
+    pc_reg_num = ppc64le_dwarf::dwarf_pc_ppc64le;
+  } else {
+    lr_reg_num = ppc64_dwarf::dwarf_lr_ppc64;
+    sp_reg_num = ppc64_dwarf::dwarf_r1_ppc64;
+    pc_reg_num = ppc64_dwarf::dwarf_pc_ppc64;
+  }
 
   UnwindPlan::RowSP row(new UnwindPlan::Row);
 
   // Our Call Frame Address is the stack pointer value
   row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
 
   // The previous PC is in the LR
   row->SetRegisterLocationToRegister(pc_reg_num, lr_reg_num, true);
   unwind_plan.AppendRow(row);
 
   // All other registers are the same.
 
   unwind_plan.SetSourceName("ppc64 at-func-entry default");
   unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
 
   return true;
 }
 
 bool ABISysV_ppc64::CreateDefaultUnwindPlan(UnwindPlan &unwind_plan) {
   unwind_plan.Clear();
   unwind_plan.SetRegisterKind(eRegisterKindDWARF);
 
-  uint32_t sp_reg_num = dwarf_r1;
-  uint32_t pc_reg_num = dwarf_lr;
+  uint32_t sp_reg_num;
+  uint32_t pc_reg_num;
+  uint32_t cr_reg_num;
+
+  if (GetByteOrder() == lldb::eByteOrderLittle) {
+     sp_reg_num = ppc64le_dwarf::dwarf_r1_ppc64le;
+     pc_reg_num = ppc64le_dwarf::dwarf_lr_ppc64le;
+     cr_reg_num = ppc64le_dwarf::dwarf_cr_ppc64le;
+   } else {
+     sp_reg_num = ppc64_dwarf::dwarf_r1_ppc64;
+     pc_reg_num = ppc64_dwarf::dwarf_lr_ppc64;
+     cr_reg_num = ppc64_dwarf::dwarf_cr_ppc64;
+   }
 
   UnwindPlan::RowSP row(new UnwindPlan::Row);
-
   const int32_t ptr_size = 8;
   row->GetCFAValue().SetIsRegisterDereferenced(sp_reg_num);
 
   row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * 2, true);
   row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
-  row->SetRegisterLocationToAtCFAPlusOffset(dwarf_cr, ptr_size, true);
+  row->SetRegisterLocationToAtCFAPlusOffset(cr_reg_num, ptr_size, true);
 
   unwind_plan.AppendRow(row);
   unwind_plan.SetSourceName("ppc64 default unwind plan");
   unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
   unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
-  unwind_plan.SetReturnAddressRegister(dwarf_lr);
+  unwind_plan.SetReturnAddressRegister(pc_reg_num);
   return true;
 }
 
 bool ABISysV_ppc64::RegisterIsVolatile(const RegisterInfo *reg_info) {
   return !RegisterIsCalleeSaved(reg_info);
 }
 
 // See "Register Usage" in the
 // "System V Application Binary Interface"
 // "64-bit PowerPC ELF Application Binary Interface Supplement"
-// current version is 1.9 released 2004 at
-// http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.pdf
-
+// current version is 2 released 2015 at
+// https://members.openpowerfoundation.org/document/dl/576
 bool ABISysV_ppc64::RegisterIsCalleeSaved(const RegisterInfo *reg_info) {
   if (reg_info) {
     // Preserved registers are :
     //    r1,r2,r13-r31
     //    cr2-cr4 (partially preserved)
     //    f14-f31 (not yet)
     //    v20-v31 (not yet)
     //    vrsave (not yet)
if (name[0] == 'f' && name[1] >= '0' && name[2] <= '9') {
         return true;
       if ((name[1] == '2' || name[1] == '3') && name[2] != '\0')
         return true;
     }
 
     if (name[0] == 's' && name[1] == 'p' && name[2] == '\0') // sp
       return true;
     if (name[0] == 'f' && name[1] == 'p' && name[2] == '\0') // fp
-      return true;
+      return false;
     if (name[0] == 'p' && name[1] == 'c' && name[2] == '\0') // pc
       return true;
   }
   return false;
 }
 
 void ABISysV_ppc64::Initialize() {
   PluginManager::RegisterPlugin(

lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_ppc64.h

+//===-- RegisterInfos_ppc64.h -----------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifdef DECLARE_REGISTER_INFOS_PPC64_STRUCT
+
+// C Includes
+#include <stddef.h>
+
+// Computes the offset of the given GPR_PPC64 in the user data area.
+#define GPR_PPC64_OFFSET(regname) (offsetof(GPR_PPC64, regname))
+#define FPR_PPC64_OFFSET(regname) (offsetof(FPR_PPC64, regname)                \
+                                   + sizeof(GPR_PPC64))
+#define VMX_PPC64_OFFSET(regname) (offsetof(VMX_PPC64, regname)                \
+                                   + sizeof(GPR_PPC64) + sizeof(FPR_PPC64))
+#define GPR_PPC64_SIZE(regname) (sizeof(((GPR_PPC64 *)NULL)->regname))
+
+#include "Utility/PPC64_DWARF_Registers.h"
+#include "lldb-ppc64-register-enums.h"
+
+// Note that the size and offset will be updated by platform-specific classes.
+#define DEFINE_GPR_PPC64(reg, alt, lldb_kind)                                  \
+  {                                                                            \
+    #reg, alt, GPR_PPC64_SIZE(reg), GPR_PPC64_OFFSET(reg), lldb::eEncodingUint,\
+                                         lldb::eFormatHex,                     \
+                                         {ppc64_dwarf::dwarf_##reg##_ppc64,    \
+                                          ppc64_dwarf::dwarf_##reg##_ppc64,    \
+                                          lldb_kind,                           \
+                                          LLDB_INVALID_REGNUM,                 \
+                                          gpr_##reg##_ppc64 },                 \
+                                          NULL, NULL, NULL, 0                  \
+  }
+#define DEFINE_FPR_PPC64(reg, alt, lldb_kind)                                  \
+  {                                                                            \
+#reg, alt, 8, FPR_PPC64_OFFSET(reg), lldb::eEncodingIEEE754,                   \
+        lldb::eFormatFloat,                                                    \
+        {ppc64_dwarf::dwarf_##reg##_ppc64,                                     \
+         ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM,     \
+         fpr_##reg##_ppc64 },                                                  \
+         NULL, NULL, NULL, 0                                                   \
+  }
+#define DEFINE_VMX_PPC64(reg, lldb_kind)                                       \
+  {                                                                            \
+#reg, NULL, 16, VMX_PPC64_OFFSET(reg), lldb::eEncodingVector,                  \
+        lldb::eFormatVectorOfUInt32,                                           \
+        {ppc64_dwarf::dwarf_##reg##_ppc64,                                     \
+         ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM,     \
+         vmx_##reg##_ppc64 },                                                  \
+         NULL, NULL, NULL, 0                                                   \
+  }
+
+// General purpose registers.
+// EH_Frame, Generic, Process Plugin
+#define PPC64_REGS                                                             \
+  DEFINE_GPR_PPC64(r0, NULL, LLDB_INVALID_REGNUM)                              \
+  , DEFINE_GPR_PPC64(r1, "sp", LLDB_REGNUM_GENERIC_SP),                        \
+      DEFINE_GPR_PPC64(r2, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_GPR_PPC64(r3, "arg1", LLDB_REGNUM_GENERIC_ARG1),                  \
+      DEFINE_GPR_PPC64(r4, "arg2", LLDB_REGNUM_GENERIC_ARG2),                  \
+      DEFINE_GPR_PPC64(r5, "arg3", LLDB_REGNUM_GENERIC_ARG3),                  \
+      DEFINE_GPR_PPC64(r6, "arg4", LLDB_REGNUM_GENERIC_ARG4),                  \
+      DEFINE_GPR_PPC64(r7, "arg5", LLDB_REGNUM_GENERIC_ARG5),                  \
+      DEFINE_GPR_PPC64(r8, "arg6", LLDB_REGNUM_GENERIC_ARG6),                  \
+      DEFINE_GPR_PPC64(r9, "arg7", LLDB_REGNUM_GENERIC_ARG7),                  \
+      DEFINE_GPR_PPC64(r10, "arg8", LLDB_REGNUM_GENERIC_ARG8),                 \
+      DEFINE_GPR_PPC64(r11, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r12, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r13, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r14, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r15, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r16, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r17, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r18, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r19, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r20, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r21, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r22, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r23, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r24, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r25, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r26, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r27, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r28, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r29, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r30, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(r31, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_GPR_PPC64(cr, "cr", LLDB_REGNUM_GENERIC_FLAGS),                   \
+      DEFINE_GPR_PPC64(msr, "msr", LLDB_INVALID_REGNUM),                       \
+      DEFINE_GPR_PPC64(xer, "xer", LLDB_INVALID_REGNUM),                       \
+      DEFINE_GPR_PPC64(lr, "lr", LLDB_REGNUM_GENERIC_RA),                      \
+      DEFINE_GPR_PPC64(ctr, "ctr", LLDB_INVALID_REGNUM),                       \
+      DEFINE_GPR_PPC64(pc, "pc", LLDB_REGNUM_GENERIC_PC),                      \
+      DEFINE_FPR_PPC64(f0, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f1, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f2, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f3, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f4, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f5, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f6, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f7, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f8, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f9, NULL, LLDB_INVALID_REGNUM),                         \
+      DEFINE_FPR_PPC64(f10, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f11, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f12, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f13, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f14, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f15, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f16, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f17, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f18, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f19, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f20, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f21, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f22, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f23, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f24, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f25, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f26, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f27, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f28, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f29, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f30, NULL, LLDB_INVALID_REGNUM),                        \
+      DEFINE_FPR_PPC64(f31, NULL, LLDB_INVALID_REGNUM),                        \
+      {"fpscr",                                                                \
+       NULL,                                                                   \
+       8,                                                                      \
+       FPR_PPC64_OFFSET(fpscr),                                                \
+       lldb::eEncodingUint,                                                    \
+       lldb::eFormatHex,                                                       \
+       {ppc64_dwarf::dwarf_fpscr_ppc64,                                        \
+        ppc64_dwarf::dwarf_fpscr_ppc64, LLDB_INVALID_REGNUM,                   \
+        LLDB_INVALID_REGNUM, fpr_fpscr_ppc64},                                 \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       0},                                                                     \
+      DEFINE_VMX_PPC64(vr0, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr1, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr2, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr3, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr4, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr5, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr6, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr7, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr8, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr9, LLDB_INVALID_REGNUM),                              \
+      DEFINE_VMX_PPC64(vr10, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr11, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr12, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr13, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr14, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr15, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr16, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr17, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr18, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr19, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr20, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr21, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr22, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr23, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr24, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr25, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr26, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr27, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr28, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr29, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr30, LLDB_INVALID_REGNUM),                             \
+      DEFINE_VMX_PPC64(vr31, LLDB_INVALID_REGNUM),                             \
+      {"vscr",                                                                 \
+       NULL,                                                                   \
+       4,                                                                      \
+       VMX_PPC64_OFFSET(vscr),                                                 \
+       lldb::eEncodingUint,                                                    \
+       lldb::eFormatHex,                                                       \
+       {ppc64_dwarf::dwarf_vscr_ppc64, ppc64_dwarf::dwarf_vscr_ppc64,          \
+        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64},             \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       0},                                                                     \
+      {"vrsave",                                                               \
+       NULL,                                                                   \
+       4,                                                                      \
+       VMX_PPC64_OFFSET(vrsave),                                               \
+       lldb::eEncodingUint,                                                    \
+       lldb::eFormatHex,                                                       \
+       {ppc64_dwarf::dwarf_vrsave_ppc64,                                       \
+        ppc64_dwarf::dwarf_vrsave_ppc64, LLDB_INVALID_REGNUM,                  \
+        LLDB_INVALID_REGNUM, vmx_vrsave_ppc64},                                \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       NULL,                                                                   \
+       0},  /* */
+
+typedef struct _GPR_PPC64 {
+  uint64_t r0;
+  uint64_t r1;
+  uint64_t r2;
+  uint64_t r3;
+  uint64_t r4;
+  uint64_t r5;
+  uint64_t r6;
+  uint64_t r7;
+  uint64_t r8;
+  uint64_t r9;
+  uint64_t r10;
+  uint64_t r11;
+  uint64_t r12;
+  uint64_t r13;
+  uint64_t r14;
+  uint64_t r15;
+  uint64_t r16;
+  uint64_t r17;
+  uint64_t r18;
+  uint64_t r19;
+  uint64_t r20;
+  uint64_t r21;
+  uint64_t r22;
+  uint64_t r23;
+  uint64_t r24;
+  uint64_t r25;
+  uint64_t r26;
+  uint64_t r27;
+  uint64_t r28;
+  uint64_t r29;
+  uint64_t r30;
+  uint64_t r31;
+  uint64_t cr;
+  uint64_t msr;
+  uint64_t xer;
+  uint64_t lr;
+  uint64_t ctr;
+  uint64_t pc;
+  uint64_t pad[3];
+} GPR_PPC64;
+
+typedef struct _FPR_PPC64 {
+  uint64_t f0;
+  uint64_t f1;
+  uint64_t f2;
+  uint64_t f3;
+  uint64_t f4;
+  uint64_t f5;
+  uint64_t f6;
+  uint64_t f7;
+  uint64_t f8;
+  uint64_t f9;
+  uint64_t f10;
+  uint64_t f11;
+  uint64_t f12;
+  uint64_t f13;
+  uint64_t f14;
+  uint64_t f15;
+  uint64_t f16;
+  uint64_t f17;
+  uint64_t f18;
+  uint64_t f19;
+  uint64_t f20;
+  uint64_t f21;
+  uint64_t f22;
+  uint64_t f23;
+  uint64_t f24;
+  uint64_t f25;
+  uint64_t f26;
+  uint64_t f27;
+  uint64_t f28;
+  uint64_t f29;
+  uint64_t f30;
+  uint64_t f31;
+  uint64_t fpscr;
+} FPR_PPC64;
+
+typedef struct _VMX_PPC64 {
+  uint32_t vr0[4];
+  uint32_t vr1[4];
+  uint32_t vr2[4];
+  uint32_t vr3[4];
+  uint32_t vr4[4];
+  uint32_t vr5[4];
+  uint32_t vr6[4];
+  uint32_t vr7[4];
+  uint32_t vr8[4];
+  uint32_t vr9[4];
+  uint32_t vr10[4];
+  uint32_t vr11[4];
+  uint32_t vr12[4];
+  uint32_t vr13[4];
+  uint32_t vr14[4];
+  uint32_t vr15[4];
+  uint32_t vr16[4];
+  uint32_t vr17[4];
+  uint32_t vr18[4];
+  uint32_t vr19[4];
+  uint32_t vr20[4];
+  uint32_t vr21[4];
+  uint32_t vr22[4];
+  uint32_t vr23[4];
+  uint32_t vr24[4];
+  uint32_t vr25[4];
+  uint32_t vr26[4];
+  uint32_t vr27[4];
+  uint32_t vr28[4];
+  uint32_t vr29[4];
+  uint32_t vr30[4];
+  uint32_t vr31[4];
+  uint32_t pad[2];
+  uint32_t vscr[2];
+  uint32_t vrsave;
+} VMX_PPC64;
+
+
+static lldb_private::RegisterInfo g_register_infos_ppc64[] = {
+    PPC64_REGS
+};
+
+static_assert((sizeof(g_register_infos_ppc64) /
+               sizeof(g_register_infos_ppc64[0])) ==
+                  k_num_registers_ppc64,
+              "g_register_infos_powerpc64 has wrong number of register infos");
+
+#undef DEFINE_FPR_PPC64
+#undef DEFINE_GPR_PPC64
+#undef DEFINE_VMX_PPC64
+
+#endif // DECLARE_REGISTER_INFOS_PPC64_STRUCT

lldb/trunk/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h

+//===-- lldb-ppc64-register-enums.h ---------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef lldb_ppc64_register_enums_h
+#define lldb_ppc64_register_enums_h
+
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+
+// ---------------------------------------------------------------------------
+// Internal codes for all ppc64 registers.
+// ---------------------------------------------------------------------------
+enum {
+  k_first_gpr_ppc64,
+  gpr_r0_ppc64 = k_first_gpr_ppc64,
+  gpr_r1_ppc64,
+  gpr_r2_ppc64,
+  gpr_r3_ppc64,
+  gpr_r4_ppc64,
+  gpr_r5_ppc64,
+  gpr_r6_ppc64,
+  gpr_r7_ppc64,
+  gpr_r8_ppc64,
+  gpr_r9_ppc64,
+  gpr_r10_ppc64,
+  gpr_r11_ppc64,
+  gpr_r12_ppc64,
+  gpr_r13_ppc64,
+  gpr_r14_ppc64,
+  gpr_r15_ppc64,
+  gpr_r16_ppc64,
+  gpr_r17_ppc64,
+  gpr_r18_ppc64,
+  gpr_r19_ppc64,
+  gpr_r20_ppc64,
+  gpr_r21_ppc64,
+  gpr_r22_ppc64,
+  gpr_r23_ppc64,
+  gpr_r24_ppc64,
+  gpr_r25_ppc64,
+  gpr_r26_ppc64,
+  gpr_r27_ppc64,
+  gpr_r28_ppc64,
+  gpr_r29_ppc64,
+  gpr_r30_ppc64,
+  gpr_r31_ppc64,
+  gpr_cr_ppc64,
+  gpr_msr_ppc64,
+  gpr_xer_ppc64,
+  gpr_lr_ppc64,
+  gpr_ctr_ppc64,
+  gpr_pc_ppc64,
+  k_last_gpr_ppc64 = gpr_pc_ppc64,
+
+  k_first_fpr_ppc64,
+  fpr_f0_ppc64 = k_first_fpr_ppc64,
+  fpr_f1_ppc64,
+  fpr_f2_ppc64,
+  fpr_f3_ppc64,
+  fpr_f4_ppc64,
+  fpr_f5_ppc64,
+  fpr_f6_ppc64,
+  fpr_f7_ppc64,
+  fpr_f8_ppc64,
+  fpr_f9_ppc64,
+  fpr_f10_ppc64,
+  fpr_f11_ppc64,
+  fpr_f12_ppc64,
+  fpr_f13_ppc64,
+  fpr_f14_ppc64,
+  fpr_f15_ppc64,
+  fpr_f16_ppc64,
+  fpr_f17_ppc64,
+  fpr_f18_ppc64,
+  fpr_f19_ppc64,
+  fpr_f20_ppc64,
+  fpr_f21_ppc64,
+  fpr_f22_ppc64,
+  fpr_f23_ppc64,
+  fpr_f24_ppc64,
+  fpr_f25_ppc64,
+  fpr_f26_ppc64,
+  fpr_f27_ppc64,
+  fpr_f28_ppc64,
+  fpr_f29_ppc64,
+  fpr_f30_ppc64,
+  fpr_f31_ppc64,
+  fpr_fpscr_ppc64,
+  k_last_fpr_ppc64 = fpr_fpscr_ppc64,
+
+  k_first_vmx_ppc64,
+  vmx_vr0_ppc64 = k_first_vmx_ppc64,
+  vmx_vr1_ppc64,
+  vmx_vr2_ppc64,
+  vmx_vr3_ppc64,
+  vmx_vr4_ppc64,
+  vmx_vr5_ppc64,
+  vmx_vr6_ppc64,
+  vmx_vr7_ppc64,
+  vmx_vr8_ppc64,
+  vmx_vr9_ppc64,
+  vmx_vr10_ppc64,
+  vmx_vr11_ppc64,
+  vmx_vr12_ppc64,
+  vmx_vr13_ppc64,
+  vmx_vr14_ppc64,
+  vmx_vr15_ppc64,
+  vmx_vr16_ppc64,
+  vmx_vr17_ppc64,
+  vmx_vr18_ppc64,
+  vmx_vr19_ppc64,
+  vmx_vr20_ppc64,
+  vmx_vr21_ppc64,
+  vmx_vr22_ppc64,
+  vmx_vr23_ppc64,
+  vmx_vr24_ppc64,
+  vmx_vr25_ppc64,
+  vmx_vr26_ppc64,
+  vmx_vr27_ppc64,
+  vmx_vr28_ppc64,
+  vmx_vr29_ppc64,
+  vmx_vr30_ppc64,
+  vmx_vr31_ppc64,
+  vmx_vscr_ppc64,
+  vmx_vrsave_ppc64,
+  k_last_vmx_ppc64 = vmx_vrsave_ppc64,
+
+  k_num_registers_ppc64,
+  k_num_gpr_registers_ppc64 = k_last_gpr_ppc64 - k_first_gpr_ppc64 + 1,
+  k_num_fpr_registers_ppc64 = k_last_fpr_ppc64 - k_first_fpr_ppc64 + 1,
+  k_num_vmx_registers_ppc64 = k_last_vmx_ppc64 - k_first_vmx_ppc64 + 1,
+};
+
+#endif // #ifndef lldb_ppc64_register_enums_h

lldb/trunk/source/Utility/PPC64_DWARF_Registers.h

+//===-- PPC64_DWARF_Registers.h ---------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef utility_PPC64_DWARF_Registers_h_
+#define utility_PPC64_DWARF_Registers_h_
+
+#include "lldb/lldb-private.h"
+
+namespace ppc64_dwarf {
+
+enum {
+  dwarf_r0_ppc64 = 0,
+  dwarf_r1_ppc64,
+  dwarf_r2_ppc64,
+  dwarf_r3_ppc64,
+  dwarf_r4_ppc64,
+  dwarf_r5_ppc64,
+  dwarf_r6_ppc64,
+  dwarf_r7_ppc64,
+  dwarf_r8_ppc64,
+  dwarf_r9_ppc64,
+  dwarf_r10_ppc64,
+  dwarf_r11_ppc64,
+  dwarf_r12_ppc64,
+  dwarf_r13_ppc64,
+  dwarf_r14_ppc64,
+  dwarf_r15_ppc64,
+  dwarf_r16_ppc64,
+  dwarf_r17_ppc64,
+  dwarf_r18_ppc64,
+  dwarf_r19_ppc64,
+  dwarf_r20_ppc64,
+  dwarf_r21_ppc64,
+  dwarf_r22_ppc64,
+  dwarf_r23_ppc64,
+  dwarf_r24_ppc64,
+  dwarf_r25_ppc64,
+  dwarf_r26_ppc64,
+  dwarf_r27_ppc64,
+  dwarf_r28_ppc64,
+  dwarf_r29_ppc64,
+  dwarf_r30_ppc64,
+  dwarf_r31_ppc64,
+  dwarf_f0_ppc64,
+  dwarf_f1_ppc64,
+  dwarf_f2_ppc64,
+  dwarf_f3_ppc64,
+  dwarf_f4_ppc64,
+  dwarf_f5_ppc64,
+  dwarf_f6_ppc64,
+  dwarf_f7_ppc64,
+  dwarf_f8_ppc64,
+  dwarf_f9_ppc64,
+  dwarf_f10_ppc64,
+  dwarf_f11_ppc64,
+  dwarf_f12_ppc64,
+  dwarf_f13_ppc64,
+  dwarf_f14_ppc64,
+  dwarf_f15_ppc64,
+  dwarf_f16_ppc64,
+  dwarf_f17_ppc64,
+  dwarf_f18_ppc64,
+  dwarf_f19_ppc64,
+  dwarf_f20_ppc64,
+  dwarf_f21_ppc64,
+  dwarf_f22_ppc64,
+  dwarf_f23_ppc64,
+  dwarf_f24_ppc64,
+  dwarf_f25_ppc64,
+  dwarf_f26_ppc64,
+  dwarf_f27_ppc64,
+  dwarf_f28_ppc64,
+  dwarf_f29_ppc64,
+  dwarf_f30_ppc64,
+  dwarf_f31_ppc64,
+  dwarf_cr_ppc64 = 64,
+  dwarf_fpscr_ppc64,
+  dwarf_msr_ppc64,
+  dwarf_xer_ppc64 = 100,
+  dwarf_lr_ppc64 = 108,
+  dwarf_ctr_ppc64,
+  dwarf_vscr_ppc64,
+  dwarf_vrsave_ppc64 = 356,
+  dwarf_pc_ppc64,
+  dwarf_vr0_ppc64 = 1124,
+  dwarf_vr1_ppc64,
+  dwarf_vr2_ppc64,
+  dwarf_vr3_ppc64,
+  dwarf_vr4_ppc64,
+  dwarf_vr5_ppc64,
+  dwarf_vr6_ppc64,
+  dwarf_vr7_ppc64,
+  dwarf_vr8_ppc64,
+  dwarf_vr9_ppc64,
+  dwarf_vr10_ppc64,
+  dwarf_vr11_ppc64,
+  dwarf_vr12_ppc64,
+  dwarf_vr13_ppc64,
+  dwarf_vr14_ppc64,
+  dwarf_vr15_ppc64,
+  dwarf_vr16_ppc64,
+  dwarf_vr17_ppc64,
+  dwarf_vr18_ppc64,
+  dwarf_vr19_ppc64,
+  dwarf_vr20_ppc64,
+  dwarf_vr21_ppc64,
+  dwarf_vr22_ppc64,
+  dwarf_vr23_ppc64,
+  dwarf_vr24_ppc64,
+  dwarf_vr25_ppc64,
+  dwarf_vr26_ppc64,
+  dwarf_vr27_ppc64,
+  dwarf_vr28_ppc64,
+  dwarf_vr29_ppc64,
+  dwarf_vr30_ppc64,
+  dwarf_vr31_ppc64,
+};
+
+} // namespace ppc64_dwarf
+
+#endif // utility_PPC64_DWARF_Registers_h_